Fundamentals of Computer
Architecture
Fundamentals of Computer
Architecture
Mark Burrell
c Mark Burrell, 2004
All rights reserved. No reproduction, copy or transmission of this
publication may be made without written permission.
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save with written permission or in accordance with the provisions of the
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as the author of this work in accordance with the Copyright,
Designs and Patents Act 1988.
First published 2004 by
PALGRAVE MACMILLAN
Houndmills, Basingstoke, Hampshire RG21 6XS and
175 Fifth Avenue, New York, N.Y. 10010
Companies and representatives throughout the world
PALGRAVE MACMILLAN is the global academic imprint of the Palgrave
Macmillan division of St. Martin’s Press, LLC and of Palgrave Macmillan Ltd.
Macmillan r is a registered trademark in the United States, United Kingdom
and other countries. Palgrave is a registered trademark in the European Union
and other countries.
ISBN 978-0-333-99866-3 ISBN 978-1-137-11313-9 (eBook)
DOI 10.1007/978-1-137-11313-9
This book is printed on paper suitable for recycling and made from fully
managed and sustained forest sources.
A catalogue record for this book is available from the British Library.
10 9 8 7 6 5 4 3 2 1
13 12 11 10 09 08 07 06 05 04
Contents
Preface xv
Acknowledgements xxi
I The Building Blocks 1
Chapter 1 Introducing The Processor 3
Chapter overview 3
1.1 Computers Are Everywhere 3
1.2 A Very Brief History Of The Computer 6
1.3 Inside A Computer 8
1.4 The Minimalist Approach 10
Chapter summary 15
Chapter 2 Fundamental Concepts I - Data Representation 17
Chapter overview 17
2.1 Introducing Number Representation 17
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Fundamentals of Computer Architecture
2.2 Representing Numbers 18
2.3 Introducing Binary Arithmetic 25
2.4 Signed Numbers 26
2.5 Floating Point Numbers 33
2.6 Logical Operations 34
2.7 Dealing With Text 36
Chapter summary 38
Chapter 3 Fundamental Concepts II - Digital Electronic Circuits 43
Chapter overview 43
3.1 Introducing Digital Electronics 43
3.2 Building Circuits With Gate Logic 47
3.3 Building A Circuit From A Truth Table 49
3.4 Boolean Algebra 54
3.5 Introducing Digital Works 58
Chapter summary 61
Chapter 4 Registers 63
Chapter overview 63
4.1 Introducing An Electronic Memory 63
4.2 Building A Register 67
4.3 Tri-state Logic 70
4.4 Introducing The Clock 75
4.5 Using Registers 76
Chapter summary 78
Chapter 5 The ALU 81
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Contents
Chapter overview 81
5.1 About The ALU 81
5.2 Inside The ALU 84
5.3 Adder Circuits 89
5.4 Building An ADD Circuit 92
5.5 Building An SL Circuit 95
5.6 Building A NEG Circuit 96
5.7 Using The ALU In JASPer 98
Chapter summary 99
Chapter 6 Buses 101
Chapter overview 101
6.1 What is a Bus? 101
6.2 Building A Bus 103
6.3 Buses In JASPer 105
Chapter summary 107
Chapter 7 Memory 109
Chapter overview 109
7.1 Introducing Memory 109
7.2 Building A Small Memory 110
7.3 Types of Memory 113
7.4 Building Larger Memories 115
7.5 Building Wider Memories 118
7.6 Address Decoding Strategies 119
7.7 Using Memory 121
7.8 Connecting Memory To JASPer 124
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Fundamentals of Computer Architecture
Chapter summary 126
Chapter 8 The Hardware Engineer’s Perspective 129
Chapter overview 129
8.1 Recap 129
8.2 Assigning Tasks To Registers 130
8.3 Introducing Micro-Instructions 132
8.4 Introducing The Instruction Set 132
8.5 The Fetch-Execute Cycle 135
8.6 Inside The Fetch-Execute Cycle 136
8.7 Running The Program In JASPer 140
Chapter summary 145
II Using the Processor 147
Chapter 9 Writing Structured Programs 149
Chapter overview 149
9.1 Introducing Programming 149
9.2 Introducing Assembly Programming 150
9.3 Programming Concepts 151
9.4 Writing Our First Assembly Program 159
9.5 Using High-Level Languages 168
9.6 Tips On Structured Programming 168
Chapter summary 169
Chapter 10 Stacks and Subroutines 171
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Contents
Chapter overview 171
10.1 Introducing The Stack 171
10.2 Hardware Support For The Stack 173
10.3 Using Stacks 177
10.4 Introducing Subroutines 181
10.5 Implementing Subroutine Calls Using Stacks 183
10.6 Using Subroutines In Assembly Language 185
Chapter summary 187
Chapter 11 Addressing Modes 189
Chapter overview 189
11.1 Introducing Addressing Modes 189
11.2 Immediate Addressing 190
11.3 Direct Addressing 191
11.4 Indirect Addressing 192
11.5 Indexed Addressing 194
11.6 Relative Addressing 195
11.7 More Complex Instructions 195
11.8 An Addressing Example 197
Chapter summary 198
Chapter 12 Input/Output 201
Chapter overview 201
12.1 Introducing Input/Output 201
12.2 Polled I/O 204
12.3 Interrupt Driven I/O 212
12.4 I/O Using Direct Memory Access 213
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Fundamentals of Computer Architecture
12.5 Other Memory-Mapped Devices 213
Chapter summary 214
Chapter 13 The Interrupt Mechanism 217
Chapter overview 217
13.1 Introducing Interrupts 217
13.2 Introducing A Simple Interrupt Mechanism 219
13.3 An Example Interrupt Program 222
13.4 Comparing Subroutines With Interrupt Handling 227
13.5 The Features Of A More Complex Interrupt Mechanism 228
Chapter summary 228
Chapter 14 Systems Software 231
Chapter overview 231
14.1 Introducing Systems Software 231
14.2 The Operating System 232
14.3 Systems Development Software 232
Chapter summary 244
Chapter 15 Bringing It All Together - The Programmer’s Perspective 247
Chapter overview 247
15.1 Problem Specification 247
15.2 Program Refinement One 249
15.3 Program Refinement Two 254
15.4 Program Refinement Three 259
15.5 Final Testing Of The Program 263
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Contents
15.6 Documenting The Program 265
Chapter summary 268
III Under The Bonnet 269
Chapter 16 Building An Instruction Set 271
Chapter overview 271
16.1 The Instruction Set 271
16.2 Micro-Instructions Revisited 271
16.3 Creating An Instruction 273
16.4 Building New Instruction Sets 278
Chapter summary 280
Chapter 17 The Control Unit 283
Chapter overview 283
17.1 Introducing The Control Unit 283
17.2 Inside The Control Unit 286
Chapter summary 288
Chapter 18 Extending The Hardware 291
Chapter overview 291
18.1 Introduction 291
18.2 Adding More General Purpose Registers 291
18.3 Increasing ALU Functionality 293
18.4 The Use Of A Supervisor Mode 294
18.5 Adding Instructions To The Instruction Set 295
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Fundamentals of Computer Architecture
Chapter summary 295
IV The Real World 297
Chapter 19 CISC and RISC Architectures: An Overview 299
Chapter overview 299
19.1 CISC Processors 299
19.2 RISC Processors 300
19.3 Comparing RISC To CISC 301
19.4 Modern Hybrid Processors 303
Chapter summary 303
Chapter 20 Advanced Architecture Features 305
Chapter overview 305
20.1 Introduction 305
20.2 Increasing Clock Speed 306
20.3 Adding Specialized Instructions 306
20.4 Moving Memory Into Our Processor 307
20.5 Running More Instructions Per Clock Cycle 308
20.6 Adding More Processors 309
20.7 Full Circle 310
Chapter summary 310
V Appendices 313
Appendix A The JASP Toolkit 315
xii
Contents
A.1 Introducing JASP 315
A.2 The JASP Processor - A Reference 318
A.3 JASPer 331
A.4 Aspen 338
A.5 The JASP Assembler 341
A.6 The JASP C−− Compiler 343
A.7 The JASP Software Libraries 348
Appendix B The Basic Instruction Set Quick Reference 351
Appendix C The Basic Instruction Set 357
Appendix D The Advanced Instruction Set Quick Reference 397
Appendix E The Advanced Instruction Set 403
Appendix F An Introduction to Digital Works 441
F.1 Introducing Digital Works 441
F.2 Obtaining Digital Works 441
F.3 Installing Digital Works 441
F.4 Using Digital Works 442
F.5 Creating And Running Your Own Circuits 446
Appendix G Answers To Self Test Exercises 453
G.1 Answers To Chapter 1 453
G.2 Answers To Chapter 2 453
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Fundamentals of Computer Architecture
G.3 Answers To Chapter 3 454
G.4 Answers To Chapter 4 455
G.5 Answers To Chapter 5 455
G.6 Answers To Chapter 6 455
G.7 Answers To Chapter 7 456
G.8 Answers To Chapter 8 456
G.9 Answers To Chapter 9 457
G.10 Answers To Chapter 10 459
G.11 Answers To Chapter 11 462
G.12 Answers To Chapter 12 464
G.13 Answers To Chapter 13 468
G.14 Answers To Chapter 14 469
G.15 Answers To Chapter 16 472
G.16 Answers To Chapter 17 473
Bibliography 475
Index 477
xiv
Preface
What Is This Book About?
This book teaches the reader how the key components of any computer - the
processor and memory - actually work. This core topic of computing is known
as computer architecture and organization.
Computer architecture describes the properties of the computer as viewed
from the perspective of the programmer;
Computer organization describes the internal properties of the computer
as viewed from the perspective of the hardware engineer.
The book is aimed at all first-year undergraduates taking a computer
architecture and organization module. Such a course is normally compul-
sory on computing degrees, software engineering degrees and HN computing
courses. Additionally, many electronic engineering undergraduate courses
have similar modules in their first year. It will also be useful to those study-
ing a taught conversion Masters in computing, as well as further reading for
’A’ level computing students.
Many undergraduates find the topic of computer architecture immensely chal-
lenging - this book, through many examples throughout the text and the use of
simulation software, leads the student to a successful completion of their first
computer architecture course.
To meet this essential aim the text is based around a software simulation of a
simple processor. By using a simplified processor the student gains an under-
standing of the fundamental concepts of computer systems architecture and
organization, upon which he or she can subsequently build to understand the
more advanced facilities and techniques employed by modern day processors.
xv
Fundamentals of Computer Architecture
Note For Lecturers
This book is intended to be the primary text for a first computer architecture
course - PDF slides for each chapter are available from the book website
(details are within this preface).
The book can be used in a number of ways, to suit the wide range of computer
architecture syllabi.
It can be used as sole material for a 24 lecture course;
It can be used in conjunction with other materials in order to best fulfil
your own unique syllabus, in order to give flexibility for either a 12 or a
24 lecture course. Each syllabus for a computer architecture course is
slightly different, so it is expected that you will select the particular chap-
ters that your syllabus concentrates on, using further material to expand
your appropriate areas of interest.
The exercises at the end of chapters can be used as either seminar or home-
work materials as required. All solutions are available to lecturers from the
website listed later.
It is worth noting that the student is expected to have little or no programming
knowledge prior to studying this text. However, although programming con-
cepts are introduced, it is expected that the student will at least be undertaking
a programming course concurrently while studying this material.
How Is The Book Organized?
This book consists of four key parts, together with a number of appendices.
The main parts are: -
The building blocks - which contains chapters on designing a simple proces-
sor, fundamental concepts, registers, buses, memory, the ALU, and how
our processor runs stored programs;
Using the processor - which contains chapters on writing structured pro-
grams, stacks and writing subroutines, addressing modes, memory-
mapped I/O, interrupts and systems software;
Under the bonnet - which contains chapters on micro-instructions, building
an instruction set, and the control unit;
The real world - which closes with chapters on advanced features found in
microprocessors in the wild.
Each section consists of a number of chapters - the largest sections being the
first two. Each chapter consists of the same sub-divisions. These are:
xvi
Preface
An overview;
The main body of the chapter (using practical examples, either programs
for a simulated processor called JASP or circuit designs for a circuit
simulation tool called Digital Works);
A summary;
Where appropriate, a set of self test questions - answers are in appendix
G;
Where appropriate, a set of further exercises to aid the learning process.
The contents of each section and the chapters within it are given below.
Part 1 - The Building Blocks
We look at the processor from the viewpoint of the hardware engineer. This
part establishes the key concepts and introduces a simple processor, focusing
on how it can be built from relatively basic elements (registers, an ALU, a
control unit, and buses to interconnect them). We then discuss how these
elements, in conjunction with a memory, form a basic computer system.
Part 2 - Using The Processor
We look at the processor from the point of view of the programmer. This
part establishes the practical usability of such a processor, starting with sim-
ple programs and building up to using memory-mapped I/O and interrupts.
Additionally, tools that can be used to aid program development are discussed.
Part 3 - Under The Bonnet
After looking at the processor from the programmer’s perspective it is now
time to return to the viewpoint of the hardware engineer to examine the fetch-
execute cycle in more depth. We discuss how we can extend our instruction
set to provide further functionality and then finally, we look at how we could
extend the hardware of our processor to give yet more functionality.
Part 4 - The Real World
In this final part we take a look at the features of real processors and point
out the similarities they share with our simple processor - and hence come
full circle by showing the relevance, simplicity and practicality of our simple
processor as a basis for understanding modern processors.
xvii
Fundamentals of Computer Architecture
Appendices
The appendices contain reference material for the JASP processor and its
instruction sets as well as a brief introduction to the Digital Works package.
Software
The software packages distributed with this text are the JASP toolkit and
Digital Works. Each is detailed below.
The JASP Toolkit
The JASP toolkit is based around the design of a simple processor named
JASP - Just Another Simulated Processor.
The main tool is JASPer (Just Another Simulated Processor emulator ) - a
simulated processor used throughout this text.
The set of tools include:
JASPer - the simulated processor;
Aspen - a command-line version of JASPer that can be used with DOS or
Linux;
The JASP C−− Cross-compiler - a cross-compiler for the JASP architec-
ture;
The JASP Cross-assembler - a cross-assembler, written in Perl, that
assembles programs for the JASP architecture;
The basic and advanced JASP instruction sets;
Two software libraries, for use with each instruction set.
Most screen shots of JASPer within this text make use of a simple graphic
display to better show the functionality of the processor.
All the tools within the JASP toolkit are copyright Mark Burrell, except for the
C−− cross-compiler which is copyright David Harrison.
Digital Works
The Digital Works package is copyright Mechanique and is distributed by
Matrix Multimedia Ltd.
Their website is http://www.matrixmultimedia.co.uk
xviii
Preface
What Is On The Accompanying CD?
On the accompanying CD you will find:
The JASP toolkit;
The Digital Works package (30 day license);
All example programs;
All example circuit diagrams;
Is There A Website?
Yes. It’s here:
http://www.palgrave.com/science/computing/burrell/
On the site you’ll find such useful materials as:
The latest copy of the JASP toolkit;
A link to the Digital Works website;
Further exercises;
Lecturers’ materials including answers to exercises and PDF slides for
each chapter;
Errata for this text.
About The Author
Mark is a Principal Lecturer within the School of Informatics at Northumbria
University located in the North-East of England. He has taught computing
fundamentals for many years and his package JASPer has been used as a
teaching aid in this area since 1995.
Mark has held a UK Private Pilot’s License since 1995, although he doesn’t
get time to use it these days - instead he currently get his kicks by riding fast
motorcycles.
xix
Acknowledgements
I would like to thank the many friends and colleagues who helped me, in so
many ways, to write this text. They include Jago Boardman, Michael Brockway,
Ian Chilton, Jonathan Edwards, Mark Elsom-Cook, David Harrison, William
Henderson, Dan Hodgson, Adrian Jones, Alun Moon, Tony Morrell, John
Morton, Adrian Robson, Gregor Schwake and Iain Wallace. Apologies to all
those I have inadvertently missed out, my thanks and appreciation go to you
all.
I must also thank Dave Hatter and Rebecca Mashayekh of Palgrave and John
Dobson of Matrix Multimedia for their great support of this text.
Additionally, I must thank the couple of thousand students who have helped
field test JASPer for the last eight years or so. Special mention goes to those
students who took time out to find errors, query particular sections, and gener-
ally help improve this text, notably Merle Cavagin, Sam Stevens, Lee Charlton
and Wai-Ching Leung. This text is better for their input.
Lastly, as is traditional, I must of course point out that any remaining errors
within this text are entirely my own.
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