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Digital Electronics Module 5 Activity

The document contains examples of applying Boolean algebra rules and properties to simplify logic expressions and derive equivalent expressions. Several logic circuits are also analyzed and their truth tables expressed.

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Wilma Nadera
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0% found this document useful (0 votes)
66 views9 pages

Digital Electronics Module 5 Activity

The document contains examples of applying Boolean algebra rules and properties to simplify logic expressions and derive equivalent expressions. Several logic circuits are also analyzed and their truth tables expressed.

Uploaded by

Wilma Nadera
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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NADERA WILMA

BSECE 3-1

*If you will type your answer here using computer or mobile, we can use A’ for complement.
a) A + B = A + A’ . B + A . B’
= ( A + A’ . B ) + A . B’ Associative Law
= A + B + A . B’ Distributive Law
= A + ( B + A . B’ ) Associative Law
=A+B+A Distributive Law
=A+A+B Commutative Law
=(A+A)+B Associative Law
=(A)+B And Rule
A+B =A+B

b) A’ + B = A . B + A’ . B + A’ . B’
= ( A . B + A’ . B ) + A’ . B Associative Law
= B ( A + A’ ) + A’ . B Distributive Law
= B . 1 + A’ . B Or Rule
= B + A’ . B And Rule
= B + A’ Distributive Law
= A’ + B Commutative Law
A’ + B = A’ + B

c) A . B + B . C + C . A = A’ . B . C + A . B’ . C + A . B . C’ + A . B . C
= ( A . B’ . C + A . B . C’ + A. B . C ) + A’ . B . C Associative Law
= A ( B’ . C + B . C’ + B. C ) + A’ . B . C Distributive Law
= A ( B’ . C + B ( C + C’ ) + A’ . B . C Distributive Law
= A ( B’ . C + B . 1 ) + A’ . B . C And Rule
= A ( B’ . C + B ) + A’ . B . C Or Rule
= A ( C + B ) + A’ . B . C Distributive Law
= A . C + B . A + A’ . B . C Distributive Law
= A . C + B ( A + A’ . C ) Distributive Law
=A.C+B(A+C) Distributive Law
=A.C+B.A+B.C Distributive Law
=A.B+B.C+C.A Commutative Law
A.B+B.C+C.A =A.B+B.C+C.A
NADERA WILMA
BSECE 3-1

1. A . B . C + A’ . B + A . B . C’
= A . B . C + A . B . C’ + A’ . B
= B ( A . C + A . C’ ) + A’ . B
= B [ A ( C + C’ ) ] + A’ . B
= B ( A . 1 ) + A’ . B
= B . A + A’ . B
= B ( A + A’ )
=B.1
=B

2. X’ . Y . Z + X . Z
= Z ( X’ Y + X )
=Z(Y+X)
=Z.Y+Z.X

3. ( X + Y )’ . ( X’ + Y’ )
= ( X’ . Y’ ) . ( X’ + Y’ )
= X’ . X’ . Y’ + X’ . Y’ . Y’
= X’ . Y’ + X’ . Y’
= X’ . Y’ ( 1 + 1 )
= X’ . Y’

4. X . Y + X ( W . Z + W . Z’)
= X . Y + X [ W ( Z + Z’ ) ]
= X . Y + X ( W .1 )
=X.Y+X.W

5. ( B . C’ + A’ . D ) . ( A . B’ + C . D’ )
Let: E = B . C’
F = A’ . D
G = A . B’
H = C . D’
=(E+F).(G+H)
=E.G+E.H+F.G+F.H
= A . B’ . B . C’ + B . C’ . C . D’ + A’ . D . A . B’ + A’ . D . C . D’
= A . C’ . 0 + B . D’ . 0 + D . B’ . 0 + A’ . C 0
=0+0+0+0
=0
NADERA WILMA
BSECE 3-1

(a) Express the truth table of the circuit


(b) Express the Boolean expression of the given circuit
(c) Get the simplified Boolean expression
(d) Make the new logic circuit for the simplified expression
(e) Express the truth table of the new logic circuit and expression

Answers:
(a) Express the Truth Table of the circuit
Let: n = No. of Variables = 3
No. of Combination = 2n = 23 = 8
A B C Output
Q= ( A . B . C’ ) + ( C’ . B ) + ( B’ . A )

0 0 0 ( 0 . 0 .1 ) + ( 1. 0 ) + ( 1 . 0 )
0+0+0
0

0 0 1 (0.0.0)+(0.0)+(1.0)
0+0+0
0

0 1 0 (0.1.1)+(1.1)+(0.0)
0+1+0
1

0 1 1 (0.1.0)+(0.1)+(0.0)
0+0+0
0

1 0 0 (1.0.1)+(1.0)+ (1.1)
0+0+1
1

1 0 1 (1.0.0)+(0.0)+(1.1)
0+0+1
1
NADERA WILMA
BSECE 3-1

1 1 0 (1.1.1)+(1.1)+(0.1)
1+1+0
1

1 1 1 (1.1.0)+(0.1)+(0.1)
0+0+0
0

Manual Simulation

Online Simulator

(b) Express the Boolean expression of the given circuit

( A . B . C’ ) + ( C’ . B ) + ( B’ . A )
NADERA WILMA
BSECE 3-1

(c) Get the simplified Boolean expression

( A . B . C’ ) + ( C’ . B ) + ( B’ . A ) = B . C’ ( A + 1 ) + B’ . A
= C’ . B + B’ . A

(d) Make the new logic circuit for the simplified expression

(e) Express the truth table of the new logic circuit and expression

A B C Output
R = C’ . B + B’ . A

0 0 0 (1.0)+(1.0)
0

0 0 1 (0.0)+(1.0)
0

0 1 0 (1 .1)+(1.0)
1

0 1 1 (0.1)+(0.1)
0

1 0 0 (1.0)+(1.1)
1
NADERA WILMA
BSECE 3-1

1 0 1 (0.0)+(1.1)
1

1 1 0 (1.1)+(1.1)
1

1 1 1 (0.1)+(0.1)
0

Get the following details for the truth table given below:

1. POS and SOP form Boolean Expression of the truth table


2. Logic Circuit of the boolean expression
3. Simplified Boolean expression
4. Logic circuit of the simplified expression
5. Truth table of the simplified logic circuit and expression
NADERA WILMA
BSECE 3-1

1. POS and SOP form Boolean Expression of the truth table

SOP Form : ( A’ . B’ . C’ . D ) + ( A’ . B . C’ . D ) + ( A . B’ . C’ . D ) + ( A . B’ . C . D ) + ( A . B . C’ . D )
+ ( A . B . C . D’ ) + ( A. B . C .D )

POS Form: ( A + B + C + D ) . ( A + B + C’ + D ) . ( A + B + C’ + D’ ) . (A + B’ + C + D ) . ( A + B’ + C’ + D )
. ( A + B’ + C’ + D’ ) . ( A’ + B + C + D ) . ( A’ + B + C’ + D ) . ( A’ + B’ + C + D )

2. Logic Circuit of the boolean expression

SOP Form
NADERA WILMA
BSECE 3-1

POS Form

3. Simplified Boolean expression


SOP Form
= ( A’ . B’ . C’ . D ) + ( A’ . B . C’ . D ) + ( A . B’ . C’ . D ) + ( A . B’ . C . D ) + ( A . B . C’ . D )

+ ( A . B . C . D’ ) + ( A. B . C .D )

= [ ( A’ . C’ . D ) . ( B’ + B ) ] + [ ( A . B’ . D ) . ( C’ + C) ] + ( A . B . C’ . D )

+ [ ( A . B . C) . ( D’ + D ) ]

= ( A’ . C’ . D ) + ( A . B’ . D ) + ( A . B . C’ . D ) + ( A . B . C)

= ( A’ . C’ . D ) + ( A . B’ . D ) + ( A . B ) .( C’ . D + C)

= ( A’ . C’ . D ) + ( A . B’ . D ) + ( A . B ) . ( C + D )

= ( A’ . C’ . D ) + ( A . B’ . D ) + ( A . B . C ) + ( A . B . D )

= ( A’ . C’ . D ) + ( A . B . C ) + ( A . D) . ( B + B’ )

= ( A’ . C’ . D ) + ( A . B . C ) + ( A . D)

= D . ( A’ . C’ + A )+ ( A . B . C )

= D ( C’ + A ) + ( A . B . C )

= A . B . C + D . C’ + A .D - Answer
NADERA WILMA
BSECE 3-1

4. Logic circuit of the simplified expression


SOP Form
G = A . B . C + D . C’ + A .D

5. Truth table of the simplified logic circuit and expression


A B C D G= A . B . C + D . C’ + A .D

0 0 0 0 0

0 0 0 1 1

0 0 1 0 0

0 0 1 1 0

0 1 0 0 0

0 1 0 1 1

0 1 1 0 0

0 1 1 1 0

1 0 0 0 0

1 0 0 1 1

1 0 1 0 0

1 0 1 1 1

1 1 0 0 0

1 1 0 1 1

1 1 1 0 1

1 1 1 1 1

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