Computer Architecture

Computer Architecture is a blueprint for design and implementation of a computer

system. It provides the functional details and behaviour of a computer system and
comes before computer organization. Computer architecture deals with 'What to do?'

Computer Organization
Computer Organization is how operational parts of a computer system are linked
together. It implements the provided computer architecture. Computer organization
deals with 'How to do?'
Following are some of the important differences between Computer Architecture and
Computer Organization.

Sr. Key Computer Architecture Computer Organization

No.

Purpose Computer architecture explains Computer organization explains how a

1
what a computer should do. computer works.

Target Computer architecture provides Computer organization provides

2 functional behavior of computer structural relationships between parts
system. of computer system.

Design Computer architecture deals Computer organization deals with low

3
with high level design. level design.

Actors Actors in Computer architecture Actor in computer organizaton is

4
are hardware parts. performance.

Order Computer architecture is Computer organization is started after

5
designed first. finalizing computer architecture.

Von Neumann Architecture:  

Von Neumann Architecture is a digital computer architecture whose design is
based on the concept of stored program computers where program data and
instruction data are stored in the same memory. This architecture was designed
by the famous mathematician and physicist John Von Neumann in 1945. 
 
Harvard Architecture:  
Harvard Architecture is the digital computer architecture whose design is based
on the concept where there are separate storage and separate buses (signal
path) for instruction and data. It was basically developed to overcome the
bottleneck of Von Neumann Architecture. 
 
Difference between Von Neumann and Harvard Architecture : 
VON NEUMANN ARCHITECTURE HARVARD ARCHITECTURE

It is ancient computer architecture based It is modern computer architecture based on

on stored program computer concept. Harvard Mark I relay based model.

Same physical memory address is used for Separate physical memory address is used
instructions and data. for instructions and data.

There is common bus for data and Separate buses are used for transferring
instruction transfer. data and instruction.

Two clock cycles are required to execute

single instruction. An instruction is executed in a single cycle.

It is costly than Von Neumann

It is cheaper in cost. Architecture.

CPU can not access instructions and CPU can access instructions and read/write
read/write at the same time. at the same time.

It is used in personal computers and small It is used in micro controllers and signal
computers. processing.

Harvard Architecture
In a normal computer that follows von Neumann architecture, instructions and data both
are stored in same memory. So same buses are used to fetch instructions and data. This
means CPU cannot do both things together (read a instruction and read/write
data). Harvard Architecture is the computer architecture that contains separate storage
and separate buses (signal path) for instruction and data. It was basically developed to
overcome the bottleneck of Von Neumann Architecture. The main advantage of having
separate buses for instruction and data is that CPU can access instructions and read/write
data at the same time.
Structure of Harvard Architecture:
 Buses:
Buses are used as signal pathways. In Harvard architecture there are separate buses
for both instruction and data. Types of Buses:
Data Bus: It carries data among the main memory system, processor and I/O devices.
Data Address Bus: It carries the address of data from processor to main memory
system.
Instruction Bus: It carries instructions among the main memory system, processor
and I/O devices.
 Instruction Address Bus: It carries the address of instructions from processor to
main memory system.
 Operational Registers:
There are different types of registers involved in it which are used for storing address
of different types of instructions.
For example, Memory Address Register and Memory Data Register are operational
registers.
 Program Counter:
It has the location of the next instruction to be executed. Program counter then passes
this next address to memory address register.
 Arithmetic and Logic Unit:
Arithmetic logic unit is that part of the CPU that operates all the calculations needed.
It performs addition, subtraction, comparison, logical Operations, bit Shifting
Operations and various arithmetic operations.
 Control Unit:
Control unit the part of CPU that operates all processor control signals. It controls the
input and output devices and also control the movement of instructions and data
within the system.
 Input/Output System:
Input devices are used to read data into main memory with the help of CPU input
instruction. The information from a computer as output are given through Output
devices. Computer gives the results of computation with the help of output devices.
Advantage of Harvard Architecture:
Harvard architecture has two separate buses for instruction and data. Hence, CPU can
access instructions and read/write data at the same time. This is the major advantage of
Harvard architecture.
In practice Modified Harvard Architecture is used where we have two separate caches
(data and instruction). This is common and used in X86 and ARM processors.

Difference between RISC and CISC Architecture

Difference between RISC and CISC

 RISC CISC
1. RISC stands for Reduced Instruction Set Computer. 1. CISC stands for Complex Instruction S
2. RISC processors have simple instructions taking about 2. CSIC processor has complex instructio
one clock cycle. The average clock cycle per instruction multiple clocks for execution. The averag
(CPI) is 1.5 instruction (CPI) is in the range of 2 and
3. Performance is optimized with more focus on software 3. Performance is optimized with more fo
4. It has no memory unit and uses separate hardware to 4. It has a memory unit to implement com
implement instructions.. instructions.
5. It has a hard-wired unit of programming. 5. It has a microprogramming unit.
6. The instruction set is reduced i.e. it has only a few
instructions in the instruction set. Many of these 6. The instruction set has a variety of diff
instructions are very primitive. that can be used for complex operations.
7. CISC has many different addressing m
7. The instruction set has a variety of different instructions thus be used to represent higher-level pro
that can be used for complex operations. language statements more efficiently.
8. Complex addressing modes are synthesized using the
software. 8. CISC already supports complex addres
9. Multiple register sets are present 9. Only has a single register set
10. RISC processors are highly pipelined 10. They are normally not pipelined or le
11. The complexity of RISC lies with the compiler that
executes the program 11. The complexity lies in the microprogr
12. Execution time is very less 12. Execution time is very high
13. Code expansion can be a problem 13. Code expansion is not a problem
14. The decoding of instructions is simple. 14. Decoding of instructions is complex
15. It does not require external memory for calculations 15. It requires external memory for calcul
16. The most common RISC microprocessors are Alpha, 16. Examples of CISC processors are the
ARC, ARM, AVR, MIPS, PA-RISC, PIC, Power VAX, PDP-11, Motorola 68000 family, A
Architecture, and SPARC. x86 CPUs.

What is RISC?
A reduced instruction set computer is a computer that only uses simple
commands that can be divided into several instructions that achieve low-level
operation within a single CLK cycle, as its name proposes “Reduced
Instruction Set”.

The RISC is a Reduced Instruction Set Computer microprocessor and its

architecture includes a set of instructions that are highly customized. The
main function of this is to reduce the time of instruction execution by limiting
as well as optimizing the number of commands. So each command cycle uses
a single clock cycle where every clock cycle includes three parameters
namely fetch, decode & execute.

The kind of processor is mainly used to execute several difficult commands by

merging them into simpler ones. RISC processor needs a number of
transistors to design and it reduces the instruction time for execution. The best
examples of RISC processors include PowerPC, SUN’s SPARC, RISC-V,
Microchip PIC processors, etc.

RISC Architecture
The term RISC stands for ‘’Reduced Instruction Set Computer’’. It is a CPU
design plan based on simple orders and acts fast.

This is a small or reduced set of instructions. Here, every instruction is

expected to attain very small jobs. In this machine, the instruction sets are
modest and simple, which help in comprising more complex commands. Each
instruction is of a similar length; these are wound together to get compound
tasks done in a single operation. Most commands are completed in one
machine cycle. This pipelining is a crucial technique used to speed up RISC
machines.

Characteristics
The characteristics of RISC include the following.

 Pipeline architecture
 The number of instructions is restricted as well as decrease
 The instructions like load as well as store have right of entry to memory
 Addressing modes are less
 Instruction is uniform and its format can be simplified
Advantages
The advantages of the RISC processor include the following.

 The performance of this processor is good because of the easy &

limited no. of the instruction set.
 This processor uses several transistors in the design so that making is
cheaper.
 RISC processor allows the instruction to utilize open space on a
microprocessor due to its simplicity.
 It is very simple as compared with another processor due to this; it can
finish its task within a single clock cycle.
Disadvantages
The disadvantages of a CISC processor include the following.

 The performance of this processor may change based on the executed

code because the next commands may depend on the earlier instruction for
their implementation within a cycle.
 The complex instruction is frequently used by the compilers and
programmers
 These processors need very quick memory to keep different instructions
that use a huge collection of cache memory to react to the command within
less time.
What is CISC?
It was developed by the Intel Corporation and it is Complex Instruction Set
Computer. This processor includes a huge collection of simple to complex
instructions. These instructions are specified in the level of assembly
language level and the execution of these instructions takes more time.

A complex instruction set computer is a computer where single instructions

can perform numerous low-level operations like a load from memory, an
arithmetic operation, and a memory store or are accomplished by multi-step
processes or addressing modes in single instructions, as its name proposes
“Complex Instruction Set ”.

So, this processor moves to decrease the number of instructions on every

program & ignore the number of cycles for each instruction. It highlights to
assemble complex instructions openly within the hardware as the hardware is
always as compared with software. However, CISC chips are relatively slower
as compared to RISC chips but utilize small instruction as compare with RISC.
The best examples of the CISC processor include AMD, VAX, System/360 &
Intel x86.

CISC Architecture
The term CISC stands for ‘’Complex Instruction Set Computer’’. It is a CPU
design plan based on single commands, which are skilled in executing multi-
step operations.

CISC computers have small programs. It has a huge number of compound

instructions, which takes a long time to perform. Here, a single set of
instructions is protected in several steps; each instruction set has additional
than 300 separate instructions. Maximum instructions are finished in two to
ten machine cycles. In CISC, instruction pipelining is not easily implemented.

Characteristics
The main characteristics of the RISC processor include the following.

 CISC may take more time to execute the code as compared with an
only clock cycle.
 CISC supports high-level languages for simple compilation and complex
data structure.
 It is collected with more addressing nodes, fewer registers normally
from 5 to 20.
 For writing an application, less instruction is required
 The code length is very short, so it needs extremely small RAM.
 It highlights the instruction on hardware while designing as it is faster to
design than the software.
 Instructions are larger as compared with a single word.
 It gives simple programming within assembly language.
Advantages
The advantages of CISC include the following.
 This processor will create a procedure to handle the usage of power
that regulates the speed of clock & voltage.
 In the CISC processor, the compiler needs a small effort to change the
program or statement from high-level to assembly otherwise machine
language.
 A single instruction can be executed by using different low-level tasks
 It doesn’t use much memory due to a short length of code.
 CISC utilizes less instruction set to execute the same instruction as the
RISC.
 The instruction can be stored within RAM on every CISC
Disadvantages
The disadvantages of CISC include the following.

 The existing instructions used by the CISC are 20% within a program
event.
 As compared with the RISC processor, CISC processors are very slow
while executing every instruction cycle on every program.
 This processor use number of transistors as compared with RISC.
 The pipeline execution within the CISC will make it difficult to use.
 The machine performance reduces because of the low speed of the
clock.