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Real-Time Operating Systems For Embedded Computing: Yanbing Li, Miodrag Potkonjak, and Wayne Wolf

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Real-Time Operating Systems For Embedded Computing: Yanbing Li, Miodrag Potkonjak, and Wayne Wolf

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Real-Time Operating Systems for

Embedded Computing
Yanbing Li†, Miodrag Potkonjak‡, and Wayne Wolf†

Department of Electrical Engineering, Princeton University

Department of Computer Science, UCLA

Abstract conferencing, are intrinsically defined by a need for high


volume data management. Recent analysis of electronic
We survey the state-of-the-art in real-time operating sys-
market clearly indicates crucial importance of considering
tems (RTOSs) from the system synthesis point of view.
customers spending limits and to act promptly to the
RTOSs have a very long research history which provides
changes in the market conditions6.
important theoretical results and useful industrial imple-
mentations. Convergence of applications, technology, and As a result of these trends, there is a growing consensus that
market trends of embedded systems implies a strong need the only design reuse techniques can close the fast growing
for new generation of RTOS. Therefore, new system syn- gap between the potentials of semiconductor production
thesis problem areas, notably hardware/software co-design technologies and traditional design productivity9. Software
and synthesis for systems-on-silicon (SOS), are opening up is a major element of modern reuse strategies and real-time
new avenues for RTOS research and development. This operating systems (RTOSs) are critical components in
paper starts with a survey of classical academic and indus- reusable embedded software systems.
trial RTOS work and continues with a survey of recent
Traditionally, application-specific systems have been imple-
results related to co-design and design systems-on-silicon.
mented using the algorithm-to-architecture methodology.
We conclude by outlining future directions for the SOS
While this was a viable option for synthesis of low com-
RTOS.
plexity application-specific systems, it does not address
needs of more complex emerging designs. Figure 1 illus-
1 Introduction trates the new system-level synthesis flow. RTOS provides
Recently, a convergence of applications, technology, and isolation and interface to application and algorithm devel-
market trends of embedded systems has resulted in drastic
Algorithm
quantitative and qualitative change in synthesis of applica- Development Compilation
tion-specific systems. The size of average embedded con-
sumer electronics applications has been approximately
doubling each year. At the same time the average size, in
Process Management
terms of number of gates, of the integrated circuits has been
doubling every three years, while the clock period has been System Interprocess Communication
RTOS
steadily decreasing at just slightly lower pace. For example, Design
Memory Management
the state of the art general-purpose processor in 1971 (Intel
4004) had 2,300 transistors and had clock rate 0.1 MHz. I/O Management
Today the latest-generation processor, the Intel Pentium-II,
has 7.5 million transistors and a clock rate of 300 MHz 8.
These trends imply that, in each new generation of technol-
ogy, higher levels of hardware sharing are required, feasi- Architecture IC Design
ble, and economically desirable. FIGURE 1. RTOS: the backbone of new system-level design
process
From the qualitative point of view, new application are
characterized by high volume of data, cost sensitivity, and
very short market windows. Many popular applications, opers and compilation tools from one side and to architec-
such as wireless telephony, internet browsing, and video- ture and integrate circuits designs from the other. Our goal

Proceedings of the 1997 International Conference on Computer Design (ICCD '97)


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in this paper is to analyze opportunities and challenges 2.2 Systems-on-Silicon
posed by the emerging field. RTOS have been used in many
applications from car, ship, and airplane electronics to wire- Integrated circuits with 20 millions or more transistors
less and optical communication equipment, medical instru- allow truly significant systems, such as HDTV, video cam-
mentations, multimedia, internet, and even home coder, and software radio, to be placed on a single chip.
appliances, factory automation, process control, financial Systems-on-silicon may contain multiple CPUs, special-
transaction processing, and video games machines. purpose function units, and large amounts of embedded
RAM. They find important uses in areas as diverse as wire-
Even without strict space limitations of a conference paper, less, multimedia, and mechanotronics.
it would be impossible to provide a comprehensive survey
of RTOS research and industrial state-of-the-art. Rather Systems-on-silicon demand more careful design because
than aim for comprehensiveness, we focus attention on a design revisions are both costly and time-consuming. They
selected subset of key issues and key new directions which also require very high-quality software for several reasons:
characterize well emerging filed of RTOS for SOS. the software will definitely be hard to observe and therefore
debug due to pin limitations; the software may be hard to
The reminder of the paper is organized as follows. We first change after fabrication; and the hardware cannot be easily
very briefly summarize operating system basics. After that changed to accommodate software performance problems.
we summarize the key results from the traditional RTOS
research and discuss RTOS development efforts from the Design of systems-on-silicon pose many qualitatively new
industrial point of view. Next, we present some of the first problems such as intellectual property protection, debug-
RTOS behavioral and system-level synthesis efforts. We ging using incomplete information about hardware and/or
conclude by outlining the directions for the merging field of software, and one which we address here, a need for
system-on-silicon, in particular from RTOS point of view. embedded operating system layer.

2 Preliminaries 3 Traditional RTOS Research


In this section we briefly outline the basic facts about real-
time operating systems and systems-on-silicon. P1 P2 P4

2.1 [Real Time] Operating Systems Basics


P3 P5
An operating system is a system program which provides
an interface between application programs (an often a user)
and the computer hardware. They have two primary func- FIGURE 2. A pair of tasks.
tions: to make the computer system convenient to use and to
organize efficient and correct use of the computer A real-time operating system can supply many valuable
resources. There are four main tasks of an operating sys- functions to an embedded application, but the central pur-
tem: process management, interprocess communication pose of an RTOS is scheduling of the CPU. The application
and synchronization, memory management, and input/ is structured as a set of processes, each of which has its
output (I/O) management. The process management com- own program code and state consisting of register and
ponent is responsible for process creation, process loading memory values. The process is as well-known and almost
and execution control, the interaction of the process with universal model. Some operating systems support an addi-
signal events, process monitoring, CPU allocation and pro- tional level of structure known as the task. A task is a set of
cess termination. Interprocess communication covers issues processes with data dependencies between them, as shown
such as synchronization and coordination, deadlock and in Figure 2. This example contains two tasks—processes
livelock detection and handling, process protection, and which have no path of data dependencies between them are
data exchange mechanisms. Memory management includes in separate tasks. A process or task may be executed peri-
services for file creation, deletion, reposition, and protec- odically or aperiodically.
tion. I/O management handles request and release subrou-
tines for a variety of peripherals and read, write, and Processes and tasks generally have some sort of temporal
reposition programs. constraints on their behavior. The exact nature of these con-
straints depends on the scheduling model, but several types
Real-time systems are systems where the proper functional- of temporal measurements of process/task performance are
ity assumes both the correctness of the output as well as the used. A deadline is the time at which a process must finish
correct timing behavior of the system.

Proceedings of the 1997 International Conference on Computer Design (ICCD '97)


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execution after being initiated. The period of a periodic system meets all its deadlines under all conditions.
process or task is the interval between initiating successive
executions.
3.1 Recent Directions
The RTOS considers a process to be in one of three states:
waiting, ready, and executing. In a uniprocessor system, Recently, there has been a number of new RTOS- and
only one process can be executing at any time. Some pro- embedded system-related research results which open new
cesses may be waiting for data or other events. Processes rand important development directions. We mention only a
which are not blocked for external events but are not cur- subset of them: profile-based load balancing14, lottery
rently executing are considered ready. The transfer of exe- scheduling18, dynamic code generation19, embedding of
cution from one process to another is called a context security and authentication mechanisms17, jitter hiding20,
switch. To execute a context switch, the RTOS must save verification15, and CORBA-related efforts16.
the state of the old process, determine what process will Bestvarsos14 demonstrated significant advantages of using
next obtain the CPU, and then set the CPU state to that pro- the profile-based balancing over traditional balancing tech-
cess’s state. Context switch overhead is non-trivial but often niques for optimization of distributed soft real-time sys-
not a major factor in performance; scheduling policies, pro- tems. Set of promising scheduling technique which address
cess partitioning, memory performance, and other factors a number of important issues has been also developed by
are often more critical to obtaining good performance. utilizing randomization18. There has been also efforts to
Stankovic et al. provide a good survey of real-time schedul- ensure satisfaction of real-time constraints in object ori-
ing techniques4. There are several types of scheduling poli- ented CORBA, an important first step in development of
cies for real-time systems: real-time large software systems.

• A cooperative scheduler relies on the current process to Inferno, the real-time version of the Plan 9 operating sys-
give up the CPU before it can start the execution of tem from AT&T Bell Labs, is the first RTOS which pro-
another process. Cooperative multitasking is suitable for vides a number of cryptographic, authentication, and
extremely simple systems, such as digital filters with protection mechanism17. The first techniques for jitter hid-
purely periodic inputs, but is not used in sophisticated ing show significant advantages in handling relative small
embedded systems. variation in throughput rate20. Finally, a number of recent
studies shows that a great advantages in throughput,
• A static priority-driven scheduler can preempt the latency, and memory requirements can be achieved by
current process to start a new process. The highest-pri- applying the dynamic code generation techniques19.
ority ready process is always the currently executing
process. Priorities are set before the system begins exe- 4 Commercial RTOS Offerings
cution.
Leading estimates that a few tens of millions copies of
• A dynamic priority-driven scheduler can redefine the RTOS have been installed. Some of large RTOS industrial
process priorities at run time. The highest-priority ready players include Integrated Systems (pSOS Systems), Wind
process is still the currently-executing process, but since River Systems (VxWorks), Microtec Research (VRTX),
the RTOS can redefine priorities, the scheduling policy Microware Systems (OS-9), Spectron Microsystems
is embodied in the dynamic choice of priorities. (SPOX), QNX (QNX software), Hewlett-Packard (HP-RT),
The best-known static priority-driven scheduling methodol- Lynx Real-Time Systems (LynxOS). Among the most
ogy is rate-monotonic scheduling (RMS)3. Liu and Lay- notable recent entries include Lucent (Inferno) and Eonic
land showed that the optimal scheduling policy for one Systems (Virtouso RTOS). Recently Microsoft entered the
particular category of real-time systems is to assign priori- market with their Windows-CE embedded operating sys-
ties in inverse order of deadline—the shortest-deadline pro- tems. While Windows-CE does not directly address
cess receives the highest priority. requirements for real-time constraints, at least one company
already announce its real-time version.
A well-known dynamic priority-driven scheme is earliest-
deadline-first (EDF). This policy assigns priorities based While traditional academic RTOS research is dominated by
on the time left until each process reaches its deadline, with scheduling efforts, the industrial efforts have been mainly
the process facing the nearest deadline receiving the highest focused on optimization for three design metrics: memory
priority. EDF results in higher CPU utilization than is possi- requirements and two performance metrics: context switch
ble with RMS, but since priorities in an EDF system change time and interrupt latency. Table 1 shows area requirements
during execution, it is more difficult to prove that an EDF and delay for 3 different cache configuration and five differ-

Proceedings of the 1997 International Conference on Computer Design (ICCD '97)


0-8186-8206-X/97 $10.00 © 1997 IEEE
ent cache sizes obtained using the Flynn’s cache modeling omputers_and_Internet/Operating_Systems/Realtime

Organization Property 1KB 2KB 8KB 96KB 5 RTOS and [Computer Aided] Design
Direct Area (mm2
) 2.107036 3.807370 13.962853 161.704666 Research and Development
Mapped Latency (µ) 3.79491 3.97239 4.50642 6.78866
In this section, we survey the recent RTOS-related CAD
2-way Area (mm2) 2.385426 4.021449 13.799528 156.061787 efforts. The results are mainly due to an impetus provided
Latency (µ) 5.67454 5.74781 6.22891 8.53658 by two new important trends: hardware/software co-design
4-way Area (mm2
) 3.042479 4.645923 14.245449 154.000343 and synthesis techniques for systems-on-silicon.
Latency (µ) 6.04178 6.23715 6.57738 8.83248
Recent interest in hardware/software co-design5 has opened
TABLE 1. Cache Trade-offs
up new avenues in RTOS research. The ability to simulta-
tools11. Table 2 show features of some of the most popular neously design the hardware platform and software allows
microprocessor cores. Majority of RTOS have versions for new trade-offs and poses new challenges in system
which start from a few KB and go up to several MB. architecture. The move toward systems-on-silicon, moti-
vated by the ability to put one or more sophisticated CPUs
Clock Technolog Area Power diss. and embedded RAM on a single chip, will make RTOSs
Microprocessor core (MHz) MIPS y (µm) (mm2) (mW) (Volt.) increasingly important over the next several years. Good
StrongARM 233 266 0.35 4.3 300 (1.65) design and use of an RTOS can help increase the efficiency
ARM, 7 40 36 0.6 5.9 200 (5) with which scarce hardware resources are used, while a bad
ARM. 7 Low-Power 27 24 0.6 3.8 45 (3.3) RTOS can kill performance and reliability. And because
LSI Logic, TR4101 81 30 0.35 2 81 (3.3) systems-on-silicon are much harder and significantly more
LSI Logic, CW4001 60 53 0.5 3.5 120 (3.3) expensive to fix than printed circuit boards, performance
LSI Logic, CW4011 80 120 0.5 7 280 (3.3)
and reliability are at a premium.
DSP Group, Oak 80 80 0.6 8.4 190 (5) The RTOS CAD efforts can be classified in four groups:
NEC, R4100 40 40 0.35 5.4 120 (3.3) behavioral synthesis results, system-level synthesis results,
Toshiba, R3900 50 50 0.6 15 400 (3.3) design studies, and theoretical and simulation efforts.
Motorola, 68000 33 16 0.5 4.4 35 (3.3)
Potkonjak and Wolf addressed synthesis of a system of
PowerPC, 403 33 41 0.5 7.5 40 (3.3) multifunctional ASICs where individual tasks are under
TABLE 2. State of the art processor cores hard real-time constraints21. They also introduced a heuris-
Although, the state-of-the-art SRAM design reports state by tic approach for the design and optimization of ASIC
factor of 2 smaller area per KB of fast memory10,12,9 it is implementations which realize multiple computational
clear that in cost sensitive applications large RTOS imposes tasks under hard real-time constraints on a single multi-
high cost penalties. functional ASIC22. Kim et al. 20 developed a set of tech-
niques to minimize context switching time using the
The performance criteria, context switch time and interrupt behavioral synthesis techniques.
latency, are highly platform dependent. For 60 MHz com-
puters both metrics are usually a few microseconds. The System-level techniques can be grouped into two catego-
notable exception, with respect to all three metrics is the ries: uniprocessor and multiprocessor. One major trend in
Virtuoso RTOS which claims at least an order of magnitude next-generation embedded systems is multiprocessors
reduction for all of them. which may contain devices and special-purpose accelera-
tors as well as a CPU; although these devices may not be
The state-of-the-art RTOS usually provides about 16 or programmable, they still allow parallel execution that must
more scheduling priority levels, preemption mechanisms, be taken into account by the RTOS. Furthermore, many
several tasks scheduling algorithms (e.g. FIFO, round embedded systems include several CPUs, often of different
robin, rate monotonic, earliest deadline first), file and I/O types. Coordination between the processing elements in the
support, and a sets of utility programs (e.g. linkers, compil- system is essential for both performance and correctness.
ers, library managers, debuggers, and increasingly more
often visual interfaces). While there have been a high interest in the multiprocessor
real-time system-level synthesis, only a few efforts have
A good starting point for obtaining additional information been dedicated. Lee et al.1developed a synthesis algorithm
about commercial RTOS offerings are the following two which generates an application-based real-time multipro-
WWW sites: http://cs-www.bu.edu/pub/ieee-rts/ cessor. The algorithm uses a three-step synthesis methodol-
Home.html and http://msn.yahoo.com/msn/ ogy of resource allocation, assignment, and scheduling. Li

Proceedings of the 1997 International Conference on Computer Design (ICCD '97)


0-8186-8206-X/97 $10.00 © 1997 IEEE
and Wolf2 developed a hierarchical algorithm for schedul- work to compiler/RTOS based design methodology.
ing and allocating processes on a multiprocessor. The syn- Exploring the interaction between RTOS and system-level
thesis algorithm takes advantage of the task structure to synthesis of systems-on-silicon as well as between RTOS
efficiently schedule and allocate tasks to meet deadlines. and modern embedded real-life applications will be one of
Yen and Wolf addressed synthesis of distributed embedded the key issues in synthesis of systems using cores.
systems with both hard and soft deadlines13. While all hard
Technology, pricing and applications trends, in particular
deadline must be satisfied, the optimization goal is to sat-
emerging integration of DRAMs and processor logic and
isfy as many as possible soft deadlines. Recently, Kirovski
popularity of large data volume applications, will most
et al. proposed a combination of system-level and compila-
likely alleviate the industrial emphasis on RTOS size mini-
tion techniques for area minimization for a set of applica-
mization. On other hand, it is reasonable to expect that
tion being executed on core-based systems-on-silicon33.
switching time, and in particular latency, will stay as an
While there have been a large number of RTOS design stud- important design metrics.
ies and commercial products in several communities, a very
The increasing complexity of both hardware and software
limited efforts have been reported in design community.
will accentuate a strong need for both software and hard-
The most notable practical application of real-time schedul-
ware debugging. RTOS benchmarking will receive signifi-
ing approaches, and in particular rate-monotonic schedul-
cantly higher attention. Flexibility and scalability will be
ing algorithms, include the inclusion of rate-monotonic
important. Applications trends indicate that both security,
scheduling as the scheduling policy for the IEEE POSIX
privacy, authentication, and intellectual property protection
real-time operating system standard and IEEE Futurebus+
mechanisms as well as rich I/O features for interaction with
standards26,27,29, and the use of the generalized rate-mono-
sensors, actuators, and humans, will gain importance. Soft
tonic scheduling techniques in several major advance-tech-
real-time systems will also gain popularity.
nology projects such as Space Station Program and the
European Space Agency on-board operating system30. The There is also a need for adopting a new computational and
strong endorsement of several research and development hardware models which will form sound theoretical founda-
groups of the earliest-deadline-first and rate-monotonic tion for the new filed. New technical ideas, such as
scheduling as most suitable resource allocation policies for dynamic code generation and profile-based resource bal-
continuous media servers24,25,28 and ATM switch ancing, and robust implementation will be the key criteria
scheduling34 further emphasizes importance of this hard- for achieving the outlined goals. Finally, we note the mar-
real time scheduling approach. ket trends for other large system software market, indicat-
ing that most likely a very small number of RTOSs will
Before concluding our survey of the related research efforts
have a dominant share of the market.
with design methodology and algorithmic issues, we refer
to three recent publications in the CAD literature which
addressed use of the rate-monotonic scheduling algorithms. 7 Conclusions
Hu et al.31 compared several hard real time scheduling poli- Real-time operating systems have long been critical compo-
cies during hardware-software partitioning of the controller nents of embedded computing systems; with the advent of
for automotive powertrain module, but did not develop syn- systems-on-silicon, RTOSs are playing a major role in all
thesis approach or conduct any synthesis optimization. sorts of integrated circuits. The ability to simultaneously
Atlenbernd32 generalized deadline monotonic scheduling configure the operating system, applications, and underly-
policy along several lines, but also did not make connection ing hardware platform opens up new avenues for improved
to the synthesis process. Balarin et al. verified real-time real-time operating systems. We believe that the next few
operating system for an automatically controlled vehicle years will see continued substantial advances in real-time
using scalable models15. operating systems.

6 RTOS for Systems-on-Silicon: Future Acknowledgments


Directions
Li and Wolf’s work was supported by the National Science
In this Section we briefly outline our vision about future of Foundation under grant MIP-9424410. Potkonjak’s work
the RTOS research and development directions. As Bohr was supported by MICRO grant 96-182 and a grant from
said, it is difficult to predict, in particular future. Neverthe- the OKAWA Foundation.
less, it seems that some trends can be identified.
There is a pending change of behavioral and system level
synthesis efforts from the algorithm to architecture frame-

Proceedings of the 1997 International Conference on Computer Design (ICCD '97)


0-8186-8206-X/97 $10.00 © 1997 IEEE
References USENIX Symposium on Operating Systems Design and Imple-
1
mentation (OSDI), pp. 1-11, 1994.
Chunho Lee, Miodrag Potkonjak, and Wayne Wolf, “Synthesis 19
of hard real-time application specific systems,” in Proceedings, D.R. Engler, “ VCODE: a retargetable, extensible, very fast
Ninth ISSS, IEEE Computer Society Press, 1997. dynamic code generation system”, ACM SIGPLAN Programming
2
Language Design and Implementation, pp. 160-170, 1996.
Yanbing Li and Wayne Wolf, “Hierarchical scheduling and allo- 20
cation of multi-rate systems on heterogeneous multiprocessors,” in K. Kim, R. Karri, M. Potkonjak, “Micro-preemption synthesis:
Proceedings, ED&TC ‘97, IEEE Computer Society Press, 1997. an enabling mechanism for multi-task VLSI systems”, ICCAD,to
3
be published, 1997.
C. L. Liu and James W. Layland, “Scheduling algorithms for 21
multiprogramming in a hard-real-time environment,” JACM, M. Potkonjak, W. Wolf, “Cost optimization in ASIC implemen-
20(1), January 1973, pp. 46-61. tation of periodic hard-real time systems using behavioral synthe-
4
sis techniques”, IEEE/ACM International Conference on
John A. Stankovic, Marco Spuri, Marco Di Natale, and Giorgio Computer-Aided Design, pp. 446-451, 1995.
C. Buttazzo, “Implication of classical scheduling results for real- 22
time systems,” IEEE Computer, 28(6), June 1995, pp. 16-25. M. Potkonjak, W. Wolf, “Heuristic techniques for synthesis of
5
hard real-time DSP application specific systems”, IEEE Interna-
Wayne Wolf, “Hardware-software co-design of embedded sys- tional Conference on Acoustics, Speech, and Signal Processing
tems,” Proceedings of the IEEE, 82(7), July, 1994, pp. 967-989. Conference Proceedings, Vol. 2, pp. 1240-1243, 1996.
6
L. Gwennap, “Intel Fumbles MMX Transition”. Microproces- 23C.
Lee, M. Potkonjak, W. Wolf, “System-level synthesis of
sor Report, Vol. 11, No, 9, pp. 1, 6-8, July 14, 1997. application specific systems using A* search and generalized
7 force-directed heuristics”, International Symposium on System
Microprocessor Report, Vol. 11, No, 9, page 23, July 14, 1997.
8 Synthesis, pp. 2-7, 1996.
H. Sasaki, “Multimedia complex on a chip”, IEEE International
24R.
Solid-State Circuits Conference, pp. 16-19, 1996. Steinmetz, “Analyzing the multimedia operating system”,
9 IEEE Multimedia, Spring 1995, vol.2, (no.1):68-84.
G. Braceras, D. Evans, J. Sousa, J. Conner, “A 350 MHz 3.3 V 4
25D.I.
Mb SRAM fabricated in a 0.3 mu m CMOS process”, IEEE Inter- Katcher, K.A. Kettler, J.K. Strosnider, “Real-time operating
national Solid-State Circuits Conference, pp. 404-405, 1997. systems for multimedia processing”, Workshop on Hot Topics in
10 R.J. Operating Systems (HotOS-V). pp. 18-21, 1995.
Evans, P.D. Franzon, “Energy consumption modeling and
26IEEE,
optimization for SRAM’s”, IEEE Journal of Solid-State Circuits, “Real-Time extensions to POSIX”, IEEE Std. P. 1003.4,
Vol.30, No.5, pp. 571-579, 1995. IEEE, New York, NY, 1991.
11 M.J. 27IEEE,
Flynn, “Computer Architecture: Pipelined and Parallel “Futurebus+ Recommended Practice”, IEEE Std. 896.3,
Processor Design”, Jones and Bartlett, Boston, MA, 1996. (http:// IEEE, New York, NY, 1993.
umunhum.Stanford.EDU/tools/cachetools.html) 28R.
Nagarajan, C. Vogt, “Guaranteed Performance of Multimedia
12 K. Traffic over the Token Ring”, Tech. Report No. 439210, IBM-
Furumochi, et al., “A 500 MHz 288 kb CMOS SRAM macro
for on-chip cache”, IEEE International Solid-State Circuits Con- ENC, Heidelberg, Germany, 1992.
ference, pp. 156-157, 1996. 29L.
Sha, R. Rajkumar, J. Lehoczky, “Real Time Scheduling sup-
13 T.-Y. port in Futurebus+”, IEEE 11th Real-Time Systems Symposium,
Yen, W. Wolf. “Communication synthesis for distributed
embedded systems”, ICCAD ‘95, IEEE Computer press, 1995. pp. 331-340, 1990.
14. 30L.
Bestavros, “Load profiling: a methodology for scheduling real- Sha, R. Rajkumar, S.S. Sathaye: “Generalized Rate-Mono-
time tasks in a distributed system”, International Conference on tonic Scheduling Theory: A Framework for Developing Real-
Distributed Computing Systems, pp. 449-456, 1997. Time Systems”, Proc. of the IEEE, Vol. 82, No. 1, pp. 68-82, Janu-
15 F.Balarin, ary 1994.
K. Petty, A. Sengiovanni-Vincentello, P. Varaiya,
31X.
“Formal verification of the PATHO real-time operating system”, Hu, J.G. D’Ambrosio, B.T. Murray, D-L. Tang: “Codesign of
IEEE Conference on Decision and Control, Vol. 3, pp. 2459-2465, Architecture for Automotive Powertrain Modules”, IEEE MICRO,
1994. Vol. 14, No. 4, pp. 17-25, 1994.
16 D.C. 32P.
Schmidt, A.S. Gokhale, T.H. Harrison, G. Parulkar, “A Atlenbernd, “Deadline-Monotonic Software Scheduling for
high-performance end system architecture for real-time CORBA”, the Co-Synthesis of Parallel Hard Real- Time Systems”, pp. 190-
IEEE Communications Magazine, vol.35, (no.2):72-7, 1997. 195, EDAC-95, 1995.
17 S.M. 33D.
Dorward, et al., “The Inferno operating system”, Bell Kirovski, C. Lee, M. Potkonjak, W. Mangione-Smith,
Labs Technical Journal, vol.2, (no.1):5-18, 1997. “Application-driven synthesis of core-based systems”, to be pub-
18 Waldspurger, lished, 1997.
C.A.; Weihl, W.E. Lottery scheduling: flexible
34D.B.
proportional-share resource management. Proceedings of the First Schwartz, “ATM Scheduling with Queueing Delay Predic-
tions”, SIGCOMM’93 Communications Architectures, Protocols
and Applications, pp. 205-211, 1993.

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0-8186-8206-X/97 $10.00 © 1997 IEEE

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