Sanghvi Institute of Management & Science, Indore
Department of Electronics & Number of experiment Pg No.1/6
Communication Engineering Code: DE No.: 01 Roll No
Sub. Code: Sub. Name: Experiment No.:
Student’s Name: Batch: No. of Pages: Date:
Details of submissions & performance
Performing First Submission Second submission
Extra turn Regular turn
Remarks and Grade by tutor:
Cross Grade Exc VG G Fr M F Signature
EXPERIMENT: 01.
Aim: Analysis, Assembly & Testing of logic gates & Boolean algebra.
Objective:
Obj.1 Verification of truth table of all logic gates.
Obj.2 Verification of Boolean laws.
Obj.3 Implementation of Demorgan’s Theorem
Study Group.: Digital Electronics & Microsystems Code of exp. DE – 01
Created by: Mr. Aaquil Bunglowala
Date of creation: 30/12/2007 Approved by: Dr. A. K. Bharadwaj On
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Department of Electronics & Number of experiment Pg No.2/6
Communication Engineering Code: DE No.: 01 Roll No
Problem Statement:
3.1: To verify operation and truth table of all logic gates mentioned in table-1.
3.2: To verify Boolean laws mentioned in table-2 using table-1.
3.3: To logically verify all the laws mentioned in table-3 using table-1.
3.4: To implement Demorgan’s Theorem using gates mentioned in table-1 & verify their
truth tables.
3.5: To verify Duality theorem & compare it with basic Boolean laws mentioned in
table-1
Prerequisite:
4.1 Operation of all the Gates in the Trainer Board.
4.2 Knowledge of Boolean laws.
Apparatus Required:
5.1 Logic Gates trainer Board.
5.2 Connecting patch cords.
Report to be submitted:
6.1 Verified truth table of derived Boolean laws and Demorgan’s Theorem.
6.2 Logic Diagrams for Boolean laws & Demorgan’s Theorem.
6.3 Application of logic gates.
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Department of Electronics & Number of experiment Pg No.3/6
Communication Engineering Code: DE No.: 01 Roll No
Theory:
7.1 Logic Gates:
Digital circuits are also called digital logic because any Desired informationfor
computing or control can be operated upon by passing binary signals through various
combination of logic circuits, each signal representing a variable and carrying one bit of
information.
Logic circuits that can perform the logical operations are AND, OR and NOT. These are
the basic gates. The other gates derived from these basic gates are NAND, NOR, EX-
OR, EX-NOR. Boolean functions can be expressed in terms of AND,OR and NOT
operations.Summary of all the gates are shown in following table:
TABLE-1
NAME GRAPHIC SYMBOL FUNCTION TRUTH
TABLE
AND A B F
A
F
B F=AB 0 0 0
F=AB
0 1 0
1 0 0
1 1 1
OR A B F
A
F
B
F=A+B 0 0 0
F=A+B
0 1 1
1 0 1
1 1 1
INVERTER A F
A A'
F=A’ 0 1
F=A'
1 0
BUFFER A F
A A
0 0
F=A
F =A
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Department of Electronics & Number of experiment Pg No.4/6
Communication Engineering Code: DE No.: 01 Roll No
1 1
NAND A B F
A
F
B F=(AB)’ 0 0 1
F=(AB)'
0 1 1
1 0 1
1 1 0
NOR A B F
0 0 1
F=(A+B)’
0 1 0
1 0 0
1 1 0
EX-OR A B F
A
F
B F=A’B+AB’ 0 0 0
F =A'B+AB'
0 1 1
1 0 1
1 1 0
EX-NOR A B F
A
F
B 0 0 1
F =AB+A'B' F=AB+A`B`
0 1 0
1 0 0
1 1 1
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7.2 Boolean Algebra:
Boolean algebra is a Mathematical system that defines following laws:
TABLE-2
1. Basic Boolean Laws:
S.NO. OPERATION LAW EXAMPLES VERIFICATION
1. NOT (A’)’=A 0’=1 These can be verified
1’=0 from table-1.
2. AND (i) A.A’=0 A.0=0 These can be verified
(ii) A.A=A A.1=A from table-1.
3. OR (i)A+A’=1 A+0=A These can be verified
(ii) A+A=A A+1=1 from table-1.
TABLE-3
2. Derived Boolean Laws:
S.NO NAME LAWS VERIFICATION
1. Commutative law (i) X+Y = Y+X These can be verified
(ii) X.Y = Y.X from table-1.
2. Distributive law (i) A+ B.C = (A+B)(A+C) These can be verified
(ii) A(B+C) = AB+AC from table-1.
3. Associative law (i)X+(Y+Z) = (X+Y)+Z These can be verified
(ii)X.(YZ) = (XY).Z from table-1.
4. Absorption law (i)X+XY = X These can be verified
(ii)X(X+Y) = X from table-1.
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TABLE-4
Implementation of Boolean Laws:
S.No. NAME LAWS STEPS VERIFICATION
1. Demorgan’s (i) (X+Y)’=X’Y’ i. Complement These laws can be
Theorem (ii) (XY)’=X’+Y’ whole function. Implemented using
ii.Change each AND Gates given in
to OR & each OR to table-1 and hence
AND. can be verified
iii.Complement with respect to
individual variable. each operation.
2. Duality (i)(A.A’=0)=(A+A’=1) i.Change each AND
Theorem to OR & each OR to
(ii)(A.A=A)=(A+A=A) AND.
ii.Complement 1 or
0 appearing in
expression.
Investigations Expected:
8.1 What do you mean by Bit, Byte & Nibble?
8.2 What is a logic circuit & what do you mean by truth table?
8.3 Write statements of Demorgan’s 1st & 2nd theorem?
8.4 What do you mean by bubbled AND & bubbled OR Gate?
