Department of Computer Science, Government (ANKS) College, KTS

Haripur.
Computer Architecture and Assembly Language
Naeem Ahmed, Lecturer (CS)

1. Assembly language:
Assembly language is a low-level programming language for a computer or other programmable
device specific to a particular computer architecture in contrast to most high-level programming
languages, which are generally portable across multiple systems. Assembly language is converted
into executable machine code by a utility program referred to as an assembler like NASM, MASM,
etc.
Each personal computer has a microprocessor that manages the computer's arithmetical, logical,
and control activities. Each family of processors has its own set of instructions for handling various
operations such as getting input from keyboard, displaying information on screen and performing
various other jobs. These set of instructions are called 'machine language instructions'.
A processor understands only machine language instructions, which are strings of 1's and 0's.
However, machine language is too obscure and complex for using in software development. So,
the low-level assembly language is designed for a specific family of processors that represents
various instructions in symbolic code and a more understandable form.

2. Advantages of Assembly Language

 How programs interface with OS, processor, and BIOS;
 How data is represented in memory and other external devices;
 How the processor accesses and executes instruction;
 How instructions access and process data;
 How a program accesses external devices?
 It requires less memory and execution time;
 It allows hardware-specific complex jobs in an easier way;
 It is suitable for time-critical jobs;
 It is most suitable for writing interrupt service routines and other memory resident
programs.

3. Data Sizes
The processor supports the following data sizes:

 Word: a 2-byte data item

 Doubleword: a 4-byte (32 bit) data item
 Quadword: an 8-byte (64 bit) data item
 Paragraph: a 16-byte (128 bit) area
  Kilobyte: 1024 bytes
 Megabyte: 1,048,576 bytes

4. Binary Number System

Every number system uses positional notation, i.e., each position in which a digit is written has a
different positional value. Each position is power of the base, which is 2 for binary number
system, and these powers begin at 0 and increase by 1.

5. Hexadecimal Number System

Hexadecimal number system uses base 16. The digits in this system range from 0 to 15. By
convention, the letters A through F is used to represent the hexadecimal digits corresponding to
decimal values 10 through 15.
Hexadecimal numbers in computing is used for abbreviating lengthy binary representations.
Basically, hexadecimal number system represents a binary data by dividing each byte in half and
expressing the value of each half-byte.

Example − Binary number 1000 1100 1101 0001 is equivalent to hexadecimal - 8CD1

To convert a hexadecimal number to binary, just write each hexadecimal digit into its 4-digit
binary equivalent.

Example − Hexadecimal number FAD8 is equivalent to binary - 1111 1010 1101 1000

6. Addressing Data in Memory

The process through which the processor controls the execution of instructions is referred as the
fetch-decode-execute cycle or the execution cycle. It consists of three continuous steps

 Fetching the instruction from memory

 Decoding or identifying the instruction
 Executing the instruction
The processor may access one or more bytes of memory at a time. Let us consider a hexadecimal
number 0725H. This number will require two bytes of memory. The high-order byte or most
significant byte is 07 and the low-order byte is 25.
The processor stores data in reverse-byte sequence, i.e., a low-order byte is stored in a low
memory address and a high-order byte in high memory address. So, if the processor brings the
value 0725H from register to memory, it will transfer 25 first to the lower memory address and
07 to the next memory address.
When the processor gets the numeric data from memory to register, it again reverses the bytes.
There are two kinds of memory addresses −

 Absolute address - a direct reference of specific location.

 Segment address (or offset) - starting address of a memory segment with the offset value.

7. Assembly Language Sections:

An assembly program can be divided into three sections:
 The data section,
 The bss section, and
 The text section.

7.1. The data Section

The data section is used for declaring initialized data or constants. This data does not change at
runtime. You can declare various constant values, file names, or buffer size, etc., in this section.
The syntax for declaring data section is:
section.data

7.2. The bss Section

The bss section is used for declaring variables. The syntax for declaring bss section is

section.bss

7.3. The text section

The text section is used for keeping the actual code. This section must begin with the declaration
global _start, which tells the kernel where the program execution begins. The syntax for declaring
text section is:

section.text
global _start
_start:

8. Comments
Assembly language comment begins with a semicolon (;). It may contain any printable character
including blank. It can appear on a line by itself, like
; This program displays a message on screen

9. Assembly Language Statements

Assembly language programs consist of three types of statements:

 Executable instructions or instructions,

 Assembler directives or pseudo-ops, and
 Macros.

The executable instructions or simply instructions tell the processor what to do. Each instruction
consists of an operation code (opcode). Each executable instruction generates one machine
language instruction. The assembler directives or pseudo-ops tell the assembler about the various
aspects of the assembly process. These are non-executable and do not generate machine language
instructions. Macros are basically a text substitution mechanism.

10.Syntax of Assembly Language Statements

Assembly language statements are entered one statement per line. Each statement follows the
following format:

[label] mnemonic [operands] [;comment]

The fields in the square brackets are optional. A basic instruction has two parts, the first one is
the name of the instruction (or the mnemonic), which is to be executed, and the second are the
operands or the parameters of the command.

11.Memory Segments

A segmented memory model divides the system memory into groups of independent segments
referenced by pointers located in the segment registers. Each segment is used to contain a specific
type of data. One segment is used to contain instruction codes, another segment stores the data
elements, and a third segment keeps the program stack. In the light of the above discussion, we
can specify various memory segments as:

 Data segment: It is represented by .data section and the .bss. The .data section is used to
declare the memory region, where data elements are stored for the program. This section
cannot be expanded after the data elements are declared, and it remains static throughout
the program.
 The .bss section is also a static memory section that contains buffers for data to be
declared later in the program. This buffer memory is zero-filled.
 Code segment − It is represented by .text section. This defines an area in memory that
stores the instruction codes. This is also a fixed area.
 Stack − This segment contains data values passed to functions and procedures within the
program.
12. Registers

Processor operations mostly involve processing data. This data can be stored in memory and
accessed from thereon. However, reading data from and storing data into memory slows down the
processor, as it involves complicated processes of sending the data request across the control bus
and into the memory storage unit and getting the data through the same channel. To speed up the
processor operations, the processor includes some internal memory storage locations, called
registers. The registers store data elements for processing without having to access the memory.
A limited number of registers are built into the processor chip.

13. Processor Registers

There are ten 32-bit and six 16-bit processor registers in IA-32 architecture. The registers are
grouped into three categories:
 General registers,
 Control registers, and
 Segment registers.

The general registers are further divided into the following groups

 Data registers,
 Pointer registers, and
 Index registers.

13.1. Data Registers

Four 32-bit data registers are used for arithmetic, logical, and other operations. These 32-bit
registers can be used in three ways :
 As complete 32-bit data registers: EAX, EBX, ECX, EDX.
 Lower halves of the 32-bit registers can be used as four 16-bit data registers: AX, BX,
CX and DX.
 Lower and higher halves of the above-mentioned four 16-bit registers can be used as
eight 8-bit data registers: AH, AL, BH, BL, CH, CL, DH, and DL.
Some of these data registers have specific use in arithmetical operations.

 AX is the primary accumulator; it is used in input/output and most arithmetic

instructions. For example, in multiplication operation, one operand is stored in EAX or
AX or AL register according to the size of the operand.
 BX is known as the base register, as it could be used in indexed addressing.
 CX is known as the count register, as the ECX, CX registers store the loop count in
iterative operations.
 DX is known as the data register. It is also used in input/output operations. It is also
used with AX register along with DX for multiply and divide operations involving large
values.

13.2. Pointer Registers

The pointer registers are 32-bit EIP, ESP, and EBP registers and corresponding 16-bit right
portions IP, SP, and BP. There are three categories of pointer registers:

 Instruction Pointer (IP) − The 16-bit IP register stores the offset address of the next
instruction to be executed. IP in association with the CS register (as CS:IP) gives the
complete address of the current instruction in the code segment.
 Stack Pointer (SP) − The 16-bit SP register provides the offset value within the program
stack. SP in association with the SS register (SS:SP) refers to be current position of data
or address within the program stack.
 Base Pointer (BP) − The 16-bit BP register mainly helps in referencing the parameter
variables passed to a subroutine. The address in SS register is combined with the offset in
BP to get the location of the parameter. BP can also be combined with DI and SI as base
register for special addressing.

13.3. Index Registers

The 32-bit index registers, ESI and EDI, and their 16-bit rightmost portions. SI and DI, are used
for indexed addressing and sometimes used in addition and subtraction. There are two sets of
index pointers:

 Source Index (SI) − It is used as source index for string operations.

 Destination Index (DI) − It is used as destination index for string operations.

13.4. Control Registers

The 32-bit instruction pointer register and the 32-bit flags register combined are considered as
the control registers. Many instructions involve comparisons and mathematical calculations and
change the status of the flags and some other conditional instructions test the value of these
status flags to take the control flow to other location. The common flag bits are:

 Overflow Flag (OF) − It indicates the overflow of a high-order bit (leftmost bit) of data
after a signed arithmetic operation.
 Direction Flag (DF) − It determines left or right direction for moving or comparing
string data. When the DF value is 0, the string operation takes left-to-right direction and
when the value is set to 1, the string operation takes right-to-left direction.
 Interrupt Flag (IF) − It determines whether the external interrupts like keyboard entry,
etc., are to be ignored or processed. It disables the external interrupt when the value is 0
and enables interrupts when set to 1.
 Trap Flag (TF) − It allows setting the operation of the processor in single-step mode.
The DEBUG program we used sets the trap flag, so we could step through the execution
one instruction at a time.
 Sign Flag (SF) − It shows the sign of the result of an arithmetic operation. This flag is set
according to the sign of a data item following the arithmetic operation. The sign is
indicated by the high-order of leftmost bit. A positive result clears the value of SF to 0
and negative result sets it to 1.
 Zero Flag (ZF) − It indicates the result of an arithmetic or comparison operation. A
nonzero result clears the zero flag to 0, and a zero result sets it to 1.
  Auxiliary Carry Flag (AF) − It contains the carry from bit 3 to bit 4 following an
arithmetic operation; used for specialized arithmetic. The AF is set when a 1-byte
arithmetic operation causes a carry from bit 3 into bit 4.
 Parity Flag (PF) − It indicates the total number of 1-bits in the result obtained from an
arithmetic operation. An even number of 1-bits clears the parity flag to 0 and an odd
number of 1-bits sets the parity flag to 1.
 Carry Flag (CF) − It contains the carry of 0 or 1 from a high-order bit (leftmost) after an
arithmetic operation. It also stores the contents of last bit of a shift or rotate operation.

14. Segment Registers

Segments are specific areas defined in a program for containing data, code and stack. There are
three main segments:

 Code Segment − It contains all the instructions to be executed. A 16-bit Code Segment
register or CS register stores the starting address of the code segment.
 Data Segment − It contains data, constants and work areas. A 16-bit Data Segment
register or DS register stores the starting address of the data segment.
 Stack Segment − It contains data and return addresses of procedures or subroutines. It is
implemented as a 'stack' data structure. The Stack Segment register or SS register stores
the starting address of the stack.

Apart from the DS, CS and SS registers, there are other extra segment registers - ES (extra
segment), FS and GS, which provide additional segments for storing data. In assembly
programming, a program needs to access the memory locations. All memory locations within a
segment are relative to the starting address of the segment. A segment begins in an address evenly
divisible by 16 or hexadecimal 10. So, the rightmost hex digit in all such memory addresses is 0,
which is not generally stored in the segment registers.

The segment registers stores the starting addresses of a segment. To get the exact location of data
or instruction within a segment, an offset value (or displacement) is required. To reference any
memory location in a segment, the processor combines the segment address in the segment register
with the offset value of the location.

15.Addressing Modes

Most assembly language instructions require operands to be processed. An operand address

provides the location, where the data to be processed is stored. Some instructions do not require
an operand, whereas some other instructions may require one, two, or three operands. When an
instruction requires two operands, the first operand is generally the destination, which contains
data in a register or memory location and the second operand is the source. Source contains either
the data to be delivered (immediate addressing) or the address (in register or memory) of the data.
Generally, the source data remains unaltered after the operation. The three basic modes of
addressing are:

 Register addressing
  Immediate addressing
 Memory addressing

16.Register Addressing
In this addressing mode, a register contains the operand. Depending upon the instruction, the
register may be the first operand, the second operand or both.

For example,

MOV DX, TAX_RATE ; Register in first operand

MOV COUNT, CX ; Register in second operand
MOV EAX, EBX ; Both the operands are in registers

As processing data between registers does not involve memory, it provides fastest processing of
data.

17.Immediate Addressing
An immediate operand has a constant value or an expression. When an instruction with two
operands uses immediate addressing, the first operand may be a register or memory location, and
the second operand is an immediate constant. The first operand defines the length of the data.

For example,

BYTE_VALUE DB 150 ; A byte value is defined

WORD_VALUE DW 300 ; A word value is defined
ADD BYTE_VALUE, 65 ; An immediate operand 65 is added
MOV AX, 45H ; Immediate constant 45H is transferred to AX

18.Direct Memory Addressing

When operands are specified in memory addressing mode, direct access to main memory, usually
to the data segment, is required. This way of addressing results in slower processing of data. To
locate the exact location of data in memory, we need the segment start address, which is typically
found in the DS register and an offset value. This offset value is also called effective address. In
direct addressing mode, the offset value is specified directly as part of the instruction, usually
indicated by the variable name. The assembler calculates the offset value and maintains a symbol
table, which stores the offset values of all the variables used in the program. In direct memory
addressing, one of the operands refers to a memory location and the other operand references a
register.

For example,

ADD BYTE_VALUE, DL ; Adds the register in the memory location

MOV BX, WORD_VALUE ; Operand from the memory is added to register
19.Indirect Memory Addressing

This addressing mode utilizes the computer's ability of Segment:Offset addressing. Generally,
the base registers EBX, EBP (or BX, BP) and the index registers (DI, SI), coded within square
brackets for memory references, are used for this purpose.

Indirect addressing is generally used for variables containing several elements like, arrays.
Starting address of the array is stored in, say, the EBX register. The following code snippet
shows how to access different elements of the variable.

MY_TABLE TIMES 10 DW 0 ; Allocates 10 words (2 bytes) each initialized to 0

MOV EBX, [MY_TABLE] ; Effective Address of MY_TABLE in EBX
MOV [EBX], 110 ; MY_TABLE[0] = 110
ADD EBX, 2 ; EBX = EBX +2
MOV [EBX], 123 ; MY_TABLE[1] = 123

20.The MOV Instruction

We have already used the MOV instruction that is used for moving data from one storage space
to another. The MOV instruction takes two operands. The syntax of the MOV instruction is:

MOV destination, source

The MOV instruction may have one of the following five forms −

MOV register, register

MOV register, immediate
MOV memory, immediate
MOV register, memory
MOV memory, register

21. Constants

There are several directives provided by NASM that define constants. We have already used the
EQU directive in previous chapters. We will particularly discuss three directives:

 EQU
 %assign
 %define

21.1. The EQU Directive

The EQU directive is used for defining constants. The syntax of the EQU directive is as follows
CONSTANT_NAME EQU expression

For example,

TOTAL_STUDENTS equ 50

You can then use this constant value in your code, like:

mov ecx, TOTAL_STUDENTS

cmp eax, TOTAL_STUDENTS

The operand of an EQU statement can be an expression:

LENGTH equ 20
WIDTH equ 10
AREA equ length * width

21.2. The %assign Directive

The %assign directive can be used to define numeric constants like the EQU directive. This
directive allows redefinition. For example, you may define the constant TOTAL as:

%assign TOTAL 10

Later in the code, you can redefine it as:

%assign TOTAL 20

This directive is case-sensitive.

21.3. The %define Directive

The %define directive allows defining both numeric and string constants. This directive is
similar to the #define in C. For example, you may define the constant PTR as:

%define PTR [EBP+4]

The above code replaces PTR by [EBP+4]. This directive also allows redefinition and it is case-
sensitive.

22.The INC Instruction

The INC instruction is used for incrementing an operand by one. It works on a single operand
that can be either in a register or in memory.

Syntax

The INC instruction has the following syntax:

INC destination

The operand destination could be an 8-bit, 16-bit or 32-bit operand.

Example
INC EBX ; Increments 32-bit register
INC DL ; Increments 8-bit register
INC [count] ; Increments the count variable

23.The DEC Instruction

The DEC instruction is used for decrementing an operand by one. It works on a single operand
that can be either in a register or in memory.

Syntax

The DEC instruction has the following syntax −

DEC destination

The operand destination could be an 8-bit, 16-bit or 32-bit operand.

24.The ADD and SUB Instructions

The ADD and SUB instructions are used for performing simple addition/subtraction of binary
data in byte, word and doubleword size, i.e., for adding or subtracting 8-bit, 16-bit or 32-bit
operands, respectively.

Syntax

The ADD and SUB instructions have the following syntax:

ADD/SUB destination, source

The ADD/SUB instruction can take place between:

 Register to register
 Memory to register
 Register to memory
 Register to constant data
 Memory to constant data

However, like other instructions, memory-to-memory operations are not possible using
ADD/SUB instructions. An ADD or SUB operation sets or clears the overflow and carry flags.

25.The MUL/IMUL Instruction

There are two instructions for multiplying binary data. The MUL (Multiply) instruction handles
unsigned data and the IMUL (Integer Multiply) handles signed data. Both instructions affect the
Carry and Overflow flag.

Syntax

The syntax for the MUL/IMUL instructions is as follows −

MUL/IMUL multiplier

Multiplicand in both cases will be in an accumulator, depending upon the size of the
multiplicand and the multiplier and the generated product is also stored in two registers
depending upon the size of the operands.
26. The DIV/IDIV Instructions

The division operation generates two elements - a quotient and a remainder. In case of
multiplication, overflow does not occur because double-length registers are used to keep the
product. However, in case of division, overflow may occur. The processor generates an interrupt
if overflow occurs. The DIV (Divide) instruction is used for unsigned data and the IDIV (Integer
Divide) is used for signed data.

Syntax

The format for the DIV/IDIV instruction −

DIV/IDIV divisor

The dividend is in an accumulator. Both the instructions can work with 8-bit, 16-bit or 32-bit
operands. The operation affects all six status flags.

27. Logical Instructions

The processor instruction set provides the instructions AND, OR, XOR, TEST, and NOT
Boolean logic, which tests, sets, and clears the bits according to the need of the program.

The format for these instructions

The first operand in all the cases could be either in register or in memory. The second operand
could be either in register/memory or an immediate (constant) value. However, memory-to-
memory operations are not possible. These instructions compare or match bits of the operands and
set the CF, OF, PF, SF and ZF flags.

27.1. The AND Instruction

The AND instruction is used for supporting logical expressions by performing bitwise AND
operation. The bitwise AND operation returns 1, if the matching bits from both the operands are
1, otherwise it returns 0. For example −
 Operand1: 0101
Operand2: 0011
----------------------------
After AND -> Operand1: 0001

27.2. The OR Instruction

The OR instruction is used for supporting logical expression by performing bitwise OR operation.
The bitwise OR operator returns 1, if the matching bits from either or both operands are one. It
returns 0, if both the bits are zero.

For example,

Operand1: 0101
Operand2: 0011
----------------------------
After OR -> Operand1: 0111

27.3. The XOR Instruction

The XOR instruction implements the bitwise XOR operation. The XOR operation sets the
resultant bit to 1, if and only if the bits from the operands are different. If the bits from the
operands are same (both 0 or both 1), the resultant bit is cleared to 0.

For example,

Operand1: 0101
Operand2: 0011
----------------------------
After XOR -> Operand1: 0110

XORing an operand with itself changes the operand to 0. This is used to clear a register.

XOR EAX, EAX

27.4. The TEST Instruction

The TEST instruction works same as the AND operation, but unlike AND instruction, it does not
change the first operand. So, if we need to check whether a number in a register is even or odd,
we can also do this using the TEST instruction without changing the original number.

TEST AL, 01H

JZ EVEN_NUMBER

27.5. The NOT Instruction

The NOT instruction implements the bitwise NOT operation. NOT operation reverses the bits in
an operand. The operand could be either in a register or in the memory.

For example,

Operand1: 0101 0011

After NOT -> Operand1: 1010 1100

28. Conditions
Conditional execution in assembly language is accomplished by several looping and branching
instructions. These instructions can change the flow of control in a program. Conditional
execution is observed in two scenarios.

Unconditional jump

This is performed by the JMP instruction. Conditional execution often involves a transfer of
control to the address of an instruction that does not follow the currently executing instruction.
Transfer of control may be forward, to execute a new set of instructions or backward, to re-
execute the same steps.

Conditional jump

This is performed by a set of jump instructions j<condition> depending upon the condition. The
conditional instructions transfer the control by breaking the sequential flow and they do it by
changing the offset value in IP.

28.1. CMP Instruction

The CMP instruction compares two operands. It is generally used in conditional execution. This
instruction basically subtracts one operand from the other for comparing whether the operands
are equal or not. It does not disturb the destination or source operands. It is used along with the
conditional jump instruction for decision making.

Syntax
CMP destination, source

CMP compares two numeric data fields. The destination operand could be either in register or in
memory. The source operand could be a constant (immediate) data, register or memory. CMP is
often used for comparing whether a counter value has reached the number of times a loop needs
to be run.

28.2. Unconditional Jump

As mentioned earlier, this is performed by the JMP instruction. Conditional execution often
involves a transfer of control to the address of an instruction that does not follow the currently
executing instruction. Transfer of control may be forward, to execute a new set of instructions or
backward, to re-execute the same steps.

Syntax

The JMP instruction provides a label name where the flow of control is transferred immediately.
The syntax of the JMP instruction is:

JMP label

Example

The following code snippet illustrates the JMP instruction −

MOV AX, 00 ; Initializing AX to 0

MOV BX, 00 ; Initializing BX to 0
MOV CX, 01 ; Initializing CX to 1
L20:
ADD AX, 01 ; Increment AX
ADD BX, AX ; Add AX to BX
SHL CX, 1 ; shift left CX, this in turn doubles the CX value
JMP L20 ; repeats the statements

The JMP instruction can be used for implementing loops.

29.Numbers
Numerical data is generally represented in binary system. Arithmetic instructions operate on binary
data. When numbers are displayed on screen or entered from keyboard, they are in ASCII form.

29.1. ASCII Representation

In ASCII representation, decimal numbers are stored as string of ASCII characters. For example,
the decimal value 1234 is stored as:

31 32 33 34H

Where, 31H is ASCII value for 1, 32H is ASCII value for 2, and so on. There are four
instructions for processing numbers in ASCII representation −

 AAA − ASCII Adjust After Addition

 AAS − ASCII Adjust After Subtraction
 AAM − ASCII Adjust After Multiplication
 AAD − ASCII Adjust Before Division

These instructions do not take any operands and assume the required operand to be in the AL
register.
30.String Instructions

Each string instruction may require a source operand, a destination operand or both. For 32-bit
segments, string instructions use ESI and EDI registers to point to the source and destination
operands, respectively. For 16-bit segments, however, the SI and the DI registers are used to
point to the source and destination, respectively.

There are five basic instructions for processing strings. They are :

 MOVS − This instruction moves 1 Byte, Word or Doubleword of data from memory
location to another.
 LODS − This instruction loads from memory. If the operand is of one byte, it is loaded
into the AL register, if the operand is one word, it is loaded into the AX register and a
doubleword is loaded into the EAX register.
 STOS − This instruction stores data from register (AL, AX, or EAX) to memory.
 CMPS − This instruction compares two data items in memory. Data could be of a byte
size, word or doubleword.
 SCAS − This instruction compares the contents of a register (AL, AX or EAX) with the
contents of an item in memory.

Each of the above instruction has a byte, word, and doubleword version, and string instructions
can be repeated by using a repetition prefix. These instructions use the ES:DI and DS:SI pair of
registers, where DI and SI registers contain valid offset addresses that refers to bytes stored in
memory.

SI is normally associated with DS (data segment) and DI is always associated with ES (extra
segment). The DS:SI (or ESI) and ES:DI (or EDI) registers point to the source and destination
operands, respectively. The source operand is assumed to be at DS:SI (or ESI) and the destination
operand at ES:DI (or EDI) in memory. For 16-bit addresses, the SI and DI registers are used, and
for 32-bit addresses, the ESI and EDI registers are used.