KT24703 Computer Organization and Architecture
CPUSim - Program Execution Exercise
Simulate the hypothetical machine in Figure 3.4 and 3.5 in lecture slides. The addresses
where the instructions and data are stored in the memory may change.
Add three more registers to the machine; status, mar and mbr. The status register will hold
the status of the machine, the mar register is used to keep the address of the memory to
be accessed next, while mbr will hold the data fetched/ sent from/ to the memory.
Create three machine instructions as shown below:
0001 = Load AC from Memory
0010 = Store AC to Memory
0011 = Multiply AC by Memory
The length of the main memory is 2048 with the cell size of 16 bits.
The basic instruction execution cycle consists of two sub-cycles, which are fetch and
execute cycles. During fetch cycle, the following tasks are conducted:
1. Copy the content of pc into mar.
2. Fetch the content of memory cell where the address is stored in mar into mbr.
3. Copy the content of mbr into ir.
4. Increment pc by 1.
5. Decode ir.
The changes required from the lab tutorial is summarised below:
a) Registers
Rename ‘acc’ to ‘ac’
Rename ‘mdr’ to ‘mbr’
b) Microinstruction
Rename all microinstructions (if necessary) to reflect the updated register’s name
The steps involved in execute cycle, for each of the instruction, and its corresponding
opcodes are given in the table below.
Load, opcode = 1 Store, opcode = 2 Multiply, opcode = 3
1. Copy the address bits of 1. Copy the address bits of 1. Copy the address bits of
ir into mar. ir into mar. ir into mar.
2. Fetch the content of 2. Send the content of ac 2. Fetch the content of
memory cell where the into memory cell where memory cell where
address is stored in mar the address is stored in the address is stored
into mbr. mar. in mar into mbr.
3. Copy the content of 3. End. 3. Multiply the content of
mbr into ac. ac by mbr, store the
4. End. result in mbr (mbr = ac *
mbr).
4. End.
You are required to perform the following steps:
1. Create microinstructions for fetch and execute cycles based on the tasks given
above.
2. Create a new text file to store the assembly language to run the machine. Type the
following texts to your text file.
Start: load data2;
multiply data1;
store data1;
data1: .data 1 6 ;
data2: .data 1 2 ;
3. Save your file using the following format: Ch03Example-<your matric number>.a for
the assembly code file, and Ch03Example-<your matric number>.cpu for the
machine.
For example, if your matric number is 22222222, the file name has to be Ch03Example-
22222222.a and CH03Example-22222222.cpu.
4. Assemble and load your code by choosing Execute -> Assemble & Load.
5. You are expected to submit a written report with the following sections:
i. screenshot of your registers
ii. screenshot of your RAM
iii. screenshot of your machine instructions
6. Submit the simulated machine that you have created and saved in (3).
This is an individual exercise.
The work submitted must be your own. Copy and paste from fellow students will result in
zero marks being awarded to all students involved. Please be aware that copy and
paste is very obvious. Please also remember that you may be required to explain your
decisions in building the simulated machine .
The submission deadline is on the 25th November 2022 at 4.00 pm. Late penalty is applied
on this exercise. Each day late 5% (5 marks) will be deducted off your marks, given the
marks obtained by the students are not lower than 40 marks after the penalty is applied .
Exercises submitted after 5 days (Saturday and Sunday are excluded) will not be
accepted and zero marks will be given.
