Digital Circuits
What is a logic gate?
• An electronic circuit which makes logical
decisions.
• Have two or more inputs and only one output
except for the NOT gate, which has only one
input.
• Building blocks of hardware which are available
in the form of IC families.
Logic gates (cont.)
• Output signal appears only for certain
combinations of the input signals.
• Relationship between input and output
variables can be represented in a tabular
form called a TRUTH TABLE.
Basic Logic Gates
• NOT, AND, and OR Gates
• NAND and NOR Gates
• Exclusive-OR (XOR) Gate
• Exclusive-NOR (Ex-NOR) Gate
NOT Gate
• Performs inversion or complementation.
• When a HIGH level is applied to an
inverter, a LOW level appears at its output
and vice versa.
NOT Gate – Inverter
X Y
0 1
1 0
NOT
X ~X ~~X = X
X ~X ~~X
0 1 0
1 0 1
AND Gate
• Performs logical multiplication.
• Has two or more inputs and a single output.
• The output of an AND gate is HIGH only when all
the inputs are HIGH.
• Even if any one of the inputs is LOW, the output
will be LOW.
AND Gate
AND
X Y Z
X 0 0 0
0 1 0
Z
1 0 0
Y 1 1 1
Z = X & Y
OR Gate
• Performs logical addition.
• Has two or more inputs and a single output.
• The output of OR gate is HIGH when any of the
inputs is HIGH.
• Only when all the inputs are LOW, the output will
be LOW.
OR Gate
OR
X Y Z
X 0 0 0
Z 0 1 1
Y 1 0 1
1 1 1
Z = X | Y
NAND Gate
• Contraction of the NOT-AND gates.
• Has two or more inputs and a single output.
• When all the inputs are HIGH, the output is LOW.
• If any one or both the inputs are LOW, then the
output is HIGH.
NAND Gate
NAND
X Y Z
X 0 0 1
0 1 1
Z
1 0 1
Y 1 1 0
Z = ~(X & Y)
nand(Z,X,Y)
NAND Gate
NOT-AND
X Y W Z
X 0 0 0 1
W 0 1 0 1
Z
1 0 0 1
Y 1 1 1 0
W = X & Y
Z = ~W = ~(X & Y)
NOR Gate
• Contraction of the NOT-OR gates.
• Has two or more inputs and a single output.
• The output is HIGH only when all inputs are
LOW.
• If any one or both the inputs are HIGH, then the
output is LOW.
NOR Gate
NOR
X Y Z
X 0 0 1
Z 0 1 0
Y 1 0 0
1 1 0
Z = ~(X | Y)
nor(Z,X,Y)
NOR Gate
NOT-OR
X Y W Z
X 0 0 0 1
W Z 0 1 1 0
Y 1 0 1 0
1 1 1 0
W = X | Y
Z = ~W = ~(X | Y)
Exclusive-OR (Ex-OR) Gate
• Has two or more inputs and a single output.
• The output is HIGH if one and only one input
assumes a HIGH state i.e. if either input A or input
B is HIGH exclusively.
• The output is LOW when both are 1 or 0
simultaneously.
Exclusive-OR Gate
XOR X Y Z
X
Z 0 0 0
Y
0 1 1
Z = X ^ Y 1 0 1
xor(Z,X,Y)
1 1 0
Exclusive-NOR (Ex-NOR) Gate
• Ex-OR gate followed by an inverter.
• The output is HIGH if both the inputs assume the
same logic state.
• The output is LOW when the inputs assume
different logic states.
Boolean Laws
XNOR X Y Z
X
Z 0 0 1
Y
0 1 0
Z = ~(X ^ Y) 1 0 0
Z = X ~^ Y
1 1 1
xnor(Z,X,Y)
Boolean Laws
A+B=B+A
A. B = B. A
A+(B+C) = (A+B) +C
A(BC) = (AB) C
A(B+C)= AB + AC
Digital Circuits
Combinational Circuit
Output at any time depends only on the input
values at that time.
eg. Adder, Subtractor, Decoder, Encoder,
Multiplexer, Demultiplexer
Sequential Circuit
Output at any time depends only on the present
input values as well as the past values.
Half Adder
A half adder is the simplest digital adder. It is
combinational circuit that performs addition of
two binary digits.
It takes in two input bits, A (addend) and B
(augend).
Produces two output bits, the sum and the carry.
Truth Table for Half Adder
A B SUM CARRY
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Realisation of Half Adder
XOR
A 1
2
3
Sum
B
7486
AND
12
13
11
Carry
7408
Full Adder
A half adder lacks provision for carries from
preceding bits.
Full adders for binary numbers receive carries as
well as the added and augend as inputs.
The Full adder takes in three input bits, an addend
(A), an augend (B) and carry input (Cin) generated
by the previous stage addition.
It has two outputs, sum (S) and carry out (Cout).
Truth Table for Full Adder
A B Cin S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Realisation of Full Adder
Minterm and Maxterm
Minterm: Special type of product (AND) term.
Product term which contain all the input variables
that make up a Boolean expression.
Maxterm: Special type of OR term. Sum term which
contain all the input variables that make up a
Boolean expression.
Minterm
A product term containing all the K variables of
the function in either complemented or
uncomplemented from.
Eg. For a 2 variable function has four possible
combinations, A’B’, A’B,AB’,AB.
These product terms are called minterms or
standard products or fundamental products.
Minterm
Each minterm can be obtained by the AND operation of all
the variables of the function.
In a minterm, a variable appears either in uncomplemeted
form, if it possesses a value of 1 in the corresponding
combination or in complemented form, if it contains the
value of 0.
The minterms can be represented by mo, m1, m2 etc , the
suffix indicates the decimal code corresponding to the
minterm combination.
SOP and POS
SOP: Complete set of minterms that defines when an
output variable is a logical 1. Each minterm
corresponds to the row in the truth table when the
output function is 1.
POS: Complete set of maxterms that defines when an
output variable is a logical 0. Each minterm
corresponds to the row in the truth table when the
output function is 0.
Deriving Sum of Product (SOP) expression
from a truth table
• The SOP expression for a boolean function can be
derived from its truth table by summing (OR
operation) the product terms that correspond to
the combinations containing a function value “1”.
• In the product term, the input variable appears
either in uncomplemented from, if it possesses the
value of “1”, or in complemented form, if it
contains the value ‘0’.
General Procedure for obtaining output
expression in SOP form
• Give a product term for each input combination in
the table, containing an output value of 1.
• Each product term contains its input variables in either
complemented or uncomplemented form. In the
product term, the input variable appears either in
uncomplemented from, if it possesses the value of “1”,
or in complemented form, if it contains the value ‘0’.
• All the product terms are OR operated together in
order to produce the final SOP expression of the
output.
