16.
06 Lecture 24
Compensator Design
Karen Willcox
October 30, 2003
Today’s Topics
1. Phase-lead compensator design
2. Phase-lag compensator design
Reading: 6.6, 6.7
1 Phase-lead compensator design
We have the following system:
where
Consider the pole-zero diagram:
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Phase-lead compensation has a stabilizing effect.
At A1 , angle of plant =
At A2 , angle of plant + angle of compensator =
At A2 , angle of plant will be
So the compensator must contribute
From the triangle, we have
Now we can establish a design procedure.
2 Design Procedure
7 steps on handout.
3
insert phase-lead design procedure here
3 Phase-lead compensator design example
1
G(s) =
s(s + 2)
Design Gc (s) to meet the following closed-loop specifications:
(i) Dominant time constant should be 0.25 sec
(ii) P.O. for step response ≈ 16%
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• Step 1
Specifications imply:
Therefore, the dominant closed-loop poles are at
• Step 2 Angle condition:
• Step 3
Place zero at -4
• Step 4
tan 46.1◦ =
• Step 5
Magnitude condition:
Kc =
7
• Step 6
Gc G =
loop gain, K =
ess =
P.O. =
Third pole at
• Step 7
P.O. is too high.
Move zero and pole to the left and try again.
4 Phase-lag compensator design
The transfer function for phase-lag compensation is the same as for phase-
lead, but now z > p, so the pole is closer to the origin that the zero.
While phase-lead is stabilizing, phase-lag is often used to
The compensator transfer function is:
Gc (s) =
Draw the pole-zero diagram:
The pole-zero pair is added close to the origin, far from the desired closed-
loop poles. The vectors (s + z) and (s + p) from the pair to the desired poles
almost cancel each other, so that the net contribution to the vector angle is
small. Therefore, the loci change just a little in the region of interest.
Why use this compensation if the loci don’t change much? Consider the
compensator transfer function:
Gc (s) =
• The root locus gain is
• The gain used in the steady-state error calculation is
• By placing the pole much closer to the origin than the zero, we can
• But then we will have a closed-loop pole close to the origin (a slow
pole)! This is okay because
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The design procedure for a phase-lag compensator is as follows:
1. Draw the root loci for a proportional gain controller
2. Determine the desired position of the dominating pair of closed-loop
poles on these loci from the specifications.
3. Determine the root locus gain at the position (using the magnitude
condition) and hence the value of Kc for P-control.
4. For this value of Kc , determine the value of the factor z/p needed to
satisfy the specifications on steady-state accuracy.
5. Choose p and z with this ratio and close enough to the origin that the
vector angles to the dominant poles differ only a few degrees.
6. Draw the loci of the compensated system and find the dominating poles.
Reduce Kc if needed to counter any reduction of the relative stability.
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Phase-lag compensator design example:
1
G(s) =
s(s + 2)
Design Gc (s) to meet the following closed-loop specifications:
(i) ζ = 0.5
(ii) Steady-state error less than 5%
• Step 1
• Step 2
From specifications: closed-loop poles are at
• Step 3
Magnitude condition:
Kc =
12
• Step 4
Loop gain function is:
Loop gain is:
ess =
To satisfy error specification, must increase loop gain to
Therefore, z/p =
• Step 5
Choose
Gc =
Draw the new root locus:
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