Advanced Communication Lab 1

Experiments Manual

List of Experiments

1 Amplitude Modulation and Demodulation using IC AD633

2 DSB SC Modulation and Demodulation using IC AD633

3 Frequency Modulation and demodulation using PLL

4 Pre-Emphasis- De Emphasis Circuits

5 Verification of Sampling Theorem

6 PWM and PPM: Generation

7 Frequency Division Multiplexing and demultiplexing

8 Time Division Multiplexing and demultiplexing

9 Design of Mixer
Introduction to Analog Communication-
Communication is the transfer of information from one place to another. Radio
communication uses electrical energy to transmit information. The transmitted
information is the intelligence signal or message signal. Message signals are in the Audio
Frequency (AF) range of low frequencies from about 20 Hz to 20 kHz. The Radio
Frequency (RF) is the carrier signal. Carrier signals have high frequencies that range
from 10 kHz up to about 1000 GHz. A radio transmitter sends the low frequency
message signal at the higher carrier signal frequency by combining the message signal
with the carrier signal.
Modulation is the process of changing a characteristic of the carrier signal with the
message signal. In the transmitter, the message signal modulates the carrier signal.
The modulated carrier signal is sent to the receiver where demodulation of the
carrier occurs to recover the message signal.

IMPORTANT TERMS
• Electromagnetic waves - the radiant energy produced by oscillation of
an electric charge.
• Message signal - any signal that contains information; it is also called
the intelligence signal.
• Audio Frequency (AF) - frequencies that a person can hear. AF signals
range from about 20 Hz to 20 kHz.
• Radio Frequency (RF) - the transmission frequency of electromagnetic
(radio) signals. RF frequencies are from about 300 kHz to the 1,000,000
kHz range.
• Carrier signal - a single, high-frequency signal that can be modulated by
a message signal and transmitted.
• Modulation - the process of combining the message signal with the carrier signal
that causes the message signal to vary a characteristic of the carrier signal.

• Demodulation - the process of recovering or detecting the message signal from the
modulated carrier frequency.

• Amplitude Modulation (AM) - the process of combining the message signal with
the carrier signal and the two sidebands: the lower sideband and the upper
sideband.

• Frequency Modulation (FM) - the process of combining the message signal with
the carrier signal that causes the message signal to vary the frequency of the
carrier signal.

• Phase Modulation (PM) - the process of combining the message signal with the
carrier signal that causes the message signal to vary the phase of the carrier signal.

• Angle modulation - the process of combining the message signal with the carrier
 signal that causes the message signal to vary the frequency and/or phase of the
carrier signal.

• Balanced modulator - an amplitude modulator that can be adjusted to control the

amount of modulation.

• Double-Sideband (DSB) - an amplitude modulated signal in which the carrier is

suppressed, leaving only the two sidebands: the lower sideband and the upper
sideband.

• Mixer- an electronic circuit that combines two frequencies.

• Phase detector - an electronic circuit whose output varies with the phase
differential of the two input signals.

• Envelopes- the waveform of the amplitude variations of an amplitude

modulated signal.

• Sidebands - the frequency bands on each side of the carrier frequency that are
formed during modulation; the sideband frequencies contain the intelligence of the
message signal.

• AM - an amplitude modulated signal that contains the carrier signal and the
two sidebands: the lower sideband and the upper sideband.

• Bandwidth - the frequency range, in hertz (Hz), between the upper and lower
frequency limits.

• Harmonics - signals with frequencies that are an integral multiple of the

fundamental frequency.
 1. AM generation and Demodulation using AD633

Aim
To design and implement AM generation and demodulation using multiplier IC AD633.

Theory
DSB-SC is same as AM devoid of the carrier. In order to obtain the complete AM
waveform which is double side band with carrier, add the carrier signal to the DSB-
SC signal. This can be done using the 633 multiplier IC.

The resultant AM can be demodulated in two ways,

1. Using Diode envelope detector.
2. Using another AD633 in cascade with AM generating circuit for multiplying the AM with
the carrier.

Multiplying the AM with the carrier once again will result in the following output.
Thus, the signal consists of various frequencies of which, the smallest is the message
frequency. It can be extracted by filtering using a low pass filter. Since the amplitude of the
message frequency is very small, It may be amplified using a simple non-inverting amplifier
using an op-amp.

Design
Provide the supply voltage of +12 V to pin 8 of the IC and -12 V to pin 5 of the IC.
To the Y and Z inputs of the IC, feed the carrier sinusoid of amplitude Ec = 5 Vpp and frequency
fc = 50 kHz (It can be increased to 100 kHz)
To the X input of the IC, feed the message sinusoid of amplitude Em = 5 Vpp and frequency fm
= 1 kHz.
The output AM signal will have a waveform as given by,

Thus, it contains two sidebands and the carrier, i.e., Double sideband - Full Carrier AM.

Demodulation: Detection may be done using a diode envelope detector. An alternate method
of demodulation is by multiplying the AM signal once again with the carrier. This can be
implemented by connecting another AD633 IC in cascade with the first one.
The multiplication will result in the following output, as per the theory already explained.

This waveform is shown in Fig.2.3, which is the stage -1 in demodulation. The next step is to
obtain the message signal. This is done by lowpass filtering the above signal at a cut-off
frequency of 1.5 kHz.
To design an RC lowpass filter of cut-off frequency 1.5 kHz,

Choose C1 = 0.01 µF, R1 = 10 kΩ

A non-inverting amplifier may be used to amplify this signal. Using a feed- back
resistor of Rf = 100 kΩ
R
and an input resistance of Ri = 10 kΩ will result in a gain
i

of

Circuit Diagram
The circuit diagram for generating AM(DSB-FC) and demodulating it using AD633 multiplier
IC as shown in Fig.1.1.

Procedure
• Make connections as shown in the circuit diagram, fig.1.1.
• Feed the message and carrier signals.
• Connect the pin number 7 of the first IC to a CRO and observe the resultant waveform which
is AM(DSB-FC).
• Connect the pin number 7 of the second IC to a CRO and observe the resultant waveform
which is the product of DSB-FC and the carrier. (Named demodulation stage-1 signal)
• Observe the output from the filter, amplified by the op-amp amplifier, which extracts the
envelope of the signal-The 1kHz message signal.
• Plot the signals observed on a graph sheet.

Observation
The input and output signals as observed on a CRO are shown in Fig.1.2, 1.3 and 1.4.

Fig.1.1a: Circuit for AM generation using AD633 multiplier IC

 Fig 1.1b: AM detection using diode detector.
Note: Calculate the value of R1 and C1 based on frequency of the message signal.
(fm=1/(2*pi*R1*C1)

Fig 1.2: AM under-modulation and demodulation output (µ<1)

Fig1.3: AM over modulation and demodulation output (µ>1)

Fig 1.4: AM critical modulation output (µ=1)

 Note: Critical condition demodulation output also to be taken during lab, left as
exercise for students.

Observations
Table 1

Cases Em Ec m=Em/Ec %m Emax Emin 𝑬𝒎𝒂𝒙 − 𝑬𝒎𝒊𝒏 %m

𝒎=
(Theoretical) 𝑬𝒎𝒂𝒙 + 𝑬𝒎𝒊𝒏
(Volts) (Volts) (Theoretical) (volts) (Volts) (Practical)
(Practical)
Em<Ec

Em=Ec

Em>Ec

Result analysis
 2. DSB SC Modulation and Demodulation using IC AD633

Aim
To set up a balanced modulator circuit for double side band suppressed carrier
amplitude modulator. To implement a demodulator to obtain the message signal.

Theory
DSB-SC is a kind of amplitude modulation in which the carrier frequency com- ponent
is absent. It is generated by multiplying the carrier and modulating signals. If ec is the
carrier and em is the message signal, where

This wave contains both the sidebands at fc – fm and fc + fm, but not the wave at carrier
frequency. Hence the name double sideband suppressed carrier modulation (DSB-SC).

The following fig.2.1 shows the DSB-SC signal in blue and the original message is shown in
red. (It is an indicative graph, not to scale as per the experimental set-up.)
 Fig.2.1: DSB-SC signal in blue, original message shown in red.
The resultant AM can be demodulated in two ways,

1. Using Diode envelope detector.

2. Using another AD633 in cascade with AM generating circuit for
multiplying the AM with the carrier.

Multiplying the AM with the carrier once again will result in the following output.

Thus, the signal consists of various frequencies of which, the smallest is the message
frequency. It can be extracted by filtering using a low pass filter. Since the amplitude of the
message frequency is very small, It may be amplified using a simple non-inverting amplifier
using an op-amp.
Design
To the X input of the IC, feed the message sinusoid of amplitude, Em = 5 V (i.e., peak to peak
amplitude of 5 V) and frequency fm = 1 kHz. To the Y input of the IC, feed the carrier sinusoid
of amplitude Ec = 5 V and frequency fc = 50 kHz. (It can be increased to 100 kHz), Ground
the Z input of the IC.
Provide the supply voltage of +15 V to pin 8 of the IC and -15 V to pin 5 of the IC.
The output signal will have a waveform as given by,

Demodulation is by multiplying the DSB-SC signal once again with the carrier. This can be
implemented by connecting another AD633 IC in cascade with the first one. The
multiplication will result in the following output, as per the theory already explained.

This waveform is shown in Fig.2.3. The next step is to obtain the message signal. This is done
by lowpass filtering the above signal at a cut-off frequency of 1.5 kHz. To design an RC
lowpass filter of cut-off frequency 1.5 kHz,

Choose C1 = 0.01 µF ∴ R1 = 10 kΩ
 A non-inverting amplifier
R i
may be used to amplify this signal. Using a feed- back
resistor of Rf = 100 kΩ and an input resistance of Ri = 10 kΩ will result in a gain
of

Circuit Diagram
The circuit diagram for implementing DSBSC using multiplier IC is shown in fig.2.2.

Procedure
• Make connections as shown in the circuit diagram, fig.2.2.
• Feed the message and carrier signals.
• Connect the pin number 7 of the IC to a CRO and observe the resultant waveform which is
DSB-SC.
• Connect the pin number 7 of the second IC to a CRO and observe the resultant
waveform which is the product of DSB-SC and the carrier. (Named demodulation stage-1
signal)
• Observe the output from the filter, amplified by the op-amp amplifier, which extracts the
envelope -The 1kHz message signal- of the previous signal.
• Plot the signals observed on a graph sheet.

Observation
The input and output signals as observed on a CRO are shown in Fig.2.3.

Fig.2.2: Circuit for DSB-SC generation and detection using AD633 multiplier IC
 Fig.2.3: DSB-SC Modulation and demodulation output

Result analysis
 3. FM – Modulation and Demodulation using PLL IC 4046

Aim
To implement FM modulation and demodulation circuits using PLL IC CD4046

Theory
CD 4046 is an analogue Phase Locked Loop IC, whose characteristics and features are
discussed in Appendix. This IC can be used for FM modulation and demodulation.

FM Modulation
The VCO part of the PLL may be used for the frequency modulation of the carrier. In a
VCO, the output frequency is proportional to the control voltage input. In the absence of
control voltage, the free running frequency is determined by the supply voltage VCC, the
externally connected resistances R1 and R2 and the capacitance C. The free running frequency
f0 is given by

The VCO in free running mode is the carrier generator. The carrier frequency is f0. The
control input of the VCO is clamped at a voltage Vcc/2. The modulating signal voltage which
is less than Vcc/2 is applied at this pin through a capacitor. This results in variation in the
frequency of oscillation of the VCO, which is the frequency modulated signal.

FM Demodulation using PLL IC 4046

Another PLL IC has to be used for FM demodulation. The VCO part of this IC is configured
for the same free running frequency as that of the modulator IC. One of the phase detector
input is fed with the modulated FM signal and the other input of the phase detector is fed
with the VCO output after filtering out high frequency components. The phase variation
between the two will be corresponding to the message which was used for modulation. The
PD output is passed through an emitter follower internally to the demodulated output pin.
The output from this pin may contain high frequency ripples which may be eliminated by
proper filtering to obtain the actual message.

Design
Supply VCC = 5V at pin-16 and ground pin-8 of both PLL ICs.

Modulation
Use a voltage divider network of two resistors with R = 10 kΩ for clamping the control
voltage input (pin-9) at Vcc/2 = 2.5V.
Give a message signal of frequency 1kHz and amplitude 1 Vpp at control voltage input (pin-
9) through a capacitor of C1 = 1 µF.
Select R1 = 10 kΩ (pin-11), R2 = 100 kΩ (pin-12) and C = 0:002 µF (between pin-6 and pin-
7) so that free running frequency as per equation is given by,

The FM output is obtained from VCOout (pin-4) of first PLL IC.

Demodulation
Use the same R1, R2 and C for the second PLL IC so that the free running frequency remains
the same as that of the modulating IC. Feed the signal input pin of phase detector (pin-14)
of the second IC with the FM signal. The other input of phase detector (pin-3) is fed with
VCO output (pin-4). The output from phase detector(pin-2) is fed back to VCO input (pin-
9) through a low-pass filter with R3 = 10 kΩ and C1 = 0.01µF. The demodulated output is
obtained from the pin-10 by pulling down using a resistor Rp = 10 kΩ. It is then low pass
filtered at fc = 1:5kHz to eliminate higher order ripples.

Circuit Diagram
The circuit diagram for FM modulation and demodulation are shown in fig.3.1.

Procedure
• Make connections as per the circuit diagram.
• Provide dc supply and ground to the ICs.
• Observe the FM modulation and demodulation waveforms.
• Plot it on a graph sheet.

Observation
Plot the message, carrier, modulated and demodulated waves on a graph sheet.

Result analysis
Fig.3.1: Circuit for FM generation and detection using CD4046 PLL IC

Fig 3.2: Frequency modulation and demodulation output

 4. Pre-Emphasis - De Emphasis Circuits

Aim:

(i) To observe the effects of pre-emphasis on given input signal.

(ii) To observe the effects of De-emphasis on given input signal.

Theory:

The noise has an effect on the higher modulating frequencies than on the lower ones. Thus,
if the higher frequencies were artificially boosted at the transmitter and correspondingly cut
at the receiver, an improvement in noise immunity could be expected, thereby increasing the
SNR ratio. This boosting of the higher modulating frequencies at the transmitter is known
as pre-emphasis and the compensation at the receiver is called de-emphasis.
Circuit Diagrams:

For Pre-emphasis:

Fig.4.1: Pre-emphasis circuit

 For De-emphasis:

Fig.4.2: De-emphasis circuit

Procedure:

1. Connect the circuit as per circuit diagram as shown in Fig.4.1.

2. Apply the sinusoidal signal of amplitude 20mV as input signal to pre-emphasis circuit.
3. Then by increasing the input signal frequency from 500Hz to 20KHz, observe the
output voltage(vo) and calculate gain (20 log (vo/vi).
4. Plot the graph between gain Vs frequency.
5. Repeat above steps 2 to 4 for de-emphasis circuit (shown in Fig.4.2). by applying
the sinusoidal signal of 5V as input signal
Sample readings:

Table1: Pre-emphasis Vi = 20mV

Frequency (KHz) Vo (mV) Gain in dB (20 log Vo/Vi)

Table 2: De-emphasis Vi = 5v

Frequency (KHz) Vo (Volts) Gain in dB (20 log Vo/Vi)

 Graphs:

Precautions:

1. Check the connections before giving the power supply

2. Observation should be done carefully

Result analysis
 5. Verification of Sampling Theorem

Aim: To verify the sampling theorem.

Theory:

The analog signal can be converted to a discrete time signal by a process called
sampling. The sampling theorem for a band limited signal of finite energy can be
stated as,

‘’A band limited signal of finite energy, which has no frequency component higher
than W Hz is completely described by specifying the values of the signal at instants
of time separated by 1/2W seconds.’’

It can be recovered from knowledge of samples taken at the rate of 2W per second.

Circuit Diagram:

Fig. 5.1: Sampling Circuit

 Fig.5.2: Reconstructing Circuit

Procedure:

1. The circuit is connected as per the circuit diagram shown in the fig 5.1.

2. Switch on the power supply. And set at +11V and -11V.

3. Apply the sinusoidal signal of approximately 4V (p-p) at 105 Hz frequency

and pulse signal of 11V (p-p) with frequency between 100Hz and 4 KHz.
4. Connect the sampling circuit output and AF signal to the two inputs of oscilloscope

5. Initially set the potentiometer to minimum level and sampling frequency to

200Hz and observe the output on the CRO. Now by adjusting the
potentiometer, vary the amplitude of modulating signal and observe the
output of sampling circuit. Note that the amplitude of the sampling pulses
will be varying in accordance with the amplitude of the modulating signal.
6. Design the reconstructing circuit. Depending on sampling frequency, R & C
values are calculated using the relations Fs = 1/Ts, Ts = RC. Choosing an
appropriate value for C, R can be found using the relation R=Ts/C
7. Connect the sampling circuit output to the reconstructing circuit shown in Fig. 5.2

8. Observe the output of the reconstructing circuit (AF signal) for different
sampling frequencies. The original AF signal would appear only when the
sampling frequency is 200Hz or more.
 Fig 5.3: Sampling and reconstruction output (for fs=2fm)

Note: Kindly verify the sampling conditions, fs<2fm, fs=2fm and fs>2fm.
Result analysis
 6. PWM and PPM: Generation

Aim: To generate the pulse width modulated and demodulated signals

Theory:

Pulse Time Modulation is also known as Pulse Width Modulation or Pulse Length
Modulation. In PWM, the samples of the message signal are used to vary the duration of the
individual pulses. Width may be varied by varying the time of occurrence of leading edge,
the trailing edge or both edges of the pulse in accordance with modulating wave. It is also
called Pulse Duration Modulation.

In Pulse Position Modulation, both the pulse amplitude and pulse duration are held constant
but the position of the pulse is varied in proportional to the sampled values of the message
signal. Pulse time modulation is a class of signaling techniques that encodes the sample
values of an analog signal on to the time axis of a digital signal and it is analogous to angle
modulation techniques. The two main types of PTM are PWM and PPM. In PPM the analog
sample value determines the position of a narrow pulse relative to the clocking time. In PPM
rise time of pulse decides the channel bandwidth. It has low noise interference.

Circuit Diagram:

Fig. 6.1: Circuit diagram for Pulse width modulation (PWM)

 Fig. 6.2: Circuit diagram for Pulse Position modulation (PPM)

Procedure for PWM:

1. Connect the circuit as per circuit diagram shown in fig. 6.1.

2. Apply a sinusoidal signal as shown in the circuit diagram.
3. Observe the PWM signal at the pin3.

Procedure for PPM:

1. Connect the circuit as per circuit diagram shown in fig. 6.2.

2. Apply a PWM signal as input to PPM circuit as shown in the fig 6.2.
3. Observe the PPM signal at the pin 3.
Expected waveform

Fig 6.3: PWM and PPM outputs

Observations for PWM:

Control voltage Output pulse

S.No.
width (m sec)
(VP-P)

Max pulse duration: ________________ Min pulse duration: ______________________

Observations for PPM:

Time period(ms)
Modulating signal Total Time
Pulse width OFF
Amplitude (Vp-p) Pulse width ON (ms) period(ms)
(ms)

Result analysis
 7. FREQUENCY DIVISION MULTIPLEXING AND DEMULTIPLEXING

Aim: To construct the frequency division multiplexing and demultiplexing circuit

and to verify its operation

Theory:
When several communications channels are between the two same point’s
significant economics may be realized by sending all the messages on one
transmission facility a process called multiplexing. Applications of multiplexing
range from the vital, if prosaic, telephone networks to the glamour of FM stereo and
space probe telemetry system. There are two basic multiplexing techniques

1. Frequency Division Multiplexing (FDM)

2. Time Division Multiplexing (TDM)

The principle of the frequency division multiplexing is that several input messages
individually modulate the subcarriers fc1, fc2, etc. after passing through LPFs to
limit the message bandwidth. We show the subcarrier modulation as SSB, and it
often is; but any of the CW modulation techniques could be employed or a Mixture
of them. The modulated signals are then summoned to produce the baseband signal
with the spectrumXb9f), the designation “baseband” is used here to indicate that the
final carrier modulation has not yet taken place.

The major practical problem of FDM is cross talks, the unwanted coupling
of one message into another. Intelligible cross talk arises primarily because of non-
linearity’s in the system, which cause 1 message signal to appear as modulation on
subcarrier. Consequently, standard practice calls for negative feedback to minimize
amplifier non linearity in FDM systems
 Circuit diagram:

Fig 7.1: Frequency Division multiplexing and de-multiplexing

Expected Output

Fig. 7.2 FDM multiplexing and de multiplexing outputs

Procedure:

1. Connections are given as per the circuit diagram 7.1. Both the signals are given as
shown in the circuit diagram. (Keep 2Vpp for both the input signals)
2. The FDM signals are obtained with two different frequency pair with two different
generators.
3. The 2 signals are fed to op-amp which performs adder operation.
4. The filter is designed in such a way that low frequency signal is passed through the
HPF.
5. Observe the multiplexed output as well as demultiplexed outputs. Plot them in graph.

Result analysis
 8. Time Division Multiplexing (TDM)

Aim: To design, set up and study the working of a two-channel time division multiplexer.
Components and equipment required: IC 𝜇𝐴741, Transistors SL100 and SK100, resistors,
signal generator,CRO, breadboard, power supply and connecting wires.
Theory: The cost of communication line or channel is often very high and therefore it is
desired to send many information on the same channel. The scheme for sending several
information over a single channel such that signals can be separated at the receiver end
without distortion is known as multiplexing. So, the term multiplexing refers to the sharing
of communications resource.
In TDM, a set of switches operates at the transmitter in synchronism with another set of
switches at the receiver. Switches at the transmitter sample the input signals and send them
to the receiver through a channel. Switches at the receiver direct the signals to the
corresponding lines.

Circuit Diagram:

Fig.8.1: TDM modulation Circuit

Above figure shows the TDM circuit. It uses complementary transistors SL100 (n-p-n) and
SK100 (p-n-p) and an op-amp adder. During positive voltage of c(t), SL100 turns ON and
 message signal m1(t)gets grounded and message signal m2(t) appears at the input of adder
and at the op-amp output. During negative cycle of c(t), SK100 turns ON and message signal
m2(t) gets grounded and message signal m1(t) appears at the input of adder and at op-amp
output.

Demultiplexer Circuit: Below figure shows the demultiplexer. This circuit works in similar
manner.
Circuit Diagram:

Fig.8.2: TDM Demodulation Circuit

Expected Waveforms:

Fig.8.3: Three input waveforms m2(t), m1(t) and c(t)

 Fig.8.4: TDM output

Fig.8.5: Demultiplexer output

Procedure:

1. Connections are given as per the circuit diagram 8.1. Both the signals are given as
shown in the circuit diagram. (Keep 1.5Vpp for m1(t), m2(t) and 5 Vpp for c(t))
2. The TDM signal is obtained at the output.
3. Connect the TDM output to the demodulator circuit as shown in figure 8.2.

4. The TDM demodulated signal is obtained at the output.

5. Observe the outputs and draw the waveform.

Result Analysis
 9. Design of RF Mixer

Aim
To design and set up a frequency converter circuit to produce an output frequency (f0) which is
the difference frequency between the two input frequencies, (f1 – f2).

Theory
A mixer or frequency mixer is a nonlinear electrical circuit that creates new frequencies from
two signals applied to it. In its most common application, two signals at frequencies f1 and f2
are applied to a mixer, and it produces new signals at the sum f1 + f2 and difference f1 – f2 of
the original frequencies. Other frequency components (like f1 ± f2 may also be produced in a
practical frequency mixer. The most important applications of mixers are in superheterodyne
receivers where the very high carrier frequency is down converted to an intermediate
frequency. This is done by mixing the carrier frequency with a locally generated oscillator
frequency to get an output frequency which is the difference between local oscillator frequency
and incoming signal frequency, i.e., the intermediate frequency. In widely used AM receivers
the local oscillator frequency is so chosen with respect to carrier frequency such that their
difference is a constant intermediate frequency of 455kHz.

The mixer output which contains all image frequencies of f1 ± nf2 is filtered to obtain the
required difference frequency f1 – f2.

Design
Let the input at the base be 10kHz(f1) signal and at the emitter be 9 kHz(f2) signal such that the
output contains their sum and difference frequencies. The output can be low pass filtered to
obtain the difference frequency f1 – f2 = 1 KHz.
Choose Transistor BC107. Take VCC = 12V and IC = 2mA under dc biasing conditions.
For Class A mode of operation, let
VCE = 50% of VCC = 6V
VRC = 40% of VCC = 4:8V
VRE = 10% of VCC = 1:2V

Design of Emitter and Collector Resistors

Let the current through R1 be 10IB and that through R2 be 9IB such that IB flows through the
base of BC107.

Voltage across resistor R2 is,

Design of coupling capacitors

C1 = 1µF and CE = 0.1µF

Design of Filter Circuit

In order to lowpass filter the output signal choose the upper cut-off frequency be fo=1.5kHz so
that the required output 1 kHz appears in the pass band. The cut-off frequency of lowpass filter
is,
Circuit Diagram

Fig.9.1: Circuit Diagram for Mixer circuit using BJT

Procedure
1. Make connections as per the circuit diagram.
2. Feed f1 and f2 with amplitudes as shown in the circuit diagram and frequencies 10 kHz and
9 kHz respectively.
3. Observe the filtered output frequency on a CRO.
4. Repeat with frequencies changed to 20 kHz and 19kHz (50 kHz and 49 kHz) and observe it
in CRO. Verify that the circuit gives the difference frequency of 1 kHz at the output.
5. Plot the input and output signals on a graph sheet.
Observation
From the graph find the frequency of the output signal.

Result Analysis
Appendix A

Component Details
CONNECTION
AD633 Analog Multiplier DIAGRAMS
8-Lead Plastic DIP (N)
Package

Laser-Trimmed Accuracy and Stability X1 +VS

Total Error within 2% of FS
Differential High Impedance X and Y Inputs X2 W
High Impedance Unity-Gain Summing Input
Laser-Trimmed 10 V Scaling Reference Y1
10V
Z

APPLICATIONS
Multiplication, Division, Squaring Y2 –VS
Modulation/Demodulation, Phase Detection AD633JN/AD633AN
Voltage Controlled Amplifiers/Attenuators/Filters

8-Lead Plastic SOIC (RN-8) Package

PRODUCT DESCRIPTION Y1 1 8 X2
1 1
The AD633 is a functionally complete, four-quadrant,
analog multiplier. It includes high impedance, differential Y2 2 1 7 X1
10V
X and Y inputs and a high impedance summing input (Z).
The low impedance output voltage is a nominal 10 V full –VS 3 A 6
scale provided by a buried Zener. The AD633 is the first
product to offer thesefeatures in modestly priced 8-lead Z 4 5
plastic DIP and SOIC packages. The AD633 is laser AD633JR/AD633AR
calibrated to a guaranteed total accuracy of 2% of full scale. (X1 – X2) (Y1 – Y2)
W= +Z
Nonlinearity for the Y input is typically less than 0.1% and 10V
noise referred to the output is typically less than 100 V rms
in a 10 Hz to 10 kHz bandwidth. A 1 MHz band-width,
20 V/s slew rate, and the ability to drive capacitive loads
make the AD633 useful in a wide variety of applications
where simplicity and cost are key concerns.

The AD633’s versatility is not compromised by its simplicity. PRODUCT HIGHLIGHTS

The Z-input provides access to the output buffer amplifier, 1. The AD633 is a complete four-quadrant multiplier offered in
enabling the user to sum the outputs of two or more low cost 8-lead plastic packages. The result is a product that
multipliers, increase the multiplier gain, convert the output is cost effective and easy to apply.
voltage to a current, and configure a variety of applications. 2. No external components or expensive user calibration are
The AD633 is available in an 8-lead plastic DIP package required to apply the AD633.
(N) and 8-lead SOIC (R). It is specified to operate over the 3. Monolithic construction and laser calibration make the
0C to 70C commercial temperature range (J Grade) or the device stable and reliable.
–40C to 4. High (10 M) input resistances make signal source loading
+85C industrial temperature range (A Grade). negligible.
5. Power supply voltages can range from  8 V to  18 V. The
internal scaling voltage is generated by a stable Zener diode;
multiplier accuracy is essentially supply insensitive.
Ad633–specifications (TA = 25°C, VS = ±15 V, RL ≥ 2 kΩ)
Model AD633J, AD633A

TRANSFER FUNCTION W =
(X
1 )(
− X 2 Y1 − Y2 )+Z
10 V
Parameter Conditions Min Type Max Unit
MULTIPLIER PERFORMANCE
Total Error –10 V  X, Y  +10 V 1 ±2 % Full Scale
TMIN to TMAX 3 % Full Scale
Scale Voltage Error SF = 10.00 V Nominal  0.25% % Full Scale
Supply Rejection VS =  14 V to  16 V  0.01 % Full Scale
Nonlinearity, X X =  10 V, Y = +10 V  0.4 ±1 % Full Scale
Nonlinearity, Y Y =  10 V, X = +10 V  0.1 ±0.4 % Full Scale
X Feedthrough Y Nulled, X =  10 V  0.3 ±1 % Full Scale
Y Feedthrough X Nulled, Y =  10 V  0.1 ±0.4 % Full Scale
Output Offset Voltage 5 ±50 mV
DYNAMICS
Small Signal BW VO = 0.1 V rms 1 MHz
Slew Rate VO = 20 V p-p 20 V/s
Settling Time to 1%  VO = 20 V 2 s
OUTPUT NOISE
Spectral Density 0.8 V/Ǐz
Wideband Noise f = 10 Hz to 5 MHz 1 mV rms
f = 10 Hz to 10 kHz 90 V rms
OUTPUT
Output Voltage Swing ±11 V
Short Circuit Current RL = 0  30 40 mA
INPUT AMPLIFIERS
Signal Voltage Range Differential ±10 V
Common Mode ±10 V
Offset Voltage X, Y 5 ±30 mV
CMRR X, Y VCM =  10 V, f = 50 Hz 60 80 dB
Bias Current X, Y, Z 0.8 2.0 A
Differential Resistance 10 M
POWER SUPPLY
Supply Voltage
Rated Performance  15 V
Operating Range ±8 ±18 V
Supply Current Quiescent 4 6 mA
 ABSOLUTE MAXIMUM RATINGS
Supply Voltage.................................................................  18 V
Internal Power Dissipation ...........................................500 mW
Input Voltages ..................................................................  18 V
Output Short Circuit Duration ................................ Indefinite
Storage Temperature Range .......................... 65C to +150C
Operating Temperature Range
AD633J ................................................................ 0C to 70C
AD633A ...................................................... 40C to +85C
Lead Temperature Range (Soldering 60 sec) ................. 300C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1000 V

Temperature Package Package

Model Range Description Option
AD633AN –40C to +85C Plastic DIP N-8
AD633AR –40C to +85C Plastic SOIC RN-8
AD633AR-REEL –40C to +85C 13" Tape and Reel RN-8
AD633AR-REEL7 –40C to +85C 7" Tape and Reel RN-8
AD633JN 0C to 70C Plastic DIP N-8
AD633JR 0C to 70C Plastic SOIC RN-8
AD633JR-REEL 0C to 70C 13" Tape and Reel RN-8
AD633JR-REEL7 0C to 70C 7" Tape and Reel RN-8