Module 5:

Part :C
Q3) Design and implement 4-bit binary counter (using D flip flops)
which counts all possible odd numbers only?

Circuit Design of a 4-bit Binary Counter Using

D Flip-flops
Problem Statement:

Design a circuit for an edge triggered 4-bit binary up counter (0000 to 1111). When it reaches
“1111”, it should revert back to “0000” after the next edge. Use positive edge triggered D flip-flop
(shown in the below figure) to design the circuit.

Pin Input / Output Description

D Input Data Input
CLK Input Clock Input
Q<3:0> Output (4-bits) Count Output

Solution:

The flip flop to be used here to design the binary counter is D-FF.

Let’s draw the excitation table for the D-FF

 Present State (Q) Input (D) Next State (Q+)
0 0 0
0 1 1
1 0 0
1 1 1

The characteristic equation for the D-FF is: Q+ = D

We need to design a 4 bit up counter. So, we need 4 D-FFs to achieve the same.

Let’s draw the state diagram of the 4-bit up counter

Let’s construct the truth table for the 4-bit up counter using D-FF

Present State Next State

D3 D2 D1 D0
(Q3 Q2 Q1 Q0) (Q3+ Q2+ Q1+ Q0+)
0000 0001 0 0 0 1
0001 0010 0 0 1 0
0010 0011 0 0 1 1
0011 0100 0 1 0 0
0100 0101 0 1 0 1
 0101 0110 0 1 1 0
0110 0111 0 1 1 1
0111 1000 1 0 0 0
1000 1001 1 0 0 1
1001 1010 1 0 1 0
1010 1011 1 0 1 1
1011 1100 1 1 0 0
1100 1101 1 1 0 1
1101 1110 1 1 1 0
1110 1111 1 1 1 1
1111 0000 0 0 0 0

Now constructing the K-Maps and finding out the logic expressions for D3, D2, D1, D0

D3 D2

D3 = Q3Q2′ + Q3Q0′ + Q3Q1′ +

D2 = Q2Q0′ + Q2Q1′ + Q2’Q1Q0
Q3’Q2Q1Q0

D1 D0
 D1 = Q1’Q0 + Q1Q0′ = Q1 ⊕ Q0 D0 = Q0′

So, we found the value of D3, D2, D1, D0 in terms of Q3, Q2, Q1, Q0.

Let’s draw the designed circuit of the 4-bit up counter using D-FF
The counter output would be collected from Q3, Q2, Q1 and Q0.

Q4) How do you convert Jk- Flip Flop to SR- Flip Flop
Q5) How do you convert T- Flip Flop to SR- Flip Flop
Q7) Design a Modulo-12 up Synchronous counters using T-Flip
Flops and draw the Circuit diagram for synchronous mod-12 counter?
Q8) Explain the Ripple counter design. Also the decade counters design?
Q19) Differentiate between gated SR- latch and edge triggered SR- Flip Flop.
Q20) How do you convert Jk- Flip Flop to D- Flip Flop
Mod : 5

Part : B

Q9) Design a 3 bit ring counter? Discuss how ring counters differ from twisted
ring counter?
Q11) Design Johnson counter and state its advantages and disadvantages?
Q12) Explain with the help of a block diagram, the basic components of a
Sequential Circuit?
Module : 5
Part : C
Q1) Explain the JK and Master slave Flip-flop? Give its timing waveform?
Q2) Define JK – Flip-flop with the help of a logic diagram and characteristic table?
Q4) List the characteristic equations for RS,JK,T and data Flip- Flops?
Q6) Design a MOD-5 synchronous counter using flip flops and
Implement it? Also draw the timing diagram?
Q7) Design a Ring counter using JK flip-flop?
Q9) Design MOD5 up and Down counter
Q10) How do you convert Jk- Flip Flop to T- Flip Flop
Q5) Design a combinatorial circuit that converts a decimal digit from 2,4,2,1 code
to the 8,4,2,1 code
Module : 4
Part : B
Q2) Design a excess-3 adder using 4-bit parallel binary adder and logic gates. B)
What are the applications of full adders?
Q3) Explain the operation of 4 to 16 decoder.

Q4) Explain the differences between multiplexers and De-multiplexers with the
help of neat logic diagrams.
Q5) Design a 64:1 MUX using 8:1 MUXs.
Q8) Design a full adder using two half adders and OR gate.
Q7) Implement the given function in 4:1 mux f= Σm(0,1,3,5,6)

Module :3
Part: B
Q1) Explain error occurred in data transmission can be detected using parity bit
Q2) Define weighted codes and non weighted codes with examples
Q4) Explain the gray to binary and binary- to- gray conversion with examples
Q5) Explain the conversion of AND/OR/NOT logic to NAND/NOR logic with
example.

Individual logic gates can be connected together to form a variety of different

switching functions and combinational logic circuits. As we have seen throught
this Digital Logic tutorial section, the three most basic logic gates are
the: AND, OR and NOT gates, and given this set of logic gates it is possible to
implement all of the possible Boolean switching functions, thus making them a
“full set” of Universal Logic Gates.
By using logical sets in this way, the various laws and theorems of Boolean
Algebra can be implemented with a complete set of logic gates. In fact, it is
possible to produce every other Boolean function using just the set
of AND and NOT gates since the OR function can be created using just these
two gates. Likewise, the set of OR and NOT can be used to create
the AND function.
Any logic gate which can be combined into a set to realise all other logical
functions is said to be a universal gate with a complete logic set being a group
of gates that can be used to form any other logic function.
For example, AND and NOT constitute a complete set of logic, as
does OR and NOT as cascading together an AND with a NOT gate would give
us a NAND gate. Similarly cascading an OR and NOT gate together will
produce a NOR gate, and so on. However, the two functions
of AND and OR on their own do not form a complete logic set.
So by using these three Universal Logic Gates we can create a range of other
Boolean functions and gates. However, the NAND and NOR gates are
classed as minimal sets because they have the property of being a complete
set in themselves since they can be used individually or together to construct
many other logic circuits. Therefore we can define the complete sets of
operations of the main logic gates as follows:
 AND, OR and NOT (a Full Set)
 AND and NOT (a Complete Set)
 OR and NOT (a Complete Set)
 NAND (a Minimal Set)
 NOR (a Minimal Set)
Thus we can use these five sets of gates, together or individually as the
building blocks to produce more complex logic circuits called combinational
logic circuits. But first let us remind ourselves of the switching characteristics
of the three basic logic gates, AND, OR and NOT.

The AND Function

In mathematics, the number or quantity obtained by multiplying two (or more)
numbers together is called the product. In Boolean Algebra the AND function
is the equivalent of multiplication and so its output state represents the
product of its inputs. The AND function is represented in Boolean Algebra by a
single “dot” (.) so for a two input AND gate the Boolean equation is given
as: Q = A.B, that is Q equals both A AND B.

The 2-input Logic AND Gate

Symbol Truth Table

B A Q

0 0 0
 0 1 0

1 0 0

1 1 1

The OR Function
In mathematics, the number or quantity obtained by adding two (or more)
numbers together is called the sum. In Boolean Algebra the OR function is the
equivalent of addition so its output state represents the addition of its inputs.
In Boolean Algebra the OR function is represented by a “plus” sign (+) so for a
two input OR gate the Boolean equation is given as: Q = A+B, that is Q equals
either A OR B.

The 2-input Logic OR Gate

Symbol Truth Table

B A Q

0 0 0

0 1 1

1 0 1
 1 1 1

The NOT Function

The NOT gate, which is also known as an “inverter” is given a symbol whose
shape is that of a triangle pointing to the right with a circle at its end. This
circle is known as an “inversion bubble”.
The NOT function is not a decision making logic gate like the AND,
or OR gates, but instead is used to invert or complement a digital signal. In
other words, its output state will always be the opposite of its input state.
The NOT gate symbol has a single input and a single output as shown.

The Logic NOT Gate

Symbol Truth Table

A Q

0 1

1 0

The single input NOT gate or invert function can be cascaded with itself to
produce what is called a digital buffer. The first NOT gate will invert the input
and the second will re-invert it back to its original level performing a double
inversion of the single input. Non-inverting Digital Buffers have many uses in
digital electronics as this double inversion of the input can be used to provide
digital amplification and circuit isolation.

Using the AND and NOT Set

Using just the AND and NOT set of logic gates we can create the following
Boolean functions and equivalent gates.

AND/NOT Set Equivalents

Using the OR and NOT Set

Using the OR and NOT set of logic gates we can create the following Boolean
functions and equivalent gates.
OR/NOT Set Equivalents

Using the Full AND, OR and NOT Set

Using the full AND, OR and NOT set of logic gates we can create the Boolean
expressions for the Exclusive-OR (Ex-OR) and the NOT Exclusive-OR (Ex-
NOR) gates as shown.
Full AND/OR/NOT Set to Implement Ex-OR

Full AND/OR/NOT Set to Implement Ex-NOR

Note that neither the Exclusive-OR gate or the Exclusive-NOR gate can be
classed as a universal logic gate as they can not be used on their own or
together to produce any other Boolean function.
Universal Logic Gates
One of the main disdvantages of using the complete sets
of AND, OR and NOT gates is that to produce any equivalent logic gate or
function we require two (or more) different types of logic gate, AND and NOT,
or OR and NOT, or all three as shown above. However, we can realise all of
the other Boolean functions and gates by using just one single type of
universal logic gate, the NAND (NOT AND) or the NOR (NOT OR) gate,
thereby reducing the number of different types of logic gates required, and
also the cost.
The NAND and NOR gates are the complements of the
previous AND and OR functions respectively and are individually a complete
set of logic as they can be used to implement any other Boolean function or
gate. But as we can construct other logic switching functions using just these
gates on their own, they are both called a minimal set of gates. Thus
the NAND and the NOR gates are commonly referred to as Universal Logic
Gates.

Implementation of Logic Functions Using Only NAND Gates

The 7400 (or the 74LS00 or 74HC00) quad 2-input NAND TTL chip has four
individual NAND gates within a single IC package. Thus we can use a single
7400 TTL chip to produce all the Boolean functions from a NOT gate to
a NOR gate as shown.
Logic Gates using only NAND Gates

Thus ALL other logic gate functions can be created using only NAND gates
making it a universal logic gate.

Implementation of Logic Functions Using Only NOR Gates

The 7402 (or the 74LS02 or 74HC02) quad 2-input NOR TTL chip has four
individual NOR gates within a single IC package. Thus like the previous 7400
NAND IC we can use a single 7402 TTL chip to produce all the Boolean
functions from a single NOT gate to a NAND gate as shown.
Logic Gates using only NOR Gates

Thus ALL other logic gate functions can be created using only NOR gates
making it also a universal logic gate.
Q6) Explain Self complemented codes.

Self Complementing Codes:

Self-complementing binary codes are those whose members complement on themselves. For a
binary code to become a self-complementing code, the following two conditions must be
satisfied:
 1. The complement of a binary number should be obtained from that number by replacing 1’s with
0’s and 0’s with 1’s (already stated procedure).
2. The sum of the binary number and its complement should be equal to decimal 9.

The following example will illustrate this procedure.

The Excess-3 (Xs-3) Code

Let us now consider the excess-3 (Xs-3) binary coding system. An Xs-3 equivalent of a given
binary number is obtained using the following steps:

1. Find the decimal equivalent of the given binary number.

2. Add +3 to the decimal equivalent obtained in 1.
3. Convert the newly obtained decimal number back to binary number to get the desired Xs-3
equivalent.

Following the steps given above, we draw Table 1.24, which shows the binary and Xs-3
equivalents.

Table Xs-3 binary codes

Binary Decimal Decimal +3 Xs-3

numbers equivalent equivalent
0000 0 3 0011
0001 1 4 0100
0010 2 5 0101
0011 3 6 0110
0100 4 7 0111
0101 5 8 1000
0110 6 9 1001
0111 7 10 1010
1000 8 11 1011
1001 9 12 1100

Example 1: Prove that Xs-3 code is a self-complementing code.

Solution: Consider the Xs-3 number 0101. From Table, we obtain 0101 ≡ decimal 2. Its
complement (by changing 1s to 0s and vice versa) is 1010. From Table, we find that decimal
equivalent of 1010 is 7. Now adding the decimal equivalents of 0101 (≡2) and 1010 (≡7) yields
decimal 9. It can be seen that all the numbers in Xs-3 code obeys this condition. Then by
condition, Xs-3 code is a self-complementing code.

The 8-4-2-1 Binary Weighted (or, Conventional) Code

 In the decimal number system, we know that (123)10 = 1× 10 + 2× 10 +3× 10 , where 10 , 10 ,
2 21 0 2 1

and 10 are the positional weights (or simply, weights) of the coefficients 1, 2, and 3,
0

respectively. In the same fashion, we may express (1011)2 = 1× 2 + 0× 2 +1× 2 +1×

3 2 1

2 . The weights of 1, 0, 1, and 1 are, respectively, 2 = 8, 2 = 4, 2 = 2, and 2 = 1. Since the

0 3 2 1 0

positional weights are 8, 4, 2, and 1, we call the conventional binary system as the 8-4-2-1
binary number system also. We multiply the bits in a given binary number with their respective
weights and add them to yield their decimal equivalent. For example, we have seen that 1011 =
1× 8 + 0× 4 +1× 2+1× 1 = (11)10. In Example 2, we prove that the 8-4-2-1 code is not a self-
complementing code.

Example 2: Prove that the conventional binary code is not a self-complementing code.

Solution: To illustrate this, consider binary number 1011, whose 1’s complement is 0100. We
know that (1011)2  (11)10 and (0100)2  (4)10. Now, the sum of (11)10 + (4)10 = (15)10, and not
(9)10. Therefore, we conclude that 1011 and 0100 are not complementary numbers and hence,
the conventional binary code is not a self-complementing code.

The 2-4-2-1 Binary Weighted Code

Example 25: Prove that 2-4-2-1 code is a self-complementing code.

Solution: The basic members of this family are given in Table. The bits in each of the binary
numbers given in the first column may be multiplied with their respective weights to get the
equivalent decimal in the second column. For example, number 1011 has its equivalent decimal
as 5. This is obtained as follows:

1011 = 1× 2 + 0×4+1× 2 +1= 2 + 2 + 1 = 5

All the other decimal equivalents can be similarly obtained.

Table: The 2-4-2-1 code

2-4-2-1 Code Decimal

equivalent
0000 0
0001 1
0010 2
0011 3
0100 4
1011 5
1100 6
1101 7
1110 8
1111 9
Now, consider number (1011)2 ≡ (5)10 in Table again. The complement
of 1011 is 0100. From Table 1.25, we obtain the decimal equivalent of 0100 as 4.
Adding 5 and 4 yields 9. Hence, we conclude that the 2-4-2-1 code exhibits the
necessary property of self-complementing codes. In similar fashions, we can prove that
all the other numbers of this coding scheme also exhibit this property. Therefore we
conclude that the 2-4-2-1 code is a self-complementing code.

Q7) Differentiate between BCD code and 2421 code and XS-3.

Q8) Given the 8bit data word 01011011, generate the 12 bit composite word for
the hamming code that corrects and detects single errors
Q9) Write the first 10 decimal digits in base 3 and base 16.
Q10) A device transmits the binary data using even parity, the message is 1011001.
Identify the receiver receives the correct data or not.
Q11) Convert the given expression in standard POS form Y= (A+B)(B+C)(A+C).
Q12) Obtain the canonical SOP form of the following functions. i) Y(A,B) = A+B.
ii) Y(A,B,C,D) = AB+ACD

II)

Solve the problem by referring above example.

Q15) Simplify the following 3 variable expression using Boolean algebra Y=

Σm(1,3,5,7).
Q14) Simplify the following 3 variable expression using Boolean algebra Y=
ΠM(3,5,7).

Module 3:
Part : C
Q1) Convert the following Hexadecimal number to their Decimal equivalent
(EAF1)16.

Q2) What is the gray code equivalent of the Hex Number 3A7.

Q2) Find 9’s complement of (25.639)10.

Q3) Find 7 bit hamming code for given message 1010 by using odd parity.

Q4) Perform the subtraction using 1’s complement and 2’s complement

i) (11010)2 – (10000)2
ii) (1000100)2 – (1010100)2

Q5) Convert following hexadecimal number to decimal,

i) F2816 ii) BC216

Q6) Implement Y= Y= AB’+A’ B using 2 input NAND gates

Q4) Implement Y= AB’+A’ B using 2 input NOR gates
Q5) Realize X-OR operation a)NAND gate b)NOR gate
Q1) Give the Boolean expressions, symbols and truth tables for following gates,
i) AND ii) NOR iii) EX-OR iv) OR v) EX-NOR.
Q2) Realize all the logic gates using NAND gate.
Q3) Realize all the logic gates using NOR gate.
Q4) Explain standard SOP and POS forms with examples
 Module:3
Part:C

Q1) Convert the following Hexadecimal number to their Decimal equivalent

(EAF1)16.

Q2) What is the gray code equivalent of the Hex Number 3A7. Find 9’s
complement of (25.639)10.
Q5) Convert following hexadecimal number to decimal, i) F2816 ii) BC216
Q4) Perform the subtraction using 1’s complement and 2’s complement
i) (11010)2 – (10000)2
ii) (1000100)2 – (1010100)2
Q5) State and prove Boolean theorems and properties.
Module : 2
Part : B
Q2) Define Early-effect; Explain why it is called as base-width modulation?
Discuss its consequences in transistors in detail?
Q3) What is thermal runaway in transistors? Obtain the condition for thermal
stability in transistors?
Q12) Draw the small-signal model of common base BJT amplifier. Derive
expressions for voltage gain, input resistance current gain and output resistance?

The Common Base Amplifier is another type of bipolar junction transistor,

(BJT) configuration where the base terminal of the transistor is a common
terminal to both the input and output signals, hence its name common
base (CB). The common base configuration is less common as an amplifier
than compared to the more popular common emitter, (CE) or common
collector, (CC) configurations but is still used due to its unique input/output
characteristics.
For the common base configuration to operate as an amplifier, the input signal
is applied to the emitter terminal and the output is taken from the collector
terminal. Thus the emitter current is also the input current, and the collector
current is also the output current, but as the transistor is a three layer, two pn-
junction device, it must be correctly biased for it to work as a common base
amplifier. That is the base-emitter junction is forward-biased.
Consider the basic common base amplifier configuration below.
Common Base Amplifier using an NPN Transistor

Then we can see from the basic common base configuration that the input
variables relate to the emitter current IE and the base-emitter voltage, VBE,
while the output variables relate to the collector current IC and the collector-
base voltage, VCB.
Since the emitter current, IE is also the input current, any changes to the input
current will create a corresponding change in the collector current, IC. For a
common base amplifier configuration, current gain, Ai is given as iOUT/iIN which
itself is determined by the formula IC/IE. The current gain for a CB configuration
is called Alpha, ( α ).
In a BJT amplifier the emitter current is always greater than the collector
current as IE = IB + IC, the current gain (α) of the amplifier must therefore be
less than one (unity) as IC is always less than IE by the value of IB. Thus the CB
amplifier attenuates the current, with typical values of alpha ranging from
between 0.980 to 0.995.
The electrical relationship between the three transistor currents can be shown
to give the expressions for alpha, α and Beta, β as shown.
Common Base Amplifier Current Gain

Therefore if the Beta value of a standard bipolar junction transistor is 100,

then the value of Alpha would be given as: 100/101 = 0.99.

Common Base Amplifier Voltage Gain

Since the common base amplifier can not operate as a current amplifier
(Ai ≅ 1), it must therefore have the ability to operate as a voltage amplifier.
The voltage gain for the common base amplifier is the ratio of VOUT/VIN, that is
the collector voltage VC to the emitter voltage VE. In other words, VOUT = VC and
VIN = VE.
as the output voltage VOUT is developed across the collector resistance, RC, the
output voltage must therefore be a function of IC as from Ohms
Law, VRC = IC*RC. So any change in IE will have a corresponding change in IC.
Then we can say for a common base amplifier configuration that:

As IC/IE is alpha, we can present the amplifiers voltage gain as:

Therefore the voltage gain is more or less equal to ratio of the collector
resistance to the emitter resistance. However, there is a single pn-diode
junction within a bipolar junction transistor between the base and emitter
terminals giving rise to what is called the transistors dynamic emitter
resistance, r’e.

For AC input signals the emitter diode junction has an effective small-signal
resistance given by: r’e = 25mV/IE, where the 25mV is the thermal voltage of
the pn-junction and IE is the emitter current. So as the current flowing through
the emitter increases, the emitter resistance will decrease by a proportional
amount.
Some of the input current flows through this internal base-emitter junction
resistance to the base as well as through the externally connected emitter
resistor, RE. For small-signal analysis these two resistances are connected in
parallel with each other.
Since the value of r’e is very small, and RE is generally much larger, usually in
the kilohms (kΩ) range, the magnitude of the amplifiers voltage gain changes
dynamically with different levels of emitter current.
Thus if RE ≫ r’e then the true voltage gain of the common base amplifier will
be:

Because the current gain is approximately equal to one as IC ≅ IE, then the
voltage gain equation simplifies to just:
So if for example, 1mA of current is flowing through the emitter-base junction,
its dynamic impedance would be 25mV/1mA = 25Ω. The volt gain, AV for a
collector load resistance of 10kΩ would be: 10,000/25 = 400, and the more
current which flows through the junction, the lower becomes its dynamic
resistance and the higher the voltage gain.
Likewise, the higher the value of load resistance the greater the amplifiers
voltage gain. However, a practical common base amplifier circuit would be
unlikely to use a load resistor greater than about 20kΩ with typical values of
voltage gain range from about 100 to 2000 depending on the value of RC. Note
that the amplifiers power gain is about the same as its voltage gain.
As the voltage gain of the common base amplifier is dependant on the ratio of
two resistive values, it therefore follows that there is no phase inversion
between the emitter and the collector. Thus the input and output waveforms
are “in-phase” with each other showing that the common base amplifier is
non-inverting amplifier configuration.

Common Collector Amplifier Resistance Gain

One of the interesting characteristics of the common base amplifier circuit is
the ratio of its input and output impedances giving rise to what is known as the
amplifiers Resistance Gain, the fundamental property which makes
amplification possible. We have seen above that the input is connected to the
emitter and the output taken from the collector.
Between the input and ground terminal there are two possible parallel
resistive paths. One through the emitter resistance, RE to ground and the other
through r’e and the base terminal to ground. Thus we can say looking into the
emitter with the base grounded that: ZIN = RE||r’e.
But as the dynamic emitter resistance, r’e is very small compared
to RE (r’e≪RE), the internal dynamic emitter resistance, r’e dominates the
equation resulting in a low input impedance approximately equal to r’e
So for the common base configuration the input impedance is very low and
depending on the value of the source impedance, RS connected to emitter
terminal, input impedance values can range from between 10Ω and 200Ω.
The low input impedance of the common base amplifier circuit is one of the
main reason for its limited applications as a single stage amplifier.
The output impedance of the CB amplifier however, can be high depending on
the collector resistance used to control the voltage gain and the connected
external load resistance, RL. If a load resistance is connected across the
amplifiers output terminal, it is effectively connected in parallel with the
collector resistance, then ZOUT = RC||RL.
But if RE is very large compared to RC then the emitter resistance will dominate
the equation resulting in a moderate output impedance approximately equal
to RC, so the output impedance looking back into the collector terminal would
be simply: ZOUT = RC.
As the output impedance of the amplifier looking back into the collector
terminal can be very large, the common base circuit operates almost like an
ideal current source taking the input current from the low input impedance
side and sending the current to the high output impedance side. The common
base circuit is therefore also referred to as a current buffer or current follower.

Common Base Amplifier Summary

We have seen here in this tutorial about the Common Base Amplifier that it
has a current gain (alpha) of approximately one (unity), but also a voltage gain
that can be very high with typical values ranging from 100 to over 2000
depending on the value of the collector resistor RL used.
We have also seen that the input impedance of the amplifier circuit is very
low, but the output impedance can be very high. We also said that the
common base amplifier does not invert the input signal as it is a non-inverting
amplifier configuration.
Due to its input-output impedance characteristics, the common base amplifier
arrangement is extremely useful in audio and radio frequency applications as
a current buffer to match a low-impedance source to a high-impedance load
or as a single stage amplifier as part of a cascoded or multi-stage
configuration where one amplifier stage is used to drive another.

Q13) Draw the small-signal model of common collector BJT amplifier. Derive
expressions for voltage gain, input resistance, current gain and output resistance?
The Common Collector Amplifier is another type of bipolar junction
transistor, (BJT) configuration where the input signal is applied to the base
terminal and the output signal taken from the emitter terminal. Thus the
collector terminal is common to both the input and output circuits. This type of
configuration is called Common Collector, (CC) because the collector terminal
is effectively “grounded” or “earthed” through the power supply.

In many ways the common collector configuration (CC) is the reverse of the
common emitter (CE) configuration as the connected load resistor is changed
from the collector terminal for RC to the emitter terminal for RE.
The common collector or grounded collector configuration is commonly used
where a high impedance input source needs to be connected to a low
impedance output load requiring a high current gain. Consider the common
collector amplifier circuit below.
Common Collector Amplifier using an NPN Transistor

Resistors R1 and R2 form a simple voltage divider network used to bias the
NPN transistor into conduction. Since this voltage divider lightly loads the
transistor, the base voltage, VB can be easily calculated by using the simple
voltage divider formula as shown.

Voltage Divider Network

With the collector terminal of the transistor connected directly to VCC and no
collector resistance, (RC = 0) any collector current will generate a voltage drop
across the emitter resistor RE.
However, in the common collector amplifier circuit, the same voltage drop,
VE also represents the output voltage, VOUT.
Ideally we would want the DC voltage drop across RE to be equal to half the
supply voltage, VCC to make the transistors quiescent output voltage sit
somewhere in the middle of the characteristics curves allowing for a maximum
unclipped output signal. Thus the choice of RE depends greatly on IB and the
transistors current gain Beta, β.
As the base-emitter pn-junction is forward biased, base current flows through
the junction to the emitter encouraging transistor action causing a much larger
collector current, IC to flow. Thus the emitter current is a combination of base
current and collector current as: IE = IB + IC. However, as the base current is
extremely small compared to the collector current, the emitter current is
therefore approximately equal to the collector current. Thus IE ≈ IC
As with the common emitter (CE) amplifier configuration, the input signal is
applied to the transistors base terminal, and as we said previously, the
amplifiers output signal is taken from the emitter emitter terminal. However, as
there is only one forward biased pn-junction between the transistors base and
its emitter terminal, any input signal applied to the base passes directly
through the junction to the emitter. Therefore the output signal present at the
emitter is in-phase with the applied input signal at the base.
As the amplifiers output signal is taken from across the emitter load this type
of transistor configuration is also known as an Emitter Follower circuit as the
emitter output “follows” or tracks any voltage changes to the base input signal,
except that it remains about 0.7 volts (VBE) below the base voltage. Thus
VIN and VOUT are in-phase producing zero phase difference between the input
and output signals.
Having said that, the emitters pn-junction effectively acts as a forward biased
diode and for small AC input signals this emitter diode junction has a
resistance given by: r’e = 25mV/Ie where the 25mV is the thermal voltage of the
junction at room temperature (25oC) and Ie is the emitter current. So as the
emitter current increases, the emitter resistance decreases by a proportional
amount.
The base current which flows through this internal base-emitter junction
resistance also flows out and through the externally connected emitter
resistor, RE. These two resistances are series connected thus acting as a
potential divider network creating a voltage drop. Since the value of r’e is very
small, and RE is much larger, usually in the kilohms (kΩ) range, the magnitude
of the amplifiers output voltage is therefore less than its input voltage.
However, in reality the magnitude of the output voltage (peak-to-peak) is
generally in the 98 to 99% value of the input voltage which is close enough in
most cases to be considered as unity gain.
We can calculate the voltage gain, VA of the common collector amplifier by
using the voltage divider formula as shown assuming that the base voltage,
VB is actually the input voltage, VIN.
Common Collector Amplifier Voltage Gain

So the common collector amplifier cannot provide voltage amplification and

another expression used to describe the common collector amplifier circuit is
as a Voltage Follower Circuit for obvious reasons. Thus since the output
signal closely follows the input and is in-phase with the input the common
collector circuit is therefore a non-inverting unity voltage gain amplifier.

Common Collector Amplifier Example No1

A common collector amplifier is constructed using an NPN bipolar transistor
and a voltage divider biasing network. If R1 = 5k6Ω, R2 = 6k8Ω and the supply
voltage is 12 volts. Calculate the values of: VB, VC and VE, the emitter current IE,
the internal emitter resistance r’e and the amplifiers voltage gain AV when a
load resistance of 4k7Ω is used. Also draw the final circuit and corresponding
characteristics curve with load line.
1. Base biasing voltage, VB
2. Collector voltage, VC. As there is no collector load resistance, the transistors
collector terminal is connected directly to the DC supply rail, so VC = VCC = 12
volts.
3. Emitter biasing voltage, VE

4. Emitter Current, IE

5. AC Emitter Resistance, r’e

6. Voltage gain, AV
Common Collector Amplifier Circuit with Load Line

Common Collector Input Impedance

Although the common collector amplifier is not very good at being a voltage
amplifier, because as we have seen, its small signal voltage gain is
approximately equal to one (AV ≅ 1), it does however make a very good
voltage buffer circuit due to its high input (ZIN) and low output (ZOUT)
impedances, providing isolation between an input signal source from a load
impedance load.
Another useful feature of the common collector amplifier is that it provides
current gain (Ai) as long as it is conducting. That is it can pass a large current
flowing from the collector to the emitter, in response to a small change to its
base current, IB. Remember that this DC current only sees RE as there is no
RC. Then the DC current is simply: VCC/RE which can be large if RE is small.
Consider the basic common collector amplifier or emitter follower
configuration below.
Common Collector Amplifier Configuration

For AC analysis of the circuit, the capacitors are shorted and VCC is shorted
(zero impedance). Thus the equivalent circuit is given as shown with the
biasing currents and voltages given as:
The Input Impedance, ZIN of the common collector configuration looking into
the base is given as:

But as Beta, β is generally much greater than 1 (usually above 100), the
expression of: β + 1 can be reduced to just Beta, β as multiplication by 100 is
virtually the same as multiplying by 101. Thus:

Common Collector Amplifier Base Impedance

Where: β is the transistors current gain, Re is the equivalent emitter resistance,

and r’e is the ac resistance of the emitter-base diode. Note that since the
combined value of Re is generally much greater than the diodes equivalent
resistance, r’e (kilo-ohms compared to a few ohms) the transistors base
impedance can be given as simply: β*Re.
An interesting point to notice here is that the the transistors input base
impedance, ZIN(base) can be controlled by the value of either the emitter leg
resistor, RE or the load resistor RL as they are parallel connected.
While the equation above gives us the input impedance looking into the base
of the transistor, it does not give us the true input impedance that the source
signal would see looking into the complete amplifier circuit. For that we need
to consider the two resistors which make up the voltage divider biasing
network. Thus:
Common Collector Amplifier Input Impedance

Common Collector Example No2

Using the previous common collector amplifier circuit above, calculate the
input impedances of the transistors base and amplifier stage if the load
resistance, RL is 10kΩ and the NPN transistors current gain is 100.
1. AC Emitter Resistance, r’e

2. Equivalent Load Resistance, Re

3. Transistors Base Impedance, ZBASE

2. Amplifier Input Impedance, ZIN(STAGE)

As the transistors base impedance of 322kΩ is much higher than the
amplifiers input impedance of only 2.8kΩ, thus the input impedance of the
common collector amplifier is determined by the ratio of the two biasing
resistors, R1 and R2.

Common Collector Output Impedance

To determine the CC amplifiers output impedance ZOUT looking from the load
back into the amplifiers emitter terminal, we must first remove the load as we
want to see the effective resistance of the amplifier that is driving the load.
Thus the AC equivalent circuit looking into the amplifiers output is given as:

From above, the input impedance of the base circuit is given as:RB = R1||R2.
The current gain of the transistor is given as: β. Thus the output equation is
given as:

We can see then that the emitter resistor, RE is effectively in parallel with the
whole impedance of the transistor looking back into its emitter terminal.
If we calculate the output impedance of our common emitter amplifier circuit
using the component values from above, it would give an output impedance
ZOUT of less than 50Ω (49.5Ω) which is much smaller than the higher input
impedance, ZIN(BASE) calculated previously.
Thus we can see then that the Common Collector Amplifier configuration has,
from calculation, a very high input impedance and a very low output
impedance allowing it to drive a low impedance load. In fact due to the CC
amplifiers relatively high input impedance and very low output impedance it is
commonly used as a unity gain buffer amplifier.
Having determined that the output impedance, ZOUT of our example amplifier
above is approximately 50Ω by calculation, if we now connect the 10kΩ load
resistor back into the circuit, the resulting output impedance will be:

Although the load resistance is 10kΩ, the equivalent output resistance is still
low at 49.3Ω. This is because RL is large compared with ZOUT, thus for
maximum power transfer, RL must equal ZOUT. As the voltage gain of the
common collector amplifier is considered to be unity (1), the amplifiers power
gain must be equal to its current gain, as P = V*I.
Since the common collector current gain is defined as the ratio of the emitter
current to the base current, γ = IE/IB = β + 1, it therefore follows that the
amplifiers current gain must be approximately equal to Beta (β) as β + 1 is
virtually the same as Beta.

Common Collector Summary

We have seen in this tutorial about the Common Collector Amplifier that it
gets its name because the collector terminal of the BJT is common to both the
input and output circuits as there is no collector resistance, RC.
The voltage gain of the common collector amplifier is approximately equal to
unity (Av ≅ 1) and that its current gain, Ai is approximately equal to Beta,
(Ai≅β) which depending on the value of the particular transistors Beta value
can be quiet high.
We have also seen through calculation, that the input impedance, ZIN is high
while its output impedance, ZOUT is low making it useful for impedance
matching (or resistance-matching) purposes or as a buffer circuit between a
voltage source and a low impedance load.
As the the common collector (CC) amplifier receives its input signal to the
base with the output voltage taken from across the emitter load, the input and
output voltages are “in-phase” (0o phase difference) thus the common collector
configuration goes by the secondary name of Emitter Follower as the output
voltage (emitter voltage) follows the input base voltage.

Q14) Draw the small-signal model of common emitter BJT amplifier. Derive
expressions for voltage gain, input
resistance current gain and output resistance?

All types of transistor amplifiers operate using AC signal inputs which

alternate between a positive value and a negative value so some way of
“presetting” the amplifier circuit to operate between these two maximum or
peak values is required. This is achieved using a process known as Biasing.
Biasing is very important in amplifier design as it establishes the correct
operating point of the transistor amplifier ready to receive signals, thereby
reducing any distortion to the output signal.
We also saw that a static or DC load line can be drawn onto these output
characteristics curves to show all the possible operating points of the
transistor from fully “ON” to fully “OFF”, and to which the quiescent operating
point or Q-point of the amplifier can be found.
The aim of any small signal amplifier is to amplify all of the input signal with
the minimum amount of distortion possible to the output signal, in other words,
the output signal must be an exact reproduction of the input signal but only
bigger (amplified).
To obtain low distortion when used as an amplifier the operating quiescent
point needs to be correctly selected. This is in fact the DC operating point of
the amplifier and its position may be established at any point along the load
line by a suitable biasing arrangement.
The best possible position for this Q-point is as close to the center position of
the load line as reasonably possible, thereby producing a Class A type
amplifier operation, ie. Vce = 1/2Vcc. Consider the Common Emitter
Amplifier circuit shown below.

The Common Emitter Amplifier Circuit

The single stage common emitter amplifier circuit shown above uses what is
commonly called “Voltage Divider Biasing”. This type of biasing arrangement
uses two resistors as a potential divider network across the supply with their
center point supplying the required Base bias voltage to the transistor. Voltage
divider biasing is commonly used in the design of bipolar transistor amplifier
circuits.
This method of biasing the transistor greatly reduces the effects of varying
Beta, ( β ) by holding the Base bias at a constant steady voltage level allowing
for best stability. The quiescent Base voltage (Vb) is determined by the
potential divider network formed by the two resistors, R1, R2 and the power
supply voltage Vcc as shown with the current flowing through both resistors.
Then the total resistance RT will be equal to R1 + R2 giving the current as i =
Vcc/RT. The voltage level generated at the junction of
resistors R1 and R2 holds the Base voltage (Vb) constant at a value below the
supply voltage.
Then the potential divider network used in the common emitter amplifier circuit
divides the supply voltage in proportion to the resistance. This bias reference
voltage can be easily calculated using the simple voltage divider formula
below:

Transistor Bias Voltage

The same supply voltage, (Vcc) also determines the maximum Collector
current, Ic when the transistor is switched fully “ON” (saturation), Vce = 0. The
Base current Ib for the transistor is found from the Collector current, Ic and the
DC current gain Beta, β of the transistor.
Beta Value

Beta is sometimes referred to as hFE which is the transistors forward current

gain in the common emitter configuration. Beta has no units as it is a fixed
ratio of the two currents, Ic and Ib so a small change in the Base current will
cause a large change in the Collector current.
One final point about Beta. Transistors of the same type and part number will
have large variations in their Beta value. For example, the BC107 NPN
Bipolar transistor has a DC current gain Beta value of between 110 and 450
(data sheet value). So one BC107 may have a Beta value of 110, while
another one may have a Beta value of 450, but they are both BC107 npn
transistors. This is because Beta is a characteristic of the transistors
construction and not of its operation.
As the Base/Emitter junction is forward-biased, the Emitter voltage, Ve will be
one junction voltage drop different to the Base voltage. If the voltage across
the Emitter resistor is known then the Emitter current, Ie can be easily
calculated using Ohm’s Law. The Collector current, Ic can be approximated,
since it is almost the same value as the Emitter current.

Common Emitter Amplifier Example No1

An common emitter amplifier circuit has a load resistance, RL of 1.2kΩ and a
supply voltage of 12v. Calculate the maximum Collector current (Ic) flowing
through the load resistor when the transistor is switched fully “ON”
(saturation), assume Vce = 0. Also find the value of the Emitter resistor, RE if it
has a voltage drop of 1v across it. Calculate the values of all the other circuit
resistors assuming a standard NPN silicon transistor.

This then establishes point “A” on the Collector current vertical axis of the
characteristics curves and occurs when Vce = 0. When the transistor is
switched fully “OFF”, their is no voltage drop across either resistor RE or RL as
no current is flowing through them. Then the voltage drop across the
transistor, Vce is equal to the supply voltage, Vcc. This establishes point “B”
on the horizontal axis of the characteristics curves.
Generally, the quiescent Q-point of the amplifier is with zero input signal
applied to the Base, so the Collector sits about half-way along the load line
between zero volts and the supply voltage, (Vcc/2). Therefore, the Collector
current at the Q-point of the amplifier will be given as:

This static DC load line produces a straight line equation whose slope is given
as: -1/(RL + RE) and that it crosses the vertical Ic axis at a point equal
to Vcc/(RL + RE). The actual position of the Q-point on the DC load line is
determined by the mean value of Ib.
As the Collector current, Ic of the transistor is also equal to the DC gain of the
transistor (Beta), times the Base current (β*Ib), if we assume a Beta (β) value
for the transistor of say 100, (one hundred is a reasonable average value for
low power signal transistors) the Base current Ib flowing into the transistor will
be given as:

Instead of using a separate Base bias supply, it is usual to provide the Base
Bias Voltage from the main supply rail (Vcc) through a dropping resistor, R1.
Resistors, R1 and R2 can now be chosen to give a suitable quiescent Base
current of 45.8μA or 46μA rounded off to the nearest integer. The current
flowing through the potential divider circuit has to be large compared to the
actual Base current, Ib, so that the voltage divider network is not loaded by
the Base current flow.
A general rule of thumb is a value of at least 10 times Ib flowing through the
resistor R2. Transistor Base/Emitter voltage, Vbe is fixed at 0.7V (silicon
transistor) then this gives the value of R2 as:
If the current flowing through resistor R2 is 10 times the value of the Base
current, then the current flowing through resistor R1 in the divider network
must be 11 times the value of the Base current. That is: IR2 + Ib.
Thus the voltage across resistor R1 is equal to Vcc – 1.7v (VRE + 0.7 for silicon
transistor) which is equal to 10.3V, therefore R1 can be calculated as:

The value of the Emitter resistor, RE can be easily calculated using Ohm’s
Law. The current flowing through RE is a combination of the Base
current, Ib and the Collector current Ic and is given as:

Resistor, RE is connected between the transistors Emitter terminal and ground,

and we said previously that there is a voltage drop of 1 volt across it. Thus the
value of the Emitter resistor, RE is calculated as:

So, for our example above, the preferred values of the resistors chosen to
give a tolerance of 5% (E24) are:

Then, our original Common Emitter Amplifier circuit above can be rewritten
to include the values of the components that we have just calculated above.
Completed Common Emitter Circuit

Amplifier Coupling Capacitors

In Common Emitter Amplifier circuits, capacitors C1 and C2 are used
as Coupling Capacitors to separate the AC signals from the DC biasing
voltage. This ensures that the bias condition set up for the circuit to operate
correctly is not affected by any additional amplifier stages, as the capacitors
will only pass AC signals and block any DC component. The output AC signal
is then superimposed on the biasing of the following stages. Also a bypass
capacitor, CE is included in the Emitter leg circuit.
This capacitor is effectively an open circuit component for DC biasing
conditions, which means that the biasing currents and voltages are not
affected by the addition of the capacitor maintaining a good Q-point stability.
However, this parallel connected bypass capacitor effectively becomes a short
circuit to the Emitter resistor at high frequency signals due to its reactance.
Thus only RL plus a very small internal resistance acts as the transistors load
increasing voltage gain to its maximum. Generally, the value of the bypass
capacitor, CE is chosen to provide a reactance of at most, 1/10th the value
of RE at the lowest operating signal frequency.
Output Characteristics Curves
Ok, so far so good. We can now construct a series of curves that show the
Collector current, Ic against the Collector/Emitter voltage, Vce with different
values of Base current, Ib for our simple common emitter amplifier circuit.
These curves are known as the “Output Characteristic Curves” and are used
to show how the transistor will operate over its dynamic range. A static or DC
load line is drawn onto the curves for the load resistor RL of 1.2kΩ to show all
the transistors possible operating points.
When the transistor is switched “OFF”, Vce equals the supply voltage Vcc and
this is point “B” on the line. Likewise when the transistor is fully “ON” and
saturated the Collector current is determined by the load resistor, RL and this
is point “A” on the line.
We calculated before from the DC gain of the transistor that the Base current
required for the mean position of the transistor was 45.8μA and this is marked
as point Q on the load line which represents the Quiescent point or Q-
point of the amplifier. We could quite easily make life easy for ourselves and
round off this value to 50μA exactly, without any effect to the operating point.
Output Characteristics Curves

Point Q on the load line gives us the Base current Q-point of Ib = 45.8μA
or 46μA. We need to find the maximum and minimum peak swings of Base
current that will result in a proportional change to the Collector
current, Ic without any distortion to the output signal.
As the load line cuts through the different Base current values on the DC
characteristics curves we can find the peak swings of Base current that are
equally spaced along the load line. These values are marked as points “N”
and “M” on the line, giving a minimum and a maximum Base current of 20μA
and 80μA respectively.
These points, “N” and “M” can be anywhere along the load line that we
choose as long as they are equally spaced from Q. This then gives us a
theoretical maximum input signal to the Base terminal of 60μA peak-to-peak,
(30μA peak) without producing any distortion to the output signal.
Any input signal giving a Base current greater than this value will drive the
transistor to go beyond point “N” and into its “cut-off” region or beyond point
“M” and into its Saturation region thereby resulting in distortion to the output
signal in the form of “clipping”.
Using points “N” and “M” as an example, the instantaneous values of Collector
current and corresponding values of Collector-emitter voltage can be
projected from the load line. It can be seen that the Collector-emitter voltage is
in anti-phase (–180o) with the collector current.
As the Base current Ib changes in a positive direction from 50μA to 80μA, the
Collector-emitter voltage, which is also the output voltage decreases from its
steady state value of 5.8 volts to 2.0 volts.
Then a single stage Common Emitter Amplifier is also an “Inverting
Amplifier” as an increase in Base voltage causes a decrease in Vout and a
decrease in Base voltage produces an increase in Vout. In other words the
output signal is 180o out-of-phase with the input signal.

Common Emitter Voltage Gain

The Voltage Gain of the common emitter amplifier is equal to the ratio of the
change in the input voltage to the change in the amplifiers output voltage.
Then ΔVL is Vout and ΔVB is Vin. But voltage gain is also equal to the ratio of
the signal resistance in the Collector to the signal resistance in the Emitter
and is given as:

We mentioned earlier that as the signal frequency increases the bypass

capacitor, CE starts to short out the Emitter resistor due to its reactance. Then
at high frequencies RE = 0, making the gain infinite.
However, bipolar transistors have a small internal resistance built into their
Emitter region called Re. The transistors semiconductor material offers an
internal resistance to the flow of current through it and is generally
represented by a small resistor symbol shown inside the main transistor
symbol.
Transistor data sheets tell us that for a small signal bipolar transistors this
internal resistance is the product of 25mV ÷ Ie (25mV being the internal volt
drop across the Emitter junction layer), then for our common Emitter amplifier
circuit above this resistance value will be equal to:

This internal Emitter leg resistance will be in series with the external Emitter
resistor, RE, then the equation for the transistors actual gain will be modified to
include this internal resistance so will be:

At low frequency signals the total resistance in the Emitter leg is equal
to RE + Re. At high frequency, the bypass capacitor shorts out the Emitter
resistor leaving only the internal resistance Re in the Emitter leg resulting in a
high gain. Then for our common emitter amplifier circuit above, the gain of the
circuit at both low and high signal frequencies is given as:

Gain at Low Frequencies

Gain at High Frequencies

One final point, the voltage gain is dependent only on the values of the
Collector resistor, RL and the Emitter resistance, (RE + Re) it is not affected by
the current gain Beta, β (hFE) of the transistor.
So, for our simple example above we can now summarise all the values we
have calculated for our common emitter amplifier circuit and these are:

Minimum Mean Maximum

Base Current 20μA 50μA 80μA

Collector Current 2.0mA 4.8mA 7.7mA

Output Voltage Swing 2.0V 5.8V 9.3V

Amplifier Gain -5.32 -218

Common Emitter Amplifier Summary

Then to summarise. The Common Emitter Amplifier circuit has a resistor in
its Collector circuit. The current flowing through this resistor produces the
voltage output of the amplifier. The value of this resistor is chosen so that at
the amplifiers quiescent operating point, Q-point this output voltage lies half
way along the transistors load line.
The Base of the transistor used in a common emitter amplifier is biased using
two resistors as a potential divider network. This type of biasing arrangement
is commonly used in the design of bipolar transistor amplifier circuits and
greatly reduces the effects of varying Beta, ( β ) by holding the Base bias at a
constant steady voltage. This type of biasing produces the greatest stability.
A resistor can be included in the emitter leg in which case the voltage gain
becomes -RL/RE. If there is no external Emitter resistance, the voltage gain of
the amplifier is not infinite as there is a very small internal resistance, Re in the
Emitter leg. The value of this internal resistance is equal to 25mV/IE
In the next tutorial about transistor amplifiers we will look at the Junction Field
Effect Amplifier commonly called the JFET Amplifier. Like the transistor, the
JFET is used in a single stage amplifier circuit making it easier to understand.
There are several different kinds of field effect transistor that we could use but
the easiest to understand is the junction field effect transistor, or JFET which
has a very high input impedance making it ideal for amplifier circuits.

Q17) Draw the hybrid model of a CC configuration?

Q18) Define α, β, γ of a transistor and show how they are related to each other

What are α,β and γ in a transistor ?

ALPHA (α): It is a large signal current gain in common base
configuration. It is the ratio of collector current (output current)
to the emitter current (input current).
It is a current gain in CB amplifier and it indicates that the
amount of emitter current reaching to collector. Its value is unity
ideally and practically less than unity.
Beta (β): It is a current gain factor in the common emitter
configuration. It is the ration of collector current (output current)
to base current (output current).

normally Its value is greater than 100.

Gama (γ): It is a current gain in common collector configuration
and it is the ration of emitter current (output current) to base
current (input current).

It is also called emitter efficiency that how much current is

injected from the emitter to base after recombination of minority
charge carriers in base. It’s value is high compared to α,β.
What is the relation between α,β and γ in a transistor?
α,β and γ are the current gain factors in three CB, CE and CC
configurations respectively.
Relation between α, β and γ :

Q20) What is the importance of DC load line

Module : 2
Part : C
Q1) A common collector circuit has the following components
R1=27kΩ,R2=27kΩ, Re=5.6kΩ, RL=47kΩ, Rs=600Ω. The transistor parameters
are hie=1kΩ, hfe=85 and hoe=2μA/V. Determine Ai, Ri, Av, Ro.

Q2) same as 1

Q3) A Common emitter circuit has the following components. Rs=1k, R1=110K,
R2=12K Rc=6K. h-parameters are hie=1.2K,hre=2.5*10-4 ,hfe=75,hoe=25uA/V.
Draw the equivalent hybrid model and calculate Ai, Ri, Ro and Av?
Q4) The h-parameters of a transistor used in a CE circuit are hie =1.0 K,
hre=10×10−4, hfe = 50, hoe = 100 K. The load resistance for the transistor is 1 K
in the collector circuit. Determine Ri, Ro, AV& Ai in the amplifier stage. (Assume
Rs = 1000)?
Q5) Compute current gain, voltage gain, input and output impedance of the CB
amplifier if it is driven by a voltage source of internal resistance Rs=1k.The load
impedance is RL=1K. The transistor parameters are hib= 22, hfb= -0.98,
hrb=2.9×10−4, hob= 0.5μA/V.
Q6) A bipolar junction transistor with hie = 1100Ω, hfe = 50, hre = 2.4x10-4, hoe
= 25 μA/V, is to drive a load of 1KΩ in Emitter-Follower arrangement. Estimate
AV, AI, Ri& R0?

Q7) Draw small signal equivalent circuit of Emitter Follower using accurate h
parameter model. For the emitter follower circuit with RS= 0.5K and RL =5K,
calculate Ri, AV and RO. Assume, hfe = 50, hie =1K, hoe = 25 μA/V.

Q8) A silicon NPN transistor has Ico = 20nA and β=150, Vbe = 0.7V. It is
operated in Common Emitter Configuration having Vbb = 4.5V, Rb=150K,Rc =
3K, Vcc = 12V. Find the emitter, base and collector currents and also verify in
which region the transistor operates. What will happen if the value of the
collector resistance is increased to very high values?
Formulas: