"3. DATA REPRESENTATION » ct_Intro duction :- + A signed integer ts an integee with posttive $+? or negative -"assoctatecdk with it. Sine computers onty understanals binary ,itts mueteseaey to represent PV these slgned integers to binary ate ~*~ ®-In binany . Signeot integer can be Teprecenieal in ~*~ 3 ways 5 Lod me) Signed Be ‘ Wa compliment tit) 2's compliment ood * Stgned BU Representatton Tn Signed integee representakton cmedtvod. the jollonutng rules ane FO\LoKiedl! boon 1. The MSB represents ign of TCE (o:#ve f 4:-ve) 2+ Moanttude Uf represented by other bik. than MSB. B- Range of Signed Nurnbee oF N-bees tu es [274 1) to (274-4). Se tig n=4 Range: -24 t_1 to 2*4-1 > -7 0 7 be v —- —_- [sign | Magnttudd decimal Sigo Magnttude | reumak =» U%Tololo| +0 4 | elolo =o =» o joljo|4 +4 i o |o}a ~4 _ o [olaljo]| +2 a[olfilo|-2 | —_» o |} oj4aia +3 dt oj;ija | -3 =» Ol1jo|o t4 ts i jo}o —4 a olajo[s | +s a2 | afola | -s —- o | alalo | +6 a [a lato —6 ~. o[alala +7 a |)a lala =I ==Mow res 5 Paoe Wo, youvi ate representattons :~o and +0 * Drowl banks 1) For 0, there are Huo tubich shouted not b Riaa & & Case AS OK nether -ve or +ve. * x 2) Out of 2" bits for Tepresentaton, we ave able to | utilize only 2! bets. € {pn € 3 Numbers are not cyelte order te. Attee laygest Number © the next mumbo te not least mumbess. #Si9N Extension: The“operatton, in computer artthmelte, of tnereasing the Number of btks ef bina Numb “whtle preserving: number's syn ttve/-ve) and value. 7 e:9: SE? 4044 0440 rn a6 bth? 4444 4444 1001 0410 ener ee peeieneceecaeeeeeeee‘eq es, Compltment Representatton In' 4's complement representatton tollovitna rules 7 =| > Draw backs are used t ‘Yd For ve numbers the wrepresentatton rules are n same as sgned Inhegue representatton. 2 = > For -ve mumbers, Om Witte +ve Numbers M1 binaTy ¢ take tts 4's comple. “@ or > Wve unesgned representakton of 2"-1-x for -X. > ege “X= -5 for N=4 | 2 “241-5 =40: 1010 (unsygned) 4 = —@ > The Range of i's wrmplement integer representab! = OF N-btee Numbexe &% 2» - (27a) to ant ia _» igo Magn thude, Dettmal Sign | Magnttude | pectm -» | ~o o|o la +0 54! O}oloj.-7 5 Oo | O}o a | +4 a [ofola | -e | * 0 Oj; 4lo t2 el Oj;tjlo}] -5 = Oo folalal| +3 a [o fala] -4 -* oO }|alolo +4 4a | afo-[o] -3 a 0 ajo jd +5 4d a foja] -2 | ad o |alalo| +e i |[afafol-a | = o [afal+] 77] a [alala [-o - =» » +> For 0, 9gato there are tno representattone. SD *, Out of 2° bUs, only 2°74 b vrepresentetton . Yobd us are used pormeme al fe 7 x 2'8 complement Representatton In 9's complement representation followteg aus ore used ) For +ve numbers, rutes are same as signed tntegey vrepresentateon . = For -ve numbers “> wrrtre unéigned represen tatton Of QT-x for -X. €s9¢ (5) tn 4 bte pepresentatton u => 24-5 544: 4044 Cunsgned) or > Write _representatton of x ¢ take o's complemen RMReAeAaedaet No ambigqutty tn representing .*0. 2> Numbees ale to cyelte order 3> Signe oh Exkenston work, 4 Range es high. €:q. to take 2's complement simply take e a d's complement ¢ ado 4 tow. e 5: 0104 5 '% 40100, F041041. e => Range -277 to 2744 : . a sgn | Magnttudle | Dectrmall 8190 | Magnttucte [Decimal] Yo Holo] to @ oupol[m en) o |ololal 44 | alolo lal -7 [© o folsalo] 42 afola fof -é | ° ofolalal +3 afo[a fa[—-- Te ol[alolo|l + sa]talo fo] —-— Te Oo LiyaO: +S afalola a e o|lala +6 afz|lafol| —z «e O|{ 4] 4/4] +7 af4} a )a Pra e -Merus = e e e e eePage no. Pe —_ rouva | Wa Operations on Daka : x Binary Addttton s. Binayy addttton technique 7s simtlar to normat addtttor * of decimal numbers excluding that as an alternative AV value of 10 dlgils, trcarries oF a 2 value. “y 2. Similarly, whenever we wtould tke to Gum tno binay ®@ numbers, only we will have carry tt produur ts w@_ bigger than 4 because, in binarY numbers, 1 w@ highest. og — » A_| 8 A+B | carry 2» oO o ° o | ; » ° 4 4 ° i > al: °o = 4 oO 7 *> aes 2 2 1 wmeibO 4 14 + terry) @ 1 tcarry) tf 4.0 4d ten 1050.04 C44) = + 4 °0 14 Ord, (24): , toto.i:4 0:4 (C28) s ti 0 0:0 0 (48) to 4:i4.0 (4) ° By Binony Subtrackton (45 Method) This & primary technique. Inthis method, ensure A that subtratti number must be trom layger @ Number 0 srncuier, or else this techotque wiBn't a KLOovK approptately, 7 |» a: TE Minuend ts smauee than subtrahend , then @ thy method te useot by just suitkeh thetr position, mB ft memorize that effete wit be a -ve number. » 2» > =>eae Pe B_ | a-e8 |eorrowl = ,SC*~<“S:C‘«;s~s‘s‘;3COStS*é‘ ST 0 o 0 0 0 4 i t ef oO a oO _ EI a ° ° eeeeieeleeees * Binary Subhadton (2's complement) + First, contirm that digits in subbrahend ¢ minuend Shoulel be equal. 4 ¥'s complement of number ean bbe achieved by complementing each oltgct of number gt ado one to te, = on “Sgubtrahena: 4401404 Minuend: 0010044 Taking 2's complement of Minuena- i's¥ emplement: 4101100 Adoltng 4 to thts: 1401404, . fo SUbhrattton => 44044 04 4. AhOiawO vy. P JAF 1 OLE if if -MSB % (4) then just tgnore ve: CGjust Itke my crack) but if U's (0) then fake Bs complement of final answer +o 4ek olestred outpub, Perea eeeene Lanprppeetan ¢ Little _Endian Assjanments is os -Endtan: Most Significant byte is stored first in the “lonmest EEN address. C big in first) ‘h- _ T®@+ little-Enoltan : stores Least Significant byte in the _ lowesE memo adlalress. _) Memon * Memory @ Address Vout” Address Vout ss 7 35 t 42 =~» 6 6D Daka 2: JSbDAF 4D 6 AF 7 a AF S 6D -* 4 42 Daka 4: 6SYSA429 4 35 un a» 2 6s 3 2g , Zp li 8 2 Aa > a Aa ‘4 13 7 6 23 ° 65 Little-Endian format: | j Bfq - Endtan formar ®© Half Addew =) + Truth Te p Logie Diag ram = = Se sinelt Aaders ; = Cc 4 ae re CARRY ° o ° oO x + Logical Expresston “SUM= X@Y CARRY= X.Y@ Full Adclex, => «Truth Tobe + Logical Expresston x y- Cin| Cout 8 % : 0 0. Oo} 0 0 Cour: ABt BCin +A Cio oO Oo ilo 4 SUM= (A®B)@ Cio . oO aie oO oO a . ° ds a4itw 0 s logic Diagram" 4 oO © ° disd * Z som © 4 0. 4/4 oo a 4 i 0 ad oO ’ 4 1 at aL A Le CARRY = &: Ripple Carry Addex : lon) Addew « + SUM ¢ CARRY takes move time to produce because - each Section tn circu watls for arrival Of INP Ub. | eg: To deliver output tor nth block , tt neck sy to receive input from tn-1)*P block 4 this del is catled Propagatton Delay . of eppaton Delay Xn Yo x Ys xo Yo cn Lent A pscenepe—] Fa [ea FA = te ftins Te Sn So Sa + In the concept of rtpple carry adder cirrutl, the bits that are necessary for addlttton. are immediately available. Vklhereas every adder, sectton aeds to hold tts time for’ arrival of carry from previous addex biock. aaneeperereeedee[ee te SO ate Carry Lookahead Addex : Fast Addy ~~ . To overcemb the delay tn ripple carrtes addew, a carry -lookahead adder was introduced. Here, by Using complicated haraware ,the propagatton 7 _ @ dela can be minimized? © 9 8 9 eet ees was YS we Ye ee * a 2, + 2 6 68 @ Bcell B ceuleq ]{G ceut!4 1B ctle+— Co “Ths | Pp tal [1 te, Vs =] & | Jes Gal [ps eal |r aol Tp 0/6 B/ojale i = carry -lookaheod logic ent g=Sum 1 Giz Xi*% G= cary generate - t= XOX 7 p= carry propagate SUM= Pi OG + Parallel adders Normally incorporate carry lookahead logic to ensure’ that carny propage4ton betureen subsequent shages of addttton soe not Umit adolttton speeot. Vevdoe — — yewMtrwress me Teal pe ae «~ * Multplicatton ew Mutttplteaind: oe ee ew x e Mule? x ee ele! ° ee ve lye : © e ° e eo x Y, e ot . : € se ex » Ye x 2* LZ + 8 e ey Xx Ys xe? LZ e e ° e e z (produ) e 4 > Step- by - step Mulltplicatton example for 4- og x 2 UNSIGNED NUMBERS. e £4: la 1 44 Ot C13) Multtplicanol [mI] e x tod i CW Mulltpliee TQ7 e di om ‘ : 4 ‘Ta oixX - 2©0.00 x+y. f + AO: 4% HX ‘ 4 ~ too. L 4 oF as 4 Uy) Prooluck C Pa 9 Cc | Accumulator (A) Regtstex(Q) Operatton S O|o 0o0|]o0 06 ilo) a [a J] rnttatrve Ol[a tle alalolala e ofo alfa ofatrters Artthmette LS. e - | a oe tlofo]alafalalola eq ola co) o | 4 | 4) a ilo fArubmete ig eq | “ofailolejfa{alaale L ofeo 4) o oO fi a) ala | anthmette cs “tfololo 4 fa a]a_ fb i) | 4 0 ° ° ala AtUnmetic res. a> Step-by-Step mutttplicotton example for 4 aig Us SIGNED NUMBERS. : e.4s 7 7 veal 40 0 4 4. (13) Muutplicandl [mI mM Ethensioo x 0 4 0 4 4 Cid) Multplter £99 ja addi toot d _ wadtiiiioo in x: z _ 2 O60 OO ORK tiaoodaa xox iy + 600000% x x x ' ti o44 4.0 0 0 4 (445) Product rd > BOOTH'S ALGORITHM + The algorithm was invented by Andrew Donald 800th in 1980. The B00th's algorithm generates a $2n? bie produc 4 treats both +ve¢ -ve 2's Complement N-btt operand untformly. (PHX-Y Two adjacent bits Xr Xia are examined tn e€ach-step. i¢ Xi Xia = O01, Y te added to accumulator it xix F40} Y is subtracted foo meen tarom if Xixi-s = 00 or 44 then’ nothtng -\ Sbke baad you have +o rtght shee. [b{b bi UVES Dd ddd dddia/s Multi pliez Verston of multte- Bit Ci) | Bue Li-4)|-licand selecteol byt = 0 0 ox M > o a +i X M —_ Ke ° 7-1 x M —_ 4 i ox Mm = =‘Youva %* Workin of Booth's Algori thant : t Step 1) Set the Mulifplicand ¢@ Muliphes binary bits as * M and ©, reapectvely. ™ . : ; 7 4 Step2> Initially , we set ACand nu register value to 0.@ ro ¢ Stepsy SC Csequence countec) represents the number of Multtpltex bike CQ), that fs continuosly € decremented till equal to Number of bits (M) or reathea to 0. “ ~ step 4) A On represents the lasl bie ot G1 ¢ Onts Shows the @& incremented bit of Qn by 4. Step 5) ON each cycle of booth algorithm ,'‘@n and Qn+1- bits ttl be checked on following parameters aki Qn_| Snes | Actton 1 3 3 2 O14 | Old | Arithmetic shut right to AC. @nd Onn are inc. oO a Mult plicana (mM) +40, 4 then Might shthe Lif Oo] Mutttpiteanot Um) ae; g then right eh ift Steps) Operatton \continuosly Mork ttl! we reachect 6m-41? bit tn booth sata ovithm . step ty Resulls of MulHpltcatton binary bUs mill be Stored in AC ¢ @R reguktew. v. e SOOO PPPPPeReaaeeee> ea* 4 Ex: Multply ‘and 3 using Booth’s algorithm. a, Qnti | M=O444 AC 8 [Qn-4 | Sc = Ml+i= 4001 ¢ operal” | | ®@i fo | anal 0000 |oo1t |0 4 ~» Subhroet (M43) | 4004 [| » “ [400d _ | | ~ ARS operatton 14100 1001 |4 [3 —~ i it | ARS Operatton 4110 0100 (1 |2 —@ © | 4 [ Adattion catm) otid ~» 0104 0400 ~*~ ARS operation 60.10 1010 |4 => 0 6 ARS operatton ©ooL OAo0s oO 3 Ex: Multtply 23 and -9 using S00th's algorithm. a On | Ones | M= OL0114 AC g Qn-4 | 8¢ Mi4+4 = 401004 | => Initially ‘fodoo00 [aioiii | 0 | 6 Pato | subrrat 4 4101004 | -» 101004 | = ARS operaHton 410100 |aitori| 4 | & Ai | a | ARs operatton 141040 [oii101[ 42/4 | —@ i | 4 [ars operatton dtiidi |Odo1ito| i | 3 | #® 0 | 4 | Adatton ca+m) [ 010444 | _ 010100 | _- ARS operation COL0A0 | C0144} O | 2 ail? subback M 101004 2» 110014 _» ARS operatton t1z001 |4100011| 1 | 4 ~@ i | 2 ARS Operatton 111100 |410001| 4 | 0 | ~~» —* Flowchart Cmay be important) ‘Youva (START A<0, @1<0 Me Mulitplteand’ Qs Multtp lier count <— 9 > Qo, O-2 | =10~ yO 4 A-M s4i A iv (CEND AOe Peper rererereesenanaeeeeeaadaaae445 > BOOTH-RECODED MULTIPLIER (FAST) +A technique called bit-patr recoding of multiplier * resuits tn using at most one: sdimmand for each BD pair of bits Yin emutttplren. + Tits derived directly trom Booth algorithm . Group : ~®@_ the Booth -recodeol multiplies bits fn pairs, and- 7@ observe the following : =» UO —@ Multiple btk-paty [multtpites bee on aight | mulieplicanct —@ itd ie tri 2 Seleted at ¢ =~ 0 ° 0 _O xXM =» © .0 A +1x M So 0 4 O: Tt late Me 2» oO. 4 ae +2 KM a 0 0 -2x%M 2 a 0 4 -1xM ale 4 | ° —IixXM a a t a | OxM =» . »= Ex: Mulltply 13 and-6 using Booth's recbdledl algorithm. A z= 01101 , -6= 14010 = —“G@i@e@oo BM. Ott OS ¢ r x QO -l -2 } =f =2 diadiitoodisd oO i 244 4 9-Or14 0:4 0000000 i1d1044 00 + 0 Vb bb» d\bidib/duot ow youva q ~ Division + Diviston of integers involves grouping of items. Te includes both positve numbens 4 negative Numbers. + To sum tt allup ¢ to Moke evensthing easy, the two most WMportant thing ‘to remembeY when you are Mutttplying integers “or dividing integers are: a. wien the signe are different, answee ts alway s Heyer. 2. mWiheh the signs are game, answiee always positive - G > Non=restoring Diviston algorithm for unsigned toteger. «This algorithhy baste performs simple operattons such as addthon, sub¥ractton. In thu method, we will use the sign bte of registee A. 0 is starting Value [btt of Fegtster A. ¢ * Algovithrn = Stepi) Inittarize Reg A= 000000 Req M = Divisor Rég @ =\ Dividend NZ Numbee of UES in atvidene. Step 2> Check si9n bte (MSB) of Reg. A if M&B=4 . Ehen Shit AQ to lefE and A=A+M if MSB=0, then shiPt A@ +o left, and A=A-M Step 3> Again chek sign bUt op A. g Oo FOTPPPPPOPRPFERE REP ERRRRR RAR e atsvyouva 4 MSB si, then Q[o]=0 a gtol=13B it MSB =0, then QCol=4 Step 4) Value of N 1s decremented. | Steps) if N20, go to step 6 else go to step 2. | OG { Skepe> A=A+M if MSB(AD=4 Now, A Witt! contatn rematnolee 4 § contatn Quotrent. bbb) dbo a a x => _ ee: Dividend =414 F Divisor=3 = a” M A g Actton » + ooo4d ©0000 1044 Begin 2 oooad oo004 O44 st sooodd 14120 Ott A=A-M =» 3 | ooo4t4 44410 0140 Qto1=0 * ooodd 11100 4140- SL = ooo dt adiad 110. A=At+M Bs oo0ii addd4 41100 @tod=0 = | ooodad Aaaad 100- SL -*» ooodd ©0010 1t00- A=AtM a: Oood4 000410 1004 Qtol=4 ) ooodd oOoLto0d OO1_ SL »> Ooodd ©0010 001 - A=A-M Bo | ooost 00040 0014 Qtoj=4 -» jeer a Le [TCA [— @ [ere » 7 ADDER / SUBTRACTOR, > »> =mrwtess youva ome > Restoring Diviston Algortthm 8tepa> IniHaltze Reg. A. = 00000 Reg. M= Divisor R&D. Q= Dividend N= Numbew Of bits in ckivicenal. win Step 2) Reg. A and Reg. @ witihbe treated as single * unve ¢ the Value of both requters wu be, Shifted lett. Step 3) A=A-M_... (No need 40 check MsB § Shth) Stepd> Now, cheuk stanbur (MsB) Op A. ip Msp =, then @Col=4 ¢ restore A if MéB =4, then Qto7=0 Step 5> Decrement the varue of N. Step 6) if N=0, break the Loop , else 40 to ctepe. Step4y @= Quottent, A=rematnden. HePPPre FPP ere RH eee RRR Ree eeeegcee 2= oé Ex: Divitolend= 14 Diviior=3 = wy M A a Operation =» 4 Ooodd 00000 41044 [ Inikaltze ad ooodd ooont O41. [ 6L ~~. ooo14 11440 O14- A=A-M ooo Oooot | 0110 © C0I=0¢4 Rest] 3 Ooo1d ©0020 | 4140- jst j | O0O44 dadaa lined On A=A-M 00014 00010 ' 1100 Q@LOT=0 Pat 2 O00 Oo10t | 400- SL 00014 00010 | 100- A=A—M | ©ooi4 | 00010 | 1004 Qctoj=41 2 | 00034 Oo104 }00.0.4e st Oooit | C0030 | Oo4- A=A-M Oooit | oooto | 004d Qtojed VO bbb UU UVC Ebb bbb es didlsw vom! @e Floating Poi - ing Point Aruthmeltc “when Ummummbers cannot be represented as integers we © represent as imbogers nie represent them a4 _floaking point numbers. | e ‘Floating potnt representatton is like sctenttztc notatton. OF 1oA tg. -20 000 000 = -2 x 10 7+ Exponent =o * 6 sign | __ base OC want, significand in 4: 0.000 000 oot Y= 7 x lo / YE? oTo represent any Mum bee ( especially binayy) we smust wirtte tt fn seientifte notation. ox Normal notatton = (1001. 4100) 2 1} Scientte nokatton 1.0041100 x 2° nyt : Then we must ftt that number below. © Single Precéston Format (32 bers) sign Exponent Fractton l i- be 8 -bits 23-btte Laygest No. that can be represented : Lox2"* = 2.0% 10% Smauest NO. that can be represented: LOX 2° "7 = 9.0 x 10-8 @@)_ Double Precision Format (64 Bits) $2~-bits PretPer arte reer eRRRece Co = Fractton . d-bUe Jt1-bIks ; a)Pa To simplify sort, Sign was placed as first bit. Fora Similar reason , the representatton of exponent is also Modified :in ovoler to use integer compares, it note be preferable to have Smallest exponent as 00---04 ad laygest exponent as di... d, 7. This is the biageot notation, 100041.41 xX 2° 7@ where a bias ts subtracted tom 10004.411x 2+ FW exponent Helel to ytelol true 1000-4444 X 9? TB &Xponent. 100.04144 eee » 10°004444 X 2% me IEEE 754 Single precision uses 4.0004444 x2" | a bias of 127 (since exponent Mantissa must have values betuieen -i27 andi2¢)... LoUbLe ‘ precisions uses bias of 1023. (Exponent -Bias) Final Representation + (-1)°x (1+ Fractton) x2 4 eg. Floak F= 15213. 152134 = 11401101101101. = 4.1101101101101, x2” 4 + Signiticand ‘yeh VPNIEE x AW Va se it0iio11044 01. AW frac = 11011011011 010000000000e nae 5 —_ —® - Exponent Z : —@® e=- 13 —® Bias = 127 =_- Exp = 1%0 = 100011002 @ | © [[ 10001100 ]]41011013 011 01000 0000000 4 + + b Webbvous] tg: Suppose that IEFE-YS4, 92 -btk floating point = ~ representatton pattern ts g = @ 0 10000000 110 6000 0000 0000 0000 00008 => *8ign bie (8) =0 (positive Number) “ES 10000000 B = 198 Cin Mormakixed form) ___Denormaltsed form : (128-107) _* Froetton = dtd HSitaxottixoa =4.15D J Numbee = 7, 75xX 97 = @.5D_ eeeeeaa Gj 1 0F111140 100 0000 0000 0000 0000 9000 >+ gn bu (s) =4 (Negative Number) *€-V011111108 = 1268 (mormaltxed form) Denormalized form : (126-107) + Fratkton = 4.40 Fitixo! =4.5D Numbex =-i4-5x2%! = +0-15D 41 10011001 (00 0000000000 08000080004 >+ Sign bit (Ss) =41 (negative number) t ‘EY 10011004 B = 153D (Normattseol form) Denormoaltsed foray : (153-727) + FrattioO = 4. 00000000000000000000 004 x 1x 27%? oe Num bey = -ix2**x 9-2e -ix2? - 8D oor ePrPr Pern RRR ee eeeeRemirwre ss Crayenes TO ” [ferme vouva | | ete | 2 aX FP Arithmetic Operattons er tk PrecistON Consiolerations _ 7 4. Guard Birks s. Although amantissas of inital operand ¢ final resutts are limited +0 specitied number of bits (eq: 24 bite @ for single formaks , including implicit leading 4), it ts ® sti of ten mecessary to have some extra bits to ; ® accomodate the resul of execution of tntermediale Steps, i any type of arithmette operatton. 4 » Oo Fortunately , ALU registers that hold exponent ¢ Bw Spqnificand of cachVoperand prtor ¢ after floating -point —@ operation are always greater in lenath than lengin "| Sjgnizicand puss “an implied bit. The registee Mus wm Muto Fnatically provides additonal bts to operands a+ @ “ellos to finat resubts, anal these types Of extra bits 2 that are retained are often catleol guarot bits. » 2. Truncatton “At the time of generating resutt , itis often required to remove guaro bits from extended Significana by Approptately chopping tt otf to bring’ tt to spectfied length that simply “approximates Longe verston. Thu A type of ack Makita no changes ty ‘TePainedt bins U commonly Knowry as Truneatton. Ty chopping + Simple cutting the btts. G Roun aig + Essentiauy & variant of truncabton that até Vd pose quarol bts (exh bits) when representecl tn spect freck Pommat . T 9b» bb d\dids