COA Unit-2
2 Marks:
1) What are secondary variables?
2) What is fundamental mode sequential circuit?
3) What is pulse mode circuit?
4) What are the significance of state assignment?
5) What are the different techniques used in state assignment?
10 Marks:
1) What is Register Transfer Language?
2) Explain the Shift micro-operations.
3) Explain the complements with an example.
4) What is ALU? What are its Types?
5) What are error detection codes.
COA Unit-2
2 Marks:
1) What are secondary variables?
Ans: Secondary variables are either supportive measurements related to the
primary objective or measurements of effects related to the secondary
objectives.
2) What is fundamental mode sequential circuit?
Ans: Fundamental-mode operation assumes that the input signals change one
at a time and only when the circuit is in a stable condition. 3. The analysis of
asynchronous sequential circuits proceeds in much the same way as that of
clocked synchronous sequential circuits.
3) What is pulse mode circuit?
Ans: - A pulse -mode circuit is designed to respond to pulses of certain
duration; the constant signals between the pulses are “null” or “spacer” signals,
which do not affect the circuit's behavior.
4) What is state reduction?
Ans:- State reduction:
The state reduction technique generally prevents the addition of duplicate states. The
reduction in redundant states reduces the number of flip-flops and logic gates,
reducing the cost of the final circuit. Two states are said to be equivalent if every
possible set of inputs generates exactly the same output and the same next state.
When two states are equal, one of them can be eliminated without changing the
input-output relationship. The state reduction algorithm is applied in the state table to
reduce equivalent states.
5) What is state assignment?
Ans:- State assignment:
State assignment refers to the process of assigning binary values to the states of a
sequential machine. The binary values should be given to the states in such a way that
flip-flop input functions may be implemented with a minimum number of logic gates.
10 Marks:
1) What is Register Transfer Language?
Ans: - Register Transfer Language
A digital computer system exhibits an interconnection of digital modules such as
registers, decoders, arithmetic elements, and Control logic.
These digital modules are interconnected with some common data and control paths
to form a complete digital system.
Moreover, digital modules are best defined by the registers and the operations that
are performed on the data stored in them.
The operations performed on the data stored in registers are called Micro-
operations.The internal hardware organization of a digital system is best defined by
specifying:
o The set of registers and the flow of data between them.
o The sequence of micro-operations performed on the data which are stored in
the registers.
o The control paths that initiates the sequence of micro-operation
The Register Transfer Language is the symbolic representation of notations used
to specify the sequence of micro-operations.
In a computer system, data transfer takes place between processor registers and
memory and between processor registers and input-output systems. These data
transfer can be represented by standard notations given below:
o Notations R0, R1, R2..., and so on represent processor registers.
o The addresses of memory locations are represented by names such as LOC,
PLACE, MEM, etc.
o Input-output registers are represented by names such as DATA IN, DATA
OUT and so on.
o The content of register or memory location is denoted by placing square
brackets around the name of the register or memory location.
2) Explain the Shift micro-operations.
Ans:- Shift Micro-Operations in
Computer Architecture
Shift micro-operations are those micro-operations that are used for serial
transfer of information. These are also used in conjunction with arithmetic
micro-operation, logic micro-operation, and other data-processing operations.
There are three types of shifts micro-operations:
1. Logical :
It transfers the 0 zero through the serial input. We use the symbols shl for
logical shift-left and shr for shift-right.
1. Logical Shift Left –
In this shift one position moves each bit to the left one by one. The
Empty least significant bit (LSB) is filled with zero (i.e, the serial
input), and the most significant bit (MSB) is rejected.
2. Right Logical Shift –
In this one position moves each bit to the right one by one and the
least significant bit(LSB) is rejected and the empty MSB is filled with
zero.
2. Arithmetic :
This micro-operation shifts a signed binary number to the left or to the right
position. In an arithmetic shift-left, it multiplies a signed binary number by 2
and In an arithmetic shift-right, it divides the number by 2.
1. Left Arithmetic Shift –
In this one position moves each bit to the left one by one. The empty
least significant bit (LSB) is filled with zero and the most significant
bit (MSB) is rejected. Same as the Left Logical Shift.
2. Right Arithmetic Shift –
In this one position moves each bit to the right one by one and the
least significant bit is rejected and the empty MSB is filled with the
value of the previous MSB.
3. Circular :
The circular shift circulates the bits in the sequence of the register around the
both ends without any loss of information.
1. Left Circular Shift –
2. Right Circular Shift –
3) Explain the complements with an example.
Ans:- Complement Arithmetic
Complements are used in the digital computers in order to simplify the subtraction
operation and for the logical manipulations. For each radix-r system (radix r
represents base of number system) there are two types of complements.
S.N. Complement Description
1 Radix Complement The radix complement is referred to as the r's
complement
2 Diminished Radix Complement The diminished radix complement is referred to as the
(r-1)'s complement
Binary system complements
As the binary system has base r = 2. So the two types of complements for the
binary system are 2's complement and 1's complement.
1's complement
The 1's complement of a number is found by changing all 1's to 0's and all 0's to
1's. This is called as taking complement or 1's complement. Example of 1's
Complement is as follows.
2's complement
The 2's complement of binary number is obtained by adding 1 to the Least
Significant Bit (LSB) of 1's complement of the number.
2's complement = 1's complement + 1
Example of 2's Complement is as follows.
4) What is ALU? What are its Types?
Ans:- What is ALU (Arithmetic Logic Unit)?
In the computer system, ALU is a main component of the central processing unit,
which stands for arithmetic logic unit and performs arithmetic and logic operations. It
is also known as an integer unit (IU) that is an integrated circuit within a CPU or
GPU, which is the last component to perform calculations in the processor. It has the
ability to perform all processes related to arithmetic and logic operations such as
addition, subtraction, and shifting operations, including Boolean comparisons (XOR,
OR, AND, and NOT operations). Also, binary numbers can accomplish mathematical
and bitwise operations. The arithmetic logic unit is split into AU (arithmetic unit) and
LU (logic unit). The operands and code used by the ALU tell it which operations have
to perform according to input data. When the ALU completes the processing of input,
the information is sent to the computer's memory.
Except performing calculations related to addition and subtraction, ALUs handle the
multiplication of two integers as they are designed to execute integer calculations;
hence, its result is also an integer. However, division operations commonly may not
be performed by ALU as division operations may produce a result in a floating-point
number. Instead, the floating-point unit (FPU) usually handles the division
operations; other non-integer calculations can also be performed by FPU.
Additionally, engineers can design the ALU to perform any type of operation.
However, ALU becomes more costly as the operations become more complex
because ALU destroys more heat and takes up more space in the CPU. This is the
reason to make powerful ALU by engineers, which provides the surety that the CPU
is fast and powerful as well.
The calculations needed by the CPU are handled by the arithmetic logic unit (ALU);
most of the operations among them are logical in nature. If the CPU is made more
powerful, which is made on the basis of the ALU is designed. Then it creates more
heat and takes more power or energy. Therefore, it must be moderation between
how complex and powerful ALU is and not be more costly. This is the main reason
the faster CPUs are more costly; hence, they take much power and destroy more
heat. Arithmetic and logic operations are the main operations that are performed by
the ALU; it also performs bit-shifting operations.
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Although the ALU is a major component in the processor, the ALU's design and
function may be different in the different processors. For case, some ALUs are
designed to perform only integer calculations, and some are for floating-point
operations. Some processors include a single arithmetic logic unit to perform
operations, and others may contain numerous ALUs to complete calculations. The
operations performed by ALU are:
o Logical Operations: The logical operations consist of NOR, NOT, AND,
NAND, OR, XOR, and more.
o Bit-Shifting Operations: It is responsible for displacement in the locations of
the bits to the by right or left by a certain number of places that are known as
a multiplication operation.
o Arithmetic Operations: Although it performs multiplication and division, this
refers to bit addition and subtraction. But multiplication and division operations
are more costly to make. In the place of multiplication, addition can be used
as a substitute and subtraction for division.
5) What are error detection codes.
Ans:- Error Detection Techniques
There are three main techniques for detecting errors
Parity Check
Parity check is done by adding an extra bit, called parity bit to the data to make
number of 1s either even in case of even parity, or odd in case of odd parity.
While creating a frame, the sender counts the number of 1s in it and adds the
parity bit in following way
In case of even parity: If number of 1s is even then parity bit value is 0.
If number of 1s is odd then parity bit value is 1.
In case of odd parity: If number of 1s is odd then parity bit value is 0. If
number of 1s is even then parity bit value is 1.
On receiving a frame, the receiver counts the number of 1s in it. In case of even
parity check, if the count of 1s is even, the frame is accepted, otherwise it is
rejected. Similar rule is adopted for odd parity check.
Parity check is suitable for single bit error detection only.
Checksum
In this error detection scheme, the following procedure is applied
Data is divided into fixed sized frames or segments.
The sender adds the segments using 1’s complement arithmetic to get
the sum. It then complements the sum to get the checksum and sends
it along with the data frames.
The receiver adds the incoming segments along with the checksum
using 1’s complement arithmetic to get the sum and then
complements it.
If the result is zero, the received frames are accepted; otherwise they
are discarded.
Cyclic Redundancy Check (CRC)
Cyclic Redundancy Check (CRC) involves binary division of the data bits being sent
by a predetermined divisor agreed upon by the communicating system. The divisor
is generated using polynomials.
Here, the sender performs binary division of the data segment by the
divisor. It then appends the remainder called CRC bits to the end of
data segment. This makes the resulting data unit exactly divisible by
the divisor.
The receiver divides the incoming data unit by the divisor. If there is no
remainder, the data unit is assumed to be correct and is accepted.
Otherwise, it is understood that the data is corrupted and is therefore
rejected.
