ESP32-C3 Series SoC

Errata

Introduction

This document describes known errata in ESP32-C3 series of SoCs.

Version 1.1
Espressif Systems
Copyright © 2024

www.espressif.com
Contents

Contents

Chip Identification 3
1 Chip Revision 3
2 Additional Methods 5

Errata Description 7
3 SAR ADC 7
3.1 The Digital Controller of SAR ADC2 cannot work 7
3.2 SAR ADC Cannot Sample Sufficient Data in DMA Continuous Conversion Mode after Restart 7

Related Documentation and Resources 9

Revision History 10

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Chip Identification

Chip Identification
Note:

Check the link or the QR code to make sure that you use the latest version of this document:
https://espressif.com/sites/default/files/documentation/esp32-c3_errata_en.pdf

1 Chip Revision
Espressif is introducing vM.X numbering scheme to indicate chip revisions.

M – Major number, indicating the major revision of the chip product. If this number changes, it means the
software used for the previous version of the product is incompatible with the new product, and the software
version shall be upgraded for the use of the new product.

X – Minor number, indicating the minor revision of the chip product. If this number changes, it means the
software used for the previous version of the product is compatible with the new product, and there is no
need to upgrade the software.

The vM.X scheme replaces previously used chip revision schemes, including ECOx numbers, Vxxx, and other
formats if any.

The chip revision is identified by:

• eFuse field EFUSE_RD_MAC_SPI_SYS_5_REG[25:23] and EFUSE_RD_MAC_SPI_SYS_3_REG[20:18]

Table 1: Chip Revision Identification by eFuse Bits

Chip Revision
eFuse Bit v0.0 v0.1 v0.2 v0.3 v0.4 v1.1
EFUSE_RD_MAC_SPI_SYS_5_REG[25] 0 0 0 0 0 0
Major Number
EFUSE_RD_MAC_SPI_SYS_5_REG[24] 0 0 0 0 0 1
EFUSE_RD_MAC_SPI_SYS_5_REG[23] 0 0 0 0 0 0
EFUSE_RD_MAC_SPI_SYS_3_REG[20] 0 0 0 0 1 0
Minor Number
EFUSE_RD_MAC_SPI_SYS_3_REG[19] 0 0 1 1 0 0
EFUSE_RD_MAC_SPI_SYS_3_REG[18] 0 1 0 1 0 1

• Main Die line in chip marking

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Chip Identification

Pin 1

Espressif Logo

Product Name Product Name

Date Code WWYYYY

Espressif
XXXXXXXXXXX
Tracking Information

Figure 1: Chip Marking Diagram

Table 2: Chip Revision Identification by Silk Print

Chip Revision Main Die

v0.0 XAXXXXXXXX
v0.1 XBXXXXXXXX
v0.2 XCXXXXXXXX
v0.3 XDXXXXXXXX
v0.4 XEXXXXXXXX
v1.1 XHXXXXXXXX

• Specification Identifier line in module marking

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 Chip Identification

Espressif Logo

Module Name

Certi cation ID

Company Name
Data Matrix
Speci cation Identi er

Figure 2: Module Marking Diagram

Table 3: Chip Revision Identification by Module Marking

Chip Revision Specification Identifier1

v0.0 –
v0.1 –
fi v0.2 –
v0.3 XXXXXX
v0.4 M4XXXX
v1.1 –
1 – means modules with this chip revision are not
mass produced.

Note:

• Information about ESP-IDF release that supports a specific chip revision is provided in Compatibility Between
ESP-IDF Releases and Revisions of Espressif SoCs.

• For more information about the chip revision upgrade and their identification of ESP32-C3 series products,
please refer to ESP32-C3 Product/Process Change Notifications (PCN).

• For more information about the chip revision numbering scheme, see Compatibility Advisory for Chip Revision
Numbering Scheme.

2 Additional Methods
Some errors in the chip product don’t need to be fixed at the silicon level, or in other words in a new chip
revision.

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Chip Identification

In this case, the chip may be identified by Date Code in chip marking (see Figure 1). For more information,
please refer to Espressif Chip Packaging Information.

Modules built around the chip may be identified by PW Number in product label (see Figure 3). For more
information, please refer to Espressif Module Packaging Information.

Figure 3: Module Product Label

Note:
Please note that PW Number is only provided for reels packaged in aluminum moisture barrier bags (MBB).

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Errata Description

Errata Description
Table 4: Errata Summary

Affected Revisions
Category Description v0.0 v0.1 v0.2 v0.3 v0.4 v1.1
3.1 The Digital Controller of SAR ADC2 cannot work Y Y Y Y Y Y
SAR ADC
3.2 SAR ADC Cannot Sample Sufficient Data in DMA
Y Y Y Y Y Y
Continuous Conversion Mode after Restart

3 SAR ADC
3.1 The Digital Controller of SAR ADC2 cannot work
Description

The Digital Controller of SAR ADC2 may receive a false sampling enable signal. In such a case, the controller
will enter an inoperative state.

Workarounds

It is suggested to use SAR ADC1.

Solution

No fix scheduled.

3.2 SAR ADC Cannot Sample Sufficient Data in DMA Continuous Conversion Mode after
Restart
Description

In DMA continuous conversion mode, if the SAR ADC is stopped and then restarted, the internal hardware
counter that counts ADC samples will not be automatically cleared, and there is no dedicated register to
manually clear it.

Consequently, users might encounter scenarios such as:

• Garbled sampling results

• Samples fewer than the configured value

Workarounds

Before starting the ADC continuous conversion:

1. Reset the ADC by first setting and then clearing SYSTEM_APB_SARADC_RST

2. Sequentially configure the 16-bit APB_SARADC_APB_ADC_EOF_NUM field with all values ranging from
the previously configured value down to 0, so as to clear the ADC sample counter

Note that this flow may take around 14 ms at most.

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Errata Description

Solution

No fix scheduled.

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Related Documentation and Resources

Related Documentation and Resources

Related Documentation
• ESP32-C3 Series Datasheet – Specifications of the ESP32-C3 hardware.
• ESP32-C3 Technical Reference Manual – Detailed information on how to use the ESP32-C3 memory and periph-
erals.
• ESP32-C3 Hardware Design Guidelines – Guidelines on how to integrate the ESP32-C3 into your hardware prod-
uct.
• Certificates
https://espressif.com/en/support/documents/certificates
• ESP32-C3 Product/Process Change Notifications (PCN)
https://espressif.com/en/support/documents/pcns?keys=ESP32-C3
• ESP32-C3 Advisories – Information on security, bugs, compatibility, component reliability.
https://espressif.com/en/support/documents/advisories?keys=ESP32-C3
• Documentation Updates and Update Notification Subscription
https://espressif.com/en/support/download/documents

Developer Zone
• ESP-IDF Programming Guide for ESP32-C3 – Extensive documentation for the ESP-IDF development framework.
• ESP-IDF and other development frameworks on GitHub.
https://github.com/espressif
• ESP32 BBS Forum – Engineer-to-Engineer (E2E) Community for Espressif products where you can post questions,
share knowledge, explore ideas, and help solve problems with fellow engineers.
https://esp32.com/
• The ESP Journal – Best Practices, Articles, and Notes from Espressif folks.
https://blog.espressif.com/
• See the tabs SDKs and Demos, Apps, Tools, AT Firmware.
https://espressif.com/en/support/download/sdks-demos

Products
• ESP32-C3 Series SoCs – Browse through all ESP32-C3 SoCs.
https://espressif.com/en/products/socs?id=ESP32-C3
• ESP32-C3 Series Modules – Browse through all ESP32-C3-based modules.
https://espressif.com/en/products/modules?id=ESP32-C3
• ESP32-C3 Series DevKits – Browse through all ESP32-C3-based devkits.
https://espressif.com/en/products/devkits?id=ESP32-C3
• ESP Product Selector – Find an Espressif hardware product suitable for your needs by comparing or applying filters.
https://products.espressif.com/#/product-selector?language=en

Contact Us
• See the tabs Sales Questions, Technical Enquiries, Circuit Schematic & PCB Design Review, Get Samples
(Online stores), Become Our Supplier, Comments & Suggestions.
https://espressif.com/en/contact-us/sales-questions

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Revision History

Revision History

Date Version Release Notes

• Added Section 3.2 SAR ADC Cannot Sample Sufficient Data in DMA Con-
tinuous Conversion Mode after Restart
2024-01-19 v1.1 • Added chip revision v1.1
• Added Chapter 2 Additional Methods
• Added a note under Table 4

2022-11-14 v1.0 First release

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