ELECTRONIC PRINCIPLES AND DEVICES
Hema N
Department of Electronics and Communication
ELECTRONIC PRINCIPLES AND DEVICES
Introduction to Communication Systems
Hema N
Department of Electronics and Communication
ELECTRONIC PRINCIPLES AND DEVICES
Electronic communication Systems
What is Communication?
ELECTRONIC PRINCIPLES AND DEVICES
Electronic communication Systems
What is Communication?
Communication is a process of transmission of
an idea or feeling so that the sender and receiver
share the same level of understanding.
Aditya Srivastava
ELECTRONIC PRINCIPLES AND DEVICES
Electronic communication Systems
Communication system is composed of the following
blocks
Aditya Srivastava
ELECTRONIC PRINCIPLES AND DEVICES
Electronic communication Systems
Adrusht
ELECTRONIC PRINCIPLES AND DEVICES
Electronic communication Systems
Input Transducer
Source: Analog or digital
Example:
Speech, music, written text
Input Transducer: Converts the message produced by a source to a form suitable
for the communication system.
Example:
Speech waves ,Microphone Voltage
Adnaan
ELECTRONIC PRINCIPLES AND DEVICES
Electronic communication Systems
Transmitter
The device that converts the electrical signal into a signal suitable for
transmission over a given medium.
Transmission channel
• The physical medium on which the signal is carried.
• Every channel introduces some amount of distortion, noise and
interference
Example:
Air, wires, coaxial cable, radio wave, laser beam, fiber optic cable.
Aditya Mohan
ELECTRONIC PRINCIPLES AND DEVICES
Electronic communication Systems
Receiver:
The device that recovers the transmitted signal from the channel
Amplification
Demodulation
Filtering
In an ideal transmission the receiver output is scaled and possibly it is delayed
version of the message signal.
In a Practical condition the received signal will have signal component
disturbed by noise.
Example:
TV set, radio, web client
Advaith Sanil
ELECTRONIC PRINCIPLES AND DEVICES
Electronic communication Systems
Output Transducer
Transducer converts electrical signal into the desired form by the system.
Transducer can be active transducer and passive transducers based on
whether a power source is required or not.
Active transducer doesn’t require any power source for their operations, these
transducers work on the principle of energy conversion.
Passive transducer requires an external power source for their operation.
Advaith Srinivas
ELECTRONIC PRINCIPLES AND DEVICES
Modulation and Demodulation
Modulation
Modulation is a process of changing the carrier signal characteristics according to the
message signal.
Types of Modulation:
Continuous Modulation : Amplitude Modulation (AM)
Frequency Modulation(FM)
Digital Modulation : Amplitude shift Keying (ASK)
Phase shift Keying (PSK)
Frequency shift Keying (FSK)
Aditya V
ELECTRONIC PRINCIPLES AND DEVICES
Modulation and Demodulation
Types of Analog Modulation
• If the amplitude of the carrier is varied according to the message it is called as Amplitude modulation
Amplitude varying-frequency constant
• If the frequency of the carrier is varied according to message it is called as Frequency Modulation.
Large amplitude:
Small amplitude:
high frequency
low frequency
Frequency varying-amplitude constant
Adyansh
ELECTRONIC PRINCIPLES AND DEVICES
Modulation and Demodulation
Types of Digital Modulation
In Digital Modulation the information will be in binary form i.e. 1s and 0s where as carrier will be
continuous.
The amplitude or phase of the carrier will be varied according to binary data.
Adya
ELECTRONIC PRINCIPLES AND DEVICES
Modulation and Demodulation
Need for Modulation
Modulation increases the distance over which the signal can be transmitted
faithfully.
Modulation reduces the height of the antenna.
Modulation avoid Mixing of signals.
Modulation will reduce noise and interference.
Modulation for multiplexing.
Modulation helps to adjust bandwidth.
Aditi S
ELECTRONIC PRINCIPLES AND DEVICES
Modulation and Demodulation
Demodulation
The process of recovering the message from the modulated signal is called
demodulation.
Two types of demodulation
• Coherent
• Non coherent
In coherent technique a local oscillator is tuned to frequency of carrier to get back the
message.
Non-Coherent does not use any Local oscillator
Aditi S
ELECTRONIC PRINCIPLES AND DEVICES
Modulation and Demodulation
Applications
Application Frequency Band
AM Radio 0.54-1.6 MHz
TV 54-88 MHz
174-216 MHz
FM Radio 88-108 MHz
Cellular mobile radio 806-901 MHz
Aditya A
ELECTRONIC PRINCIPLES AND DEVICES
Fundamental concepts of Cellular Telephone
The Cellular Concept System Design Fundamentals
Goals of a Cellular System
High capacity
Large coverage area
Efficient use of limited spectrum
For Large coverage area Single Transmission requires , high power and tall
tower .
Single Transmission can provide service to Small number of users only.
Single transmission has Poor spectrum utilization.
Adit Srivastava
ELECTRONIC PRINCIPLES AND DEVICES
Frequency Reuse and Co-channel Interference
Cellular concept
Frequency reuse pattern
Adityaa K
ELECTRONIC PRINCIPLES AND DEVICES
Fundamental concepts of Cellular Telephone
Cellular concept and Frequency reuse pattern
Each cellular base station is allocated a group of radio
channels within a small geographic area called a cell.
Neighbouring cells are assigned different channel groups.
By limiting the coverage area to within the boundary of the
cell, the channel groups may be reused to cover different
cells.
Aditi P
ELECTRONIC PRINCIPLES AND DEVICES
Fundamental concepts of Cellular Telephone
Cellular concept and Frequency reuse pattern
Keep interference levels within tolerable limits.
Frequency reuse or frequency planning seven groups of channel from A
to G footprint of a each cell is the actual radio coverage.
Each cell uses Omni-directional antenna
Advay P
ELECTRONIC PRINCIPLES AND DEVICES
Fundamental concepts of Cellular Telephone
Use of Cellular concept
Solves the problem of spectral congestion and user capacity.
Offer very high capacity in a limited spectrum without major technological changes.
Helps in Reuse of radio channel in different cells.
Enable a fix number of channels to serve an arbitrarily large number of users by
reusing the channel throughout the coverage region.
Abhinav S
ELECTRONIC PRINCIPLES AND DEVICES
Fundamental concepts of Cellular Telephone
Cells
base station antennas designed to cover specific cell area
hexagonal cell shape assumed for planning
simple model for easy analysis → circles leave gaps
actual cell “footprint” is amorphous (no specific shape)
where Tx successfully serves mobile unit
Base station location
cell center → omni-directional antenna (360° coverage)
not necessarily in the exact center (can be up to R/4 from the
ideal location)
Aditi H
ELECTRONIC PRINCIPLES AND DEVICES
Fundamental concepts of Cellular Telephone
cell corners → sectored or directional antennas on 3 corners with 120°
coverage.
very common
Note that what is defined as a “corner” is somewhat flexible → a
sectored antenna covers 120° of a hexagonal cell.
So one can define a cell as having three antennas in the center or
antennas at 3 corners.
Adarsh R
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
Handoff Strategies
Handoff: when a mobile unit moves from one cell to another while a call is in
progress, the MSC (Mobile switching Centre) must transfer (handoff) the call to a
new channel belonging to a new base station
new voice and control channel frequencies
very important task → often given higher priority than new call
It is worse to drop an in-progress call than to deny a new one
choose a (handoff threshold) > (minimum useable signal level)
so there is time to switch channels before level becomes too low
as mobile moves away from base station and toward another base station
Adarsh N
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
ROAMING
A mobile may move into a different system controlled by a different MSC
Called an intersystem handoff
Issues involved in Roaming
1. Prioritizing Handoffs
Issue: Perceived Grade of Service (GOS) – service quality as viewed by users
“quality” in terms of dropped or blocked calls (not voice quality)
assign higher priority to handoff vs. new call request
a dropped call is more aggravating than an occasional blocked call
Advik B
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
2. Guard Channels
Percentage of total available cell channels exclusively set aside
for handoff requests
Makes fewer channels available for new call requests
A good strategy is dynamic channel allocation (not fixed)
adjust number of guard channels as needed by demand
so channels are not wasted in cells with low traffic
Akshaj L
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
3. Queuing Handoff Requests
use time delay between handoff threshold and minimum useable signal
level to place a blocked handoff request in queue
a handoff request can "keep trying" during that time period, instead of
having a single block/no block decision
prioritize requests (based on mobile speed) and handoff as needed
calls will still be dropped if time period expires
Amey
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
Practical Handoff Considerations
Problems occur because of a large range of mobile velocities
pedestrian vs. vehicle user
Small cell sizes and/or micro-cells leads to larger number of handoffs
Mobile Switching Centre load is heavy when high speed users are passed
between very small cells
Sharmistha
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
Umbrella Cells
use different antenna heights and Tx power levels to provide large and
small cell coverage
multiple antennas & Tx can be co-located at single location if necessary
(saves on obtaining new tower licenses)
large cell → high speed traffic → fewer handoffs
small cell → low speed traffic
Example areas: interstate highway passing thru urban center, office park, or
nearby shopping mall.
Amitesh
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
Typical handoff parameters
Analog cellular (1st generation)
threshold margin △ ≈ 6 to 12 dB
total time to complete handoff ≈ 8 to 10 sec
Digital cellular (2nd generation)
total time to complete handoff ≈ 1 to 2 sec
lower necessary threshold margin △ ≈ 0 to 6 dB
enabled by mobile assisted handoff
Akshay Bhat
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
Benefits of small handoff time
greater flexibility in handling high/low speed
users
queuing handoffs & prioritizing
more time to “rescue” calls needing urgent
handoff
fewer dropped calls → GOS increased
can make decisions based on a wide range of
metrics other than signal strength
such as measure interference levels
can have a multidimensional algorithm for
making decisions
Amogh A
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
MSC dynamically decides which signal is best and then
listens to that one
Soft Handoff
passes data from that base station on to the
PSTN(Public switched telephone Network)
This choice of best signal can keep changing.
Mobile user does nothing for handoffs except just
transmit, MSC does all the work
Advantage is unique to CDMA (Code-division Multiple
access) systems
As long as there are enough codes available.
Akshaj A
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
Co-Channel Interference
During Frequency reuse there are several cells that use the same set
of frequencies which leads to co-channel interference.
To reduce co-channel interference (CCI) , co-channel cell must be
separated by a minimum distance.
Akshaya P
ELECTRONIC PRINCIPLES AND DEVICES
Roaming and hand-offs
Co-Channel Interference
When the size of the cell is approximately the same
co-channel interference is independent of the transmitted
power
co-channel interference is a function of
R: Radius of the cell
D: distance to the centre of the nearest co-channel cell
Increasing the ratio Q=D/R, the interference is reduced.
Q is called the co-channel reuse ratio
UNIT IV continuation
CORE OF THE EMBEDDED SYSTEM
Aman
INTRODUCTION TO EMBEDDED SYSTEMS
An Embedded system is an electronic /electromechanical system designed to perform a
specific function and is a combination of both Hardware and Software.
It is unique and the hardware and firmware are highly specialized to the application
domain.
An embedded system is a microcontroller or microprocessor based system which is
designed to perform a specific task. For example, a fire alarm is an embedded system; it
will sense only smoke
An embedded system is a microcontroller or microprocessor
based system which is designed to perform a specific task
Afrah
Sensors and Actuators
Sensors
A sensor is a transducer device that converts energy from one form to
another for any measurement or control purpose. Ex: Temperature Sensor,
Pressure sensor.
Actuators
An actuator is a form of transducer device (mechanical or electrical) which
converts signals to corresponding physical motion. It is an output device.
Ex: Electric motors, Stepper motors, LED (Light Emitting Diode).
Akshaya Krishna
INTRODUCTION TO EMBEDDED SYSTEMS
Purpose of Embedded Systems
Data Collection/ Storage/Representation
Data Communication
Data processing, Monitoring
Control Application specific user interface.
Applications of Embedded Systems
Consumer electronics - Televisions and digital cameras, computer printers, video game
consoles and home entertainment systems like PS4
Household appliances – Refrigerators, washing machines, microwave ovens, air conditioners
Home automation - switching off electrical appliances like air-conditioners or refrigerators ,
security alarms.
Banking and retail - Automated teller Machine (ATM)
Measurement and Instrumentation - Digital CRO, Digital Multi meter, Logic Analyzer
Health care - Scanners like those for MRI, CT, ECG machines devices to monitor blood
pressure and heartbeat
Automotive industry. - Airbags, anti-lock braking system , cruise control, rain-sensing wipers,
emission control, traction control, automatic parking
Allan Suraj
Characteristics of an Embedded Systems
A system which is a combination of special purpose hardware and
embedded OS for executing a specific set of applications.
May or may not contain an operating system for functioning.
The firmware (software permanently installed in the device) of an ES is pre-
programmed and it is non alterable by the end user.
Application specific requirements are the key deciding factors.
Highly tailored to take advantage of the power saving modes supported by
the hardware and the OS.
Execution behaviour is deterministic for certain types of ES like “Hard Real
Time Systems” (strict deadline).
The response time requirement is critical for some critical systems.
Embedded systems are created to perform the task within a certain time
frame. It must therefore perform fast enough
Alisha P
Classification of Embedded System
Multiple Classifications based on different criteria:
Based on Generation
First Generation - Built around 8bit microprocessor & microcontroller,
Simple in hardware circuit & firmware developed. Ex: Digital telephone
keypads
Second Generation - Built around 16-bit μp & 8-bit μc, They are more
complex & powerful than 1G μp & μc, Ex: SCADA systems Supervisory
Control & Data Acquisition System
Third Generation - Built around 32-bit μp & 16-bit μc , Concepts like
Digital Signal Processors(DSPs), Application Specific Integrated
Circuits(ASICs) evolved. Ex: Robotics, Media.
Fourth Generation- Built around 64-bit μp & 32-bit μc , The concept of
System on Chips (SoC), Multicore Processors evolved, Highly complex
& very powerful. Ex: Smart Phones
Ahana S
Classification of Embedded System
Multiple Classifications based on different criteria:
Based on complexity and Performance
Small Scale Embedded systems - Simple in application need ,Performance
not time-critical, Built around low performance & low cost 8 or 16 bit μc,
Ex: Electronic toy
Medium Scale Embedded systems - uses a single 16bit or 32-bit μc or
multiple microcontrollers linked together. These systems have a lot of
hardware as well as software complexities, hence are not preferred by
many Ex: Industrial machines.ma
Large Scale Embedded systems - Built around 32 or 64 bit RISC μp/μc or
PLDs or Multicore Processors , functions on multiple algorithms that
results in complexities in both hardware and software. They often need a
processor that is configurable and logic array that can be programmed.
Response is time-critical. Ex: Mission critical applications
Akanksha V
Classification of Embedded System
Multiple Classifications based on different criteria:
Based on Deterministic Behaviour
Deterministic/Non Deterministic
Real time ES: Hard/ Soft
Real-time implies deterministic timing behavior –OS services consumes only known
& expected amount of time regardless the no of services.
RTOS decides which application should run in which order & how much time needs
to be allocated for each applications. Time Management is the basic function of
RTOS.
Examples: Digital camera, Thumb Impression Reader & ATM
Akhilesh
Core of the Embedded Systems
Embedded Systems are built around a central Core
General Purpose and Domain Specific Processors
Microprocessors
Microcontrollers
Digital Signal processors
Application Specific Integrated Circuits (ASIC's)
Programmable Logic Devices (PLD's)
Commercial Off the Shelf Components (COTS)
Akash M
Microprocessor Vs Microcontroller
Microprocessor Microcontroller
A silicon chip representing CPU, A highly integrated chip that
performing ALU operations contains Scratch pad RAM, special
according to pre defined set of and general purpose register arrays,
instructions. on chip ROM/FLASH memory for
program storage, timer and
interrupt controller units and
dedicated I/O ports.
It is a dependent unit. It is independent unit.
General purpose design and
Application oriented or domain
operation.
specific.
Doesn't contain a built in I/O port.
Contains multiple built in I/O ports.
Targeted for high end market where
Targeted for Embedded market.
performance is important.
Includes lot of power saving
Limited power saving options. features.
Akshath Ajay
Digital Signal Processor
Powerful special purpose 8/16/32 bit microprocessor designed specifically to
meet the computational demands and power constraints of different
application's.
2 to 3 times faster than GPP in signal processing application's.
It implements algorithms in hardware which speeds up the execution.
A typical DSP incorporates the following units:
Program Memory: storing program required by DSP.
Data Memory: Storing temporary variables and data /signal to be
processed.
Computational Engine: Performs the signal processing accordance
with the stored program memory.
I/O unit: Acts as an interface between the outside world and DSP(
capturing signals and delivering processed signals).
Ex: Audio video signal processing, telecommunication and Multimedia
Application, real time calculations like FFT, DFT, SOP etc.,
Akshay Nag
General Purpose Processor Vs
Application Specific Instruction Set Processor
GPP ASIP
Designed for general The processors contains architecture and
Computational Tasks. instruction set optimised to specific
Ex: laptop, Desktop domain/ application requirements.
It contains ALU and Control Ex: SoC, DSP's used in automotive,
Unit. Telecom, media applications etc.,
High volume of production / low It incorporates a processor and on chip
cost per unit. peripherals demanded by the application
requirement, program and data memory.
It fills the architectural spectrum
between GPP and ASIC's.
Akshat
Application Specific Integrated
Circuits (ASIC's)
It is a microchip deigned to perform a specific or unique application.
Used as a replacement for conventional general purpose logic chips.
It integrates several functions into a single chip and consumes very small area
in the total system.
It can be pre-fabricated for a special application or it can be custom fabricated
by using the components from a re-usable building block library of components
.
Non Recurring Engineering Charge (NRE) : It is a non refundable initial
investment for the fabrication of ASIC's and it is a one time investment.
Application Specific Standard Product (ASSP): If the Non Recurring
Engineering Charges is borne by a third party and the Application Specific
Integrated Circuit (ASIC) is made openly available in the market, the ASIC is
reffered as ASSP.
Ex: ADE7760 Energy Metre ASIC developed by Analog Devices for Energy
Metreing applications.
Amogh H
Programmable Logic Devices (PLD's)
PLD's can be re- configured to perform any number of functions at any time.
Features of PLD's
It has a wide range of logic capacity, features, speed and voltage characteristics
The designers uses inexpensive software tools to quickly develop, simulate and
test their designs.
There are no NRE cost and the final design is completed fastly.
PLD's are based on re-writable memory technology.
Two major types of PLD's are
CPLD's : offer smaller amount of logic up to about 10,000 gates,
offer very predictable timing characteristics suitable for critical
control applications. Ex: Xilinx Coolrunner.
FPGA's: offer highest amount of logic density, the most features and
the highest performance. Ex: Xilinx VirtexTM.
Amogh G
Commercial Off -the -Shelf Components
(COTS)
COTS provides easy integartion and interoperability with existing system
components.
It can be developed around GPP, Domain specific Processor , ASIC or PLDs
Advantage:
Readily available in market, cheap and a developer can cut down his/her
development time to a great extent.
Disadvantage:
Due to rapid change in technology, if the COTS component is withdrawn by
the manufacturer/ or discontinue the production , will adversely affect a
commercial manufacturer of ES which make use of the specific COTS
product.
Amrith
Memory
Memory is required for holding data temporarily during certain operations.
On chip memory: built in memory
Off chip memory: external memory connected with the controller/
processor for storing controller algorithm.
Program Storage Memory
Also called as code storage memory of an ES stores the program
instructions.
It retains its contents even after the power to it is turned off.( non-volatile
storage memory)
Ankita S
Program Storage Memory (ROM)-
Classification
Depends on fabrication, erasing and programming technique, ROM is divided as
follows:
A) Masked ROM (MROM)
•One time Programmable device
•Uses hardwired technology to store the data
•This is low cost for high volume of production.
•It is a good candidate for storing the embedded firmware for low cost
embedded device.
•Limitation is that its inability to modify the device firmware against firmware
upgrades.
B) Programmable Read Only memory (PROM/OTP)
•The end user is responsible for programming this memory
•This memory consists of polysilicon or nichrome wires functionally viewed
as fuses
•Fuses which are not blowned /burned represents logic “1” whereas fuses
which are blowned/ burned represents logic “0”
•OTP isused in commercial production of ES
Anjaneya
Program Storage Memory (ROM)-Classification
(contd...)
C) Erasable Programmable Read Only Memory ( EPROM)
•EPROM gives flexibility to re-program the same chip.
•It stores the bit information by charging the floating gate of an FET to a high
voltage.
•It contains a quartz crystal window , which is exposed to UV rays for 20 to
30 minutes, the entire memory will be erased.
•Limitation is Erasing the memory using UV rays is tedious and time
consuming process.
D) Electrically Erasable Programmable Read Only Memory ( EEPROM)
•The information contained in this memory can be erased and re-programmed
in-circuit using electrical signals at register/Byte level.
•It provides greater flexibility for system design.
•Limitation is its capacity (only a few kilobytes).
Ananya S
Program Storage Memory (ROM)-
Classification (contd...)
E) FLASH
•Latest ROM technology which combines the re-progarmmability of
EEPROM and high capacity of standard ROMs.
•It is organized as sectors /pages.
•It stores the information in array of floating gate of an MOSFET.
•Each sector is erased before re-programming and it is done at sector level
/page level without affecting sector/page.
•The typical erasable capacity is 1000cycles.
Ex: W27C512 from WINDBOND (64 KB FLASH memory)
F) NVRAM ( Non volatile RAM - non-volatile storage memory)
•It is a RAM with battery backup.
•The lifespan of NVRAM is around 10 years
Ex: DS1644 from Maxim/Dallas (32 KB NVRAM)
Ananya R S
Read- Write Memory/ Random Access
Memory (RAM)
RAM is the data or working memory of controller/ processor wher it can read from
it and write to it.
It is volatile in nature (requires power to maintain the stored information)
It is a direct access memory
Categories:
•Static RAM (SRAM)
•Dynamic RAM (DRAM)
•Non-volatile RAM (NVRAM)
Ananya N
Read- Write Memory/ Random Access Memory
(RAM) - Classification
A) Static RAM (SRAM)
•It is the fastest form of RAM available (Resistive networking and Switching
capabilities).
•It is made up of flip-flops and stores data in the form of voltage.
•It is realised using six transitors (MOSFET) out of which four is for building
the latch part of memory cell and two for controlling the access.
•The major limitation of SRAM are low capacity and high cost.
B) Dynamic RAM
It stores the data in the form of charge
Advantage: high density and low cost
Disadvantage: Since it is stored as charge , it will get leaked off with
time, so refreshing is needed.
Special circuits called DRAM controllers are used for refreshing the operation.
Ankita M
Difference between SRAM and DRAM
SRAM DRAM
Made up of 6 CMOS Transistors Made up of a MOSFET and a
(MOSFET) capacitor
Doesn't require refreshing Require refreshing
Low capacity High Capacity
Fast in operation. Typical access time is Less expensive
10ns Slow in operation. Typical access
time is 60ns
Write Operation is faster than read
operation
Amogh Singh
Read- Write Memory/ Random Access Memory
(RAM)- Classification contd...
C) NVRAM ( Non volatile RAM)
•It is a RAM with battery backup.
•It contains static RAM based memory
•The lifespan of NVRAM is around 10 years
•Ex: DS1744 from Maxim/Dallas (32 KB NVRAM)
D) Memory according to the Type of Interface
Parallel Interface: Parallel data lines for an 8 bit processor/controller will be
connected to the memory (memory size is in terms of kilobytes).
Serial Interface: I2C :2 line serial interface (used for data storage memory like
EEPROM, memory size is in terms of kilobits) .
Ex: Atmel Corporations AT24C512 (512 K bits/ 2 wire interface).
Serial Peripheral Interface (SPI) : 2+n line interface where n stands for the total
number of SPI bus devices in the system.
Single wire interconnection.
Anagha
I/O Subsystem
The I/O subsystem of the embedded system facilitates the interaction of the embedded
system with the external world.
Light Emitting Diode (LED)
7 Segment LED display
Optocoupler - transfers electrical signals between two isolated circuits by using light.
Stepper Motor- DC motors that move in discrete steps. electromagnetic device that
converts digital pulses into mechanical shaft rotation.
Relay - switches that open and close circuits electromechanically or electronically.
either make or break a circuit.
Piezo Buzzer - electronic device that's used to produce a tone, alarm or sound
Push Button Switch - two-position devices actuated with a button that is pressed and
released.
Keyboard - mechanisms under the keycaps on a mechanical keyboard that enable you
to type faster and more precisely
Programmable Peripheral Interface (PPI) - general purpose programmable I/O device
designed to interface the CPU with its outside world such as ADC, DAC, keyboard etc
Amshul
Communication Interface
Device/ Board level communication Interface ( Onboard Communication
Interface)
•The communication channel which interconnects the various
components within an embedded product
Ex: Serial Interface like I2C, SPI , UART(Universal Asynchronous
Receiver/Transmitter), 1-Wire & parallel bus interface
Product level Communication Interface (External Communication
Interface)
•Responsible for data transfer between the embedded system and
other devices or modules.
•It can be wired media , wireless media , serial or parallel interface
Ex: IR(Infrared) , Bluetooth, Wi- Fi (Wireless Fidelity) , RS232c
(Recommended Standard 232), USB(Universal Serial Bus), Ethernet
etc
Aniruddh Balachandra
Onboard communication Interfaces
Inter Integrated Circuit (I2C)
•It is a synchronous bi-directional half duplex (devices can only
transmit data in two directions but not at same time) two wire serial
interface bus.
•It provides an easy way of connection between a microprocessor/
microcontroller system and the peripheral chips in television sets.
•It comprise of two bus lines:
»Serial Clock- SCL: Responsible for generating
synchronisation clock pulses
» Serial Data – SDA : Responsible for transmitting the
serial data across devices.
•It supports multimasters on the same bus
•It supports three different data rates
»Standard Mode: ( Data rate upto 100Kbps)
»Fast Mode: ( Data rate upto 400Kbps)
»High Speed Mode: ( Data rate upto 3.4Mbps)
Angad
Onboard communication Interfaces contd...
It is a shared bus system. The devices connected to it can act as Master or
Slave.
Master: Responsible for controlling the communication by
initiating/terminating data transfer, sending data and generating
synchronisation clock pulses.
Slave : waits for the commands from the master and respond upon the
receiving commands.
Master and slave device can act as either transmitter or receiver.
The synchronisation clock signal is generated by the Master device ,
regardless the master is acting as transmitter or receiver.
Ananya A
ARM Processor
• ARM stands for Advanced RISC Machines.
Where RISC: Reduced-instruction-set Computing
• Founded 1990, owned by Acorn, Apple and VLSI.
• ARM is one of the most licensed and thus widespread processor cores in the
world.
• Used especially in portable devices due to low power consumption and
reasonable performance.
• Used in PDA, cell phones, multimedia players, handheld game console, digital
TV and cameras
• ARM has several processors that are grouped into number of families based
on the processor core they are implemented with.
• The architecture of ARM processors has continued to evolve with
every family.
• Some of the famous ARM Processor families are ARM7, ARM9, ARM10
and ARM11
Ankith K
RISC Characteristics
Anika P
Features of ARM7
•32 bit Processor
•32 bit ALU
•32 bit data bus
•32 bit instructions
•32 Address bus
•Von Neumann Architecture
•Three stage Pipelining
Amogh Varsh
ARM PROCESSOR FUNDAMENTALS
Anantha Rama
Data flow model
Data enters the processor core through data bus
Instruction decoder translates instructions before they are executed.
Data items are placed in register file-storage bank made of 32- bit registers
Sign extend converts signed 8-bit and 16-bit numbers to 32 bit values
Two source registers- Rn and Rm Single destination register Rd
Source operands are read from register file using internal buses A and B
ALU takes the register values Rn and Rm and computes the result
Barrel shifter computes the result for any number of shifts within a clock
cycle .
This is achieved as it is combinational logic (not sequential)
ex:ADD R3,R2,LSL#4
Multiply-Accumulate Circuit is used to perform both multiply and add
Ex : Matrix addition and multiplication
Load and store instructions use the ALU to generate an address to be held in
the address register and broadcast on the Address bus
Amshuman
Data flow model
As ARM is van neuman architecture, so same bus is used to load instruction and
data. Hence, input data bus enters the processor core is connected to
i. Instruction decode Block
ii. Direct Register bank
iii. Sign extend hardware block (which again connected to register file)
i. Instruction decoder translates instructions before they are executed.
ii. Data items are placed in register file-storage bank made of 32- bit registers.
Since the ARM core is a 32-bit processor, most instructions treat the registers as
holding signed or unsigned 32-bit values.
iii. Sign extend hardware converts signed 8-bit and 16-bit numbers to 32 bit
values as they are read from memory and placed in a register
Amshuman
Data flow model
.iii. Sign extend hardware converts signed 8-bit and 16-bit numbers to 32
bit values as they are read from memory and placed in a register.
Two source registers-Rn and Rm Single destination register Rd.
Source operands are read from register file using internal buses A and B
and these buses are connected to basic processing units.
Anish M
Data flow model
Basic processing unit are :
i. ALU (Arithmetic Logic Unit)
ii. Barrel Shifter
iii. MAC (Multiply and Accumulate Unit)
ALU (Arithmatic and Logical Unit)
ALU takes values Rn and Rm and computes results
ALU performs add, sub etc. (Mathematical operations)
OR/AND etc (logical operations ) on the data present in data registers
example: ADD R3,R2,R1; // R3 = R2+R1
Load and store instructions use the ALU to generate an address to be
held in the address register and broadcast on the Address bus
Anish M
Data flow model
Barrel Shifter:
A barrel shifter is a digital circuit that can shift a data
word by a specified number of bits in one clock cycle
Operand 2 (B) can be directly loaded or
Shifted by specified number of times.
Can achieve fast multiples or division by a power of 2
Example : 0010 is 2 if we left shift the data by one bit result is 0100
that is 4 hence multiply by 2.
If data is 1000 i.e. 8 and shift one bit to right then it is 0100 i.e..4
which is divided by 2
Instruction examples: ADD R3,R2,R1,LSL#4 // R3 = R2+R1<<4
Ankita Anand
Data flow model
Basic processing unit are :
i. ALU (Arithmetic Logic Unit)
ii. Barrel Shifter
iii. MAC (Multiply and Accumulate Unit)
ALU (Arithmatic and Logical Unit)
ALU takes values Rn and Rm and computes results
ALU performs add, sub etc. (Mathematical operations)
OR/AND etc (logical operations ) on the data present in data registers
example: ADD R3,R2,R1; // R3 = R2+R1
Load and store instructions use the ALU to generate an address to be
held in the address register and broadcast on the Address bus
Ankita Anand
Data flow model
Basic processing unit are :
MAC (Multiply and accumulate unit)
.
Multiply-Accumulate Circuit is used to perform both multiply and add.
The result of any operation can be written back to register bank.
Supports basic summation operation on data present in registers
Ex : Matrix addition and multiplication, summation operations
Aniket
Data flow model
Address register:
This contains the address from which data or instruction
needs to be fetched. (like start address)
This register is connected to Incrementer unit.
Aniruddha Budihal
REGISTERS
Stack Pointer- stores the head of the stack in the current processor mode
Link register- core puts the return address when it calls a subroutine
Program counter- contains the address o the next instruction to be fetched by
the processor
In ARM state the registers R0 – R15 are orthogonal (instruction type &
addressing mode vary independently) .
Any instruction that you can apply to R0 can equally well apply to other
registers
Anagha N B
Current Program Status Register (CPSR)
32-bit register
contains the present status of an internal operation
ARM uses CPSR to monitor and control internal operations.
CPSR is a dedicated 32-bit register and resides in the register file.
A generic program status register
Akshay Desu
Current Program Status Register (CPSR) contd...
PROCESSOR MODES
The processor mode determines which registers are active and the access
rights to the CPSR register itself.
Privileged mode-allows full read write access to CPSR
•Abort
•fast interrupt request
•Interrupt request
•Supervisor
•System
•Undefined
Non –Privileged mode
read access to control field to CPSR
read-write access to conditional flags
User
Chethan M S
Current Program Status Register (CPSR) contd...
PROCESSOR MODES
The ARM has seven operating modes:
User (unprivileged mode under which most tasks run).
FIQ (entered when a high priority (fast) interrupt is raised).
IRQ (entered when a low priority (normal) interrupt is raised).
Supervisor (entered on reset and when a Software Interrupt instruction is
executed).
Abort (used to handle memory access violation.
Undefined (used to handle undefined instructions).
System (privileged mode using the same registers as user mode).
Eshaan
Banked Registers
ARM has 37 registers in total, all of which are 32-bits long.
1 dedicated program counter
1 dedicated current program status register
5 dedicated saved program status registers
30 general purpose registers
20 registers are hidden from a program at different times. These registers are
called banked registers
They are available only when the processor is in a particular mode.
Eshaan
Current Program Status Register (CPSR) contd..
State and instruction sets
The state of the core determines which instruction set is being executed.
Three instruction sets
ARM-Arm state - A processor in one instruction set state cannot execute
instructions from another instruction set. a processor in ARM state cannot
execute Thumb instructions.
Thumb-Thumb state - Thumb mode provides greater code density, at
expense of speed.
Jazelle- Jazelle state - direct bytecode execution) is an extension that
allows some ARM processors to execute Java bytecode in hardware as a
third execution state