FDS7088N3

February 2004

FDS7088N3
30V N-Channel PowerTrench MOSFET

General Description Features

This N-Channel MOSFET has been designed • 21 A, 30 V RDS(ON) = 4 mΩ @ VGS = 10 V
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional RDS(ON) = 5 mΩ @ VGS = 4.5 V
switching PWM controllers. It has been optimized for
“low side” synchronous rectifier operation, providing an • High performance trench technology for extremely
extremely low RDS(ON) in a small package. low RDS(ON)

Applications • High power and current handling capability

• Synchronous rectifier • Fast switching

• DC/DC converter
• FLMP SO-8 package: Enhanced thermal
performance in industry-standard package size

Bottom-side
Drain Contact
5 4

6 3

7 2

8 1

Absolute Maximum Ratings TA=25oC unless otherwise noted

Symbol Parameter Ratings Units

VDSS Drain-Source Voltage 30 V
VGSS Gate-Source Voltage ±20
ID Drain Current – Continuous (Note 1a) 21 A
– Pulsed 60
PD Power Dissipation for Single Operation (Note 1a) 3.0 W
(Note 1b) 1.5
TJ, TSTG Operating and Storage Junction Temperature Range –55 to +150 °C

Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 40 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 0.5

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity
FDS7088N3 FDS7088N3 13’’ 12mm 2500 units

2004 Fairchild Semiconductor Corporation FDS7088N3 Rev D1 (W)

 FDS7088N3
Electrical Characteristics TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics
BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA 30 V
∆BVDSS Breakdown Voltage Temperature ID = 250 µA, Referenced to 25°C 25 mV/°C
∆TJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 10 µA
IGSS Gate–Body Leakage VGS = ±20 V, VDS = 0 V ±100 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 1 1.9 3 V
∆VGS(th) Gate Threshold Voltage ID = 250 µA, Referenced to 25°C –6 mV/°C
∆TJ Temperature Coefficient
RDS(on) Static Drain–Source VGS = 10 V, ID = 21 A 3.0 4 mΩ
On–Resistance VGS = 4.5 V, ID = 19 A 3.7 5
VGS = 10 V, ID = 21 A, TJ = 125°C 4.4 5.5
gFS Forward Transconductance VDS = 10 V, ID = 21 A 112 S
Dynamic Characteristics
Ciss Input Capacitance VDS = 15 V, V GS = 0 V, 3845 pF
Coss Output Capacitance f = 1.0 MHz 930 pF
Crss Reverse Transfer Capacitance 368 pF
RG Gate Resistance VGS = 15 mV, f = 1.0 MHz 1.4 Ω
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time VDD = 15 V, ID = 1 A, 15 27 ns
VGS = 10 V, RGEN = 6 Ω
tr Turn–On Rise Time 13 23 ns
td(off) Turn–Off Delay Time 62 99 ns
tf Turn–Off Fall Time 36 58 ns
Qg Total Gate Charge VDS = 15 V, ID = 21 A, 37 48 nC
VGS = 5.0 V
Qgs Gate–Source Charge 10 nC
Qgd Gate–Drain Charge 14 nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current 2.5 A
Drain–Source Diode Forward
VSD VGS = 0 V, IS = 2.5 A (Note 2) 0.7 1.2 V
Voltage
trr Diode Reverse Recovery Time IF = 21 A, 39 nS
Qrr Diode Reverse Recovery Charge diF/dt = 100 A/µs 33 nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.

a) 40°C/W when b) 85°C/W when mounted on

2
mounted on a 1in pad a minimum pad of 2 oz
of 2 oz copper copper

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

FDS7088N3 Rev D1 (W)

 FDS7088N3
Typical Characteristics

80 2.2
VGS = 10V 4.0V VGS = 3.5V
3.5V

DRAIN-SOURCE ON-RESISTANCE
2
4.5V
ID, DRAIN CURRENT (A)

60

RDS(ON), NORMALIZED
1.8

1.6
4.0V
40
1.4 4.5V
5.0V
20 1.2
6.0V
3.0V
1 10V

0 0.8
0 0.5 1 1.5 0 20 40 60 80
VDS, DRAIN-SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

1.6 0.01
ID = 21A
ID = 10.5A
DRAIN-SOURCE ON-RESISTANCE

VGS = 10V
RDS(ON), ON-RESISTANCE (OHM)

1.4 0.008
RDS(ON), NORMALIZED

1.2 0.006
TA = 125oC

1 0.004
TA = 25oC

0.8 0.002

0.6 0
-50 -25 0 25 50 75 100 125 150 2 4 6 8 10
o
TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V)

Figure 3. On-Resistance Variation with Figure 4. On-Resistance Variation with

Temperature. Gate-to-Source Voltage.

80 100
VGS = 0V
IS, REVERSE DRAIN CURRENT (A)

VDS = 5V
10
ID, DRAIN CURRENT (A)

60 TA = 125oC
1

25oC
40 0.1
TA =125oC
-55oC
25oC 0.01
20
-55oC 0.001

0 0.0001
2 2.5 3 3.5 4 0 0.2 0.4 0.6 0.8 1 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDS7088N3 Rev D1 (W)

 FDS7088N3
Typical Characteristics

10 5000
f = 1MHz
ID = 21A VDS = 10V
VGS = 0 V
VGS, GATE-SOURCE VOLTAGE (V)

15V
8 4000
CISS

CAPACITANCE (pF)
20V
6 3000

4 2000

COSS
2 1000

CRSS
0 0
0 20 40 60 80 0 5 10 15 20 25 30
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

1000 50
SINGLE PULSE
P(pk), PEAK TRANSIENT POWER (W)
RθJA = 85°C/W
100 RDS(ON) LIMIT 40 TA = 25°C
100µs
ID, DRAIN CURRENT (A)

1ms
10ms
10 100ms 30
1s
10s
1 VGS = 10V DC 20
SINGLE PULSE
RθJA = 85oC/W
0.1 10
TA = 25oC

0.01 0
0.01 0.1 1 10 100 0.01 0.1 1 10 100 1000
VDS, DRAIN-SOURCE VOLTAGE (V) t1, TIME (sec)

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.

1.00
r(t), NORMALIZED EFFECTIVE TRANSIENT

D = 0.5

RθJA(t) = r(t) * RθJA

0.2
RθJA = 85 °C/W
THERMAL RESISTANCE

0.10 0.1

0.05
P(pk)
0.02 t1
0.01 t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE

0.00
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.

FDS7088N3 Rev D1 (W)

 FDS7088N3
Dimensional Outline and Pad Layout

FDS7088N3 Rev D1 (W)

TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
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with instructions for use provided in the labeling, can be effectiveness.
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PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. I8