Digital Electronics Lab (Pattern 2015)
Assignment:14 Group B R C V T Dated
(2) (4) (2) (2) Sign
Title: Simple ASM using
Objective: Learn multiplexer controller method
Problem Statement : Design of 2 bit Up counter using multiplexer controller
method
1. 2 bit counter has 4 states i.e. 00,01,10,11.
2. In the state diagram if mode control M =0, counter will be latched in the same
state and will start incrementing to the next state if M=1.
3. By referring the state diagram, ASM chart is drawn.
Hardware & software requirements: Digital Trainer Kit, 74151(8:1 MUX), 7474
(D Flip-flop), Power supply, Patch Cord.
Theory:
1. ASM chart means algorithmic state machine chart.
2. It is a type of flowchart that can be used to represent the state transitions and
generated outputs for finite state machine(FSM)
3. ASM charts are similar to traditional flowcharts.
4. Unlike a traditional flowchart, this includes timing information. This chart
specifies that the FSM flows from one state to another only after each active clock
edge.
Elements used in ASM Chart
1. State Box- A rectangle represents a state of the FSM. It is equivalent to node in
the state diagram or row in the state table. The name of the state should be
indicated outside the box in left top corner. Moore type of outputs is listed inside
the box.
2. Decision Box- A diamond indicates that the stated condition expression has to be
tested and an exit path has to be chosen accordingly. The condition expression
consists of one or many inputs.
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S.N.J.B.’s College of Engineering, Chandwad
Digital Electronics Lab (Pattern 2015)
3. Conditional output Box- The oval denotes the output signals that are of Mealy
type. These output depend on the values of state variables and the Inputs of FSM
.the condition that determines whether such Outputs are generated is specified in a
decision box.
These are shown in the figure given below.
State Name
Output signals or actions 0 (False) 1 (True)
(Moore Type)
Conditional Outputs or actions
Condition Expression ( Mealy Type)
Conditional output box
Decision Box
State Box
Significance : It is an aid to design the complex circuits.ASM charts are used to describe
complex circuits that include one or more FSM’s and another circuitry such as
registers,counters,adders,multipliers,etc.
ASM Block
1. It is a structure which consists of single state box and any decision and
conditional output boxes that the state box may be connected to.
2. It has one entrance and any number of exit paths.
Each block describes the state of the system during the interval of one clock pulse.
Multiplexer controller method of design has three levels of components as shown in the
figure below:
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S.N.J.B.’s College of Engineering, Chandwad
Digital Electronics Lab (Pattern 2015)
ASM using Multiplexer controller Method:-
1. The multiplexer outputs are applied to the input of the flip-flop forming the
register at the second level to hold the present state inputs.
2. The multiplexers decide the next state of the register as outputs of MUX has been
connected to flip-flop inputs.
3. Third level is the decoder which provides separate output for each control state.
The decoder can be replaced by the combinational circuit.
First level
(Multiplexers)
Second level
(Register)
MUX
MUX Output FF
1
1 Third level
(Decoder)
Select
MUX
Inputs Output
Select
MUX FF
2 MUX Output 2
Holds the present
binary state
Fig. Block schematic for a 3-level scheme for multiplexer design
State diagram:- for 2 bit Up counter:
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S.N.J.B.’s College of Engineering, Chandwad
Digital Electronics Lab (Pattern 2015)
0=M
S0
1=M
1
Up counting takes place for
M=1and the counter
0 S3 S1 0 progresses from states S0,
S1, S2, S3.
1 1
S2
Fig. 1 State Diagram for 2 bit Up Counter
ASM chart of the above state diagram is as shown below in Fig.2
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S.N.J.B.’s College of Engineering, Chandwad
Digital Electronics Lab (Pattern 2015)
00
01
0 1
M
10
0 1
M
11
Fig.2 ASM Chart for 2-bit Up Counter
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S.N.J.B.’s College of Engineering, Chandwad
Digital Electronics Lab (Pattern 2015)
State transition table:
Mode control Present state (Qn) Next state (Q n+1)
i/p
M Qb Qa Qb+1 Q a+1
0 0 0 0 0
0 0 1 0 1
0 1 0 1 0
0 1 1 1 1
1 0 0 0 1
1 0 1 1 0
1 1 0 1 1
1 1 1 0 0
Excitation table for D Flip-flop:
Present State Next state Input
Qn Qn+1 Dn
0 0 0
0 1 1
1 0 0
1 1 1
State Table :
Mode Present Next state (Qn+1) Input
control state (Qn)
i/p
M Qb Qa Qb+1 Q a+1 Db Da
0 0 0 0 0 0 0
0 0 1 0 1 0 1
0 1 0 1 0 1 0
0 1 1 1 1 1 1
1 0 0 0 1 0 1
1 0 1 1 0 1 0
1 1 0 1 1 1 1
1 1 1 0 0 0 0
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S.N.J.B.’s College of Engineering, Chandwad
Digital Electronics Lab (Pattern 2015)
Logic Diagram:
ASM Using MUX
+VCC
D0
D1
D2 Y1
DB QB
D3
8:1
MUX-1
D4
D5 FF
D6
D7
S2 S1 S0
QB
Mode (M)
+VCC
S2 S1 S0
D0
D1
Y2
D2 DA QA
D3
8:1
D4
MUX-2
FF
D5
D6
D7
QA
Clock
Fig. Logic Diagram
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S.N.J.B.’s College of Engineering, Chandwad
Digital Electronics Lab (Pattern 2015)
Outcome: ASM chart is drawn as per the state diagram and verified the functionality
of given FSM using multiplexer controller method.
FAQ’s:
1. What is meaning of ASM and FSM
ASM is algorithmic state machine chart.It is a method to implement FSM. It is a type of
flowchart that can be used to represent the state transitions and generated outputs for
finite state machine (FSM).
A finite state machine (FSM) or finite state automaton (plural: automata) or simply a
state machine, is a model of behavior composed of a finite number of states, transitions
between those states, and actions. A finite state machine is an abstract model of a
machine with a primitive internal memory.
2. What is the major difference between ASM chart and traditional flowchart?
ASM charts are similar to traditional flowcharts. Unlike a traditional flowchart, this
includes timing information. This chart specifies that the FSM flows from one state to
another only after each active clock edge.
3. Write the significance of ASM chart in the design of FSM.
It is an aid to design the complex circuits. ASM charts are used to describe complex
circuits that include one or more FSM’s and another circuitary such as registers, counters,
adders, multipliers etc.
Assignments Questions:
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S.N.J.B.’s College of Engineering, Chandwad