COPG 2002

Microcontrollers and Microprocessors

Introduction & MC68HC11 Microcontroller

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NETD DIPLOMA
UTILITIES ENGINEERING DEPARTMENT
Table of Contents
1.0 General Computer Components...................................................................................................................3
1.1 The Processor............................................................................................................................................3
2.0 Microprocessors and Microcontrollers.........................................................................................................4
2.1 Microprocessors........................................................................................................................................4
2.2 Microcontrollers........................................................................................................................................4
2.3 Microprocessors vs. Microcontrollers.......................................................................................................6
3.0 Motorola 68HC11 Microcontroller...............................................................................................................7
3.1 CPU Registers of the 68HC11 Microcontroller (Software Programming Model)...................................7
3.2 Operating Modes of the MC68HC11........................................................................................................8
3.3 Hardware Entities......................................................................................................................................8
3.4 Software Entities.....................................................................................................................................11
4.0 MC68HC11 Programming..........................................................................................................................11
4.1 Fields....................................................................................................................................................12
4.2 Assembler Directives...........................................................................................................................12
4.3 Prefix for Number Representation.......................................................................................................13
4.4 Addressing Modes...............................................................................................................................13
4.5 Program Flow Charts...........................................................................................................................16
4.6 Program to Perform Arithmetic Operation..........................................................................................16
4.7 Program Loops.....................................................................................................................................16
4.8 Program Execution Time.....................................................................................................................17
4.9 Opcodes...............................................................................................................................................18
4.10 Memory Map.......................................................................................................................................19
4.11 I/O ports of the MC68HC11................................................................................................................20
4.12 Subroutines..........................................................................................................................................21
4.13 Data Structures....................................................................................................................................21
4.14 Interrupts and Resets...........................................................................................................................22
4.15 Timer...................................................................................................................................................24
4.16 Interface Between PC and EVB..........................................................................................................26

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1.0 General Computer Components
The essential components of any computer are:
(i) The Processor (Central Processing Unit)
(ii) The I/O Ports
(iii) Memory
(iv) The Bus

1.1 The Processor

The processor which is also called the central processing unit (CPU) can be further divided into three parts: the
registers, the arithmetic logic unit and the control unit.

CPU Block Diagram

The control unit decodes program instructions and monitors their execution. The control unit maintains a
register called the program counter (PC) which contains the address of the next instruction to be executed.

The arithmetic logical unit (ALU) performs the computational functions required in the CPU, such as
addition, subtraction, multiplication and division. It also performs all logical operations such as AND, OR and
XOR.

A register is an area in the microprocessor used to hold data for the purpose of performing arithmetic, logical or
program flow operations. Some registers hold 8 bits, some hold 16 bits. These registers are called CPU
registers.

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2.0 Microprocessors and Microcontrollers

2.1 Microprocessors

A microprocessor is a processor packaged in a single integrated circuit. Microprocessors come in 4 bit, 8 bit,
16 bit, 32 bit and 64 bit models. A 16 bit microprocessor can handle 16 bits in a single operation. Some simple
calculators use 4 bit microprocessors.

Cache Memory
Some 32 bit and 64 bit microprocessors have high speed on chip cache memory. The CPU can access this
memory much faster than it can access main memory. The most recently used data from memory is kept in the
cache. Due to the fact that recently used data is likely to be used again within a short time, data in the cache is
heavily utilized and this results in a significant improvement in system performance.

2.2 Microcontrollers

A microcontroller is a computer implemented on single very large scale integration (VLSI) chip. It contains a
microprocessor, memory, I/O ports etc.
A microcontroller is normally designed and programmed to control one specific device or machine, e.g. a
phone, appliance, automobile or factory machine.
The Motorolla 68HC11 is an 8 bit microcontroller family developed in 1985.

Microcontroller Block Diagram

The Bus
The processor communicates with the memory and input and output (I/O) devices via a set of signal lines
referred to as a bus. The common bus consists of three busses, the data bus, the address bus and the control bus.

 Address bus is a number of wires in parallel which is used to choose one memory location in memory.

Therefore, the number of memory locations that can be addressed by the CPU will depend on the size of the
address bus.

Eg. 1: An 8-bit address bus can address 28 = 256 memory locations from 00 to FF

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 Eg. 2: A 16-bit address bus can address 216 = 65536 memory locations from 0000 to FFFF

 Data bus is a number of wires in parallel which is used to move data to and from memory.

 Control bus is a number of wires in parallel which is used to send control signal to memory. Eg. Read and Write
signals

I/O Interfaces
Due to the fact that some I/O devices have very different features and speeds to those of microprocessors,
special intermediate devices called peripheral chips, which incorporate I/O registers, are required to enable the
microprocessor to effectively communicate with external devices.

An input port can be used to read data, for example, from switches. An input port is 8 bits wide. Data is read
into a register of size 8 bits from the input port.

An output port is used to display data, for example LEDS. An output port is 8 bits wide. Data is sent from a
register of size 8 bits to the address of output port.

PORTA pins can serve as general purpose inputs, general purpose outputs, timer input captures or timer output
compares.
PORTB pins serve as general purpose outputs.
PORTC pins serve as general purpose inputs or outputs.
PORTD pins serve as general purpose inputs or outputs, the serial communication interface and the serial
peripheral interface.
PORTE pins serve as general purpose inputs or outputs, or analog-to-digital inputs.

Evaluation Boards (EVBs) facilitate the prototyping and evaluation of designs. Most of these single board
computers have a resident monitor program that can display the contents of registers, modify contents of
registers and memory, download programs from a pc etc.

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 Motorola 68HC11 EVB Block Diagram

2.3 Microprocessors vs. Microcontrollers

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3.0 Motorola 68HC11 Microcontroller

3.1 CPU Registers of the 68HC11 Microcontroller (Software Programming Model)

Accumulators A and B are 8 bit, general purpose registers. Most arithmetic functions are performed on these
two registers. Double Accumulator D is a 16 bit register composed by combining accumulators A and B.

The Index Registers IX and IY, are mainly used in addressing memory operands. However, they are also used
in several arithmetic operations.

The Stack Pointer holds the address of the next available memory location on the stack. The stack is a list of
data items whose elements can only be accessed from one end.

The Program Counter holds the address of the next instruction to be executed in the program.

Index Registers IX and IY, the stack pointer and the program counter are 16 bit registers.

The Condition Code Register (CCR) or the Status Register, is an 8 bit register that has 3 control bits and 5
status bits. The control bits are used to enable/disable interrupts, and the status bits indicate the results of the
last operation. If the execution of an instruction results in a zero, positive number, negative number, overflow or
other such condition, this is indicated by setting the corresponding bit in the CCR. For more info on how the
different CCR bits work, see the Power Point on “MC68HC11 Registers”.

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3.2 Operating Modes of the MC68HC11

The Expanded Mode allows the user to add off-chip memory devices and I/O peripheral chips to the
microcontroller.

The Single Chip Mode functions without external address and data buses

The Special Bootstrap Mode allows the user to load a program into the on-chip SRAM from the serial
communication interface (SCI)

The Special Test Mode is mainly used during Motorola’s internal production testing.

3.3 Hardware Entities

DIP switches connected to port C of the 68HC11

Vcc

10kΩ pull up resistors

DIP switches
PC0

PC1

PC2
68HC11
PC3

PC4

PC5

PC6

PC7

When the DIP (digital input) switches are open, the pull up resistors pull up the voltages at the input port to
the Vcc = 5V level.
When the DIP switches are closed, the input port is connected to the ground or 0V level.

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LED Circuit Connection

5V
68HC11

LEDs

300Ω

Inverters

PB3

PB2

PB1

PB0
The current required to drive the LEDs is more than can be handled by port B. However the inverter circuit is
able to sink the required amount of current. Therefore, inverters are connected between the LEDs and port B for
current sinking purposes.

Voltage Scaling Circuit

Rf
Vout = -Vin R i ----------- Eq.1
Example: If Vi = 0 – 15V and we want to scale it to 0 – 5V, we can use an OP amp circuit, arbitrarily select a
value for Rin, then calculate the required Rf. If we choose Ri = 10kΩ,

From Eq.1:
−R f
5V= ×15 V
10 k

5 V × 10 k
−R f = =3.3 kΩ
15 V

∴ we use Rf = 3.3kΩ and switch around the polarity of the input.

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Alternative Voltage Scaling Circuit (The Voltage Divider)

V ¿ × R2
Vout =
R 1+ R 2

If we select R2 = 10 kΩ, where our input is 0 – 15V and the desired output range is 0 -5V

15V ×10 k
Then 5V =
R1 +10 k
∴ 5(R1 + 10k) = 15x10k
∴ 5R1 + 50k = 150k
150 k −50 k
∴ R1 = 5 = 20kΩ

Contact Bounce
Because of their construction, mechanical switches have a problem called contact bounce. Instead of producing
a single clean step output, closing a mechanical switch produces a series of pulses because the switch contacts
do not come to rest immediately.

Contact Bounce

Contact bounce can cause unreliable operation of a switch if readings are taken before it settles down.

Keyboard Debouncing
For the circuit above, a debouncer will recognize that a switch is closed after the voltage is high for about 10ms
and that it is open after the voltage is low for about 10ms. Both hardware and software solutions to the key
bounce problem are available.

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Pipelining
With pipelining, the computer architecture allows the next instruction to be fetched while the processor is
performing arithmetic operations, holding them in a buffer close to the processor until each instruction
operation can be performed. This increases the number of instructions that can be executed during a given time.

3.4 Software Entities

Machine code consists of binary codes that the computer understands but is not convenient for the human
programmer, eg 00101110

Assembly language consists of assembly instructions which are mnemonic representations of machine
instructions eg ABA.

The assembly program that the programmers enter is called a source code. A software program called an
assembler is required to translate the source code into machine language. This machine language code is called
the object code.

An interrupt is a special event that requires the CPU to stop normal program execution and perform some
special service.
Some interrupts can be ignored by the CPU. These are called maskable interrupts. Non-maskable interrupts
cannot be ignored by the CPU. Different interrupts can have different levels of priority in the system.

An analog to digital converter is used to sense a voltage level on its input and produce a corresponding binary
code on its output. Analog signals must be converted into digital form for processing by a computer.

The Buffalo monitor provides a self-contained operating environment. The EVB includes a monitor/debugging
program called BUFFALO (Bit User Fast Friendly Aid to Logical Operation) which is contained in an EPROM
chip (external to the MCU). The BUFFALO monitor allows the user to debug codes, download programs from
a host computer, and emulate user code in a target system environment.

Breakpoints can be placed in a program. These are points where normal program execution stops to allow the
programmer to check the effects of the program thus far. The program can then be continued by selecting GO
again.

4.0 MC68HC11 Programming

The instruction set of the MC68HC11 is found in pages 13-21 of the Reference Manual. Information on its
registers is found in pages 22-27 of the Reference Manual. All pages should be printed to allow for easy
reference when programming.

Example program:
Write a program to load the number $29 into accumulator A, add it to a number at address $0001 and store the
result at address $0002.

Solution: Assembly instructions

START LDAA #$29 ; M => A; $29 => A
LINE2 ADDA $0001 ; A + M => A; $29 + $20 = $49 => A
STAA $0002 ; A =>M; $49 => Address $0002
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 END
4.1 Fields
An assembly language instruction has four fields

1) The label field - The label field is optional and it must begin with a letter e.g. ZEBRA8. It is normally
placed at the left margin.

2) The operation field - This field contains the mnemonic names of instructions. It must be at least one
space from the left margin.

3) The operand field - This follows the operation field

4) The comment field - The comment field follows the operand field, it is optional and used mainly for
documentation

Exercise:
Identify the four fields in the following statement

LOOP ADDA #40 ; add 40 to accumulator A

4.2 Assembler Directives

Directives tell the assembler to do something other than create the machine code for an instruction.

Examples of assembler directives are:

1) The END statement is used to bring program execution to an end

2) The EQU directive causes the value of the expression following it to replace the label in the listing and
machine code files.
e.g.
PORTC EQU $1003
LDAA PORTC ; Equivalent of: LDAA $1003
Loads the value from address $1003 into Accumulator A. The use of the PORTC expression allows the
programmer to easily recall the address $1003 and simply use the word PORTC throughout the program.

Assemble

3) The ORG directive is used to set the value of the program counter, thus telling the assembler where to
put the next byte it generates after the ORG directive.
e.g.
ORG $C000
LDAA #$EE
LDAB #$FF
Starts storing sections of code from address $C000

Assemble

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4) The reserve memory byte directive RMB, directive causes the location counter to be advanced by the
value of the expression in the operand field. This directive reserves a block of memory whose length in
bytes is equal to the value of the expression. The block of memory reserved is not initialized to any
given value. This directive is commonly used to reserve space for variables or arrays.
e.g.
ORG $C000
BUFFER RMB 100
Allocates 100 bytes for some data and 100lets the programmer refer to it using the label BUFFER.

5) The form constant character FCC directive is used to form string constants.
e.g.
ALPHA FCC “DEF”

6) The form constant byte FCB directive is used to store a byte of data in memory.
e.g.
DATA FCB $09

4.3 Prefix for Number Representation

Base Prefix Exampes

Binary % %10010001010
Octal @ @027
Decimal (nothing) 49862
Hexadecimal $ $4AF5

4.4 Addressing Modes

Addressing modes:
Addressing modes are used to specify the operands needed in an instruction. Six addressing modes are provided
in the 68HC11: immediate, direct, extended, indexed, inherent and relative.

Immediate (IMM)
In the immediate addressing mode, the actual argument is contained in the byte immediately following the
opcode. The immediate value is preceded by the # character.
e.g. LDAB #$17
loads the hex value 17 into accumulator B.

Direct Mode (DIR)

In the direct addressing mode, the least significant byte of the effective address of the operand appears in the
byte following the opcode.
The direct addressing mode can ONLY be used when the higher order byte of the address is $00.
e.g. SUBA $20
subtracts the value stored at the memory location with the effective address $0020 from accumulator A.

Extended Mode (EXT)

In the extended addressing mode, the whole address of the operand appears in the two bytes following the
opcode.
e.g. LDAA $1003

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Loads the contents of address $1003 into the accumulator A

Indexed Mode (INDX, INDY)

In the indexed addressing mode, one of the index registers (X or Y) is used in calculating the effective address
of the operand.
For example, consider LDAA $4,X in the example below. Originally, ACCA = 18, IX = 5270. The operand
address is calculated by adding $4 to the value $5270 in IX to give the operand address as $5274. Therefore, the
value at address $5274, i.e., BB is loaded in ACCA.

LDAA $4,X
LDAA $4 + $5270
LDAA $5274

Inherent Mode (INH)

In the inherent mode, everything needed to execute the instruction is in the opcode.
e.g. ABA
adds the contents of accumulator A to accumulator B

Relative Mode (REL)

The relative addressing mode is used only for branch instructions
e.g. BEQ $E164
branches to the line of instruction at address $E164

Exercise

Based on information in the handout, together with the filled rows of the following table, fill the after and
addressing mode sections of the other rows of the table:

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 Addressing
Instruction Before (Values in Hex) After (Values in Hex)
Mode
1 LDAA #$3B A=0 B=0 A= 3B B=0 Immediate
A=0 B=0 A= 2C B= 0
2 LDAA $E9 Direct
$00E9 = 2C $00E9= 2C
A=0 B=0 A= 0 B= 5C
3 LDAB #92 Immediate
$0092 = 63 $0092 = 63
A=0 B=0 A= 0 B= 81
4 LDAB $52 Direct
$0052 = 81 $0052 = 81
X=0 $5F04=6A X= 6A54 $5F04= 6A
5 LDX $5F04 Extended
$5F05=54 $5F05= 54
X=0 $0572=21 X= 21A2 $0572= 21
6 LDX $572 Extended
$0573=A2 $0573= A2
7 ABA A=26 B=02 A=28 B=02 Inherent

8 ADDA #62 ($3E) A=27 B=7F A= 65 B= 7F Immediate

A=18 B=32 A= 1E B= 32
9 ADDA $52BD Extended
$52BD = 06 $52BD = 06
A=18 B=32 A=18 B= 47
10 ADDB $3A16 Extended
$3A16 = 15 $3A16 = 15
11 SBA A=8E B=36 A= B=
A=60 B=51 A= B=
12 SUBB $6A91
$6A91= 24 $6A91=
13 SUBA #$1A A=21 B=3C A=7 B= 3C Immediate
A=93 B=15 A= 93 B=15
14 STAB $253F Extended
$253F= 7A $253F=15
A=93 B=15 A= B=
15 STAA $62B4
$62B4= 7A $62B4=
A=93 B=15 A=94 B=15
16 INCA Inherent
$3728= 7A $3728= 7A
A=93 B=15 A= B=
17 DECB
$3728= 7A $3728=
X=257E $0645=21 X= $0645=
18 DEX
Y=6BF2 $0646=A2 Y= $0646=
X=4A95 $C275=21 X= $C275=
19 INY
Y=1270 $C276=A2 Y= $C276=
X=041E $C275=28 X= $C275=29
20 INC $C275
Y=8C25 $C276=A2 Y= $C276=

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4.5 Program Flow Charts

These are used to provide a graphical means of

4.6 Program to Perform Arithmetic Operation

e.g.
Write a program to add the values of three memory locations ($00, $01 and $02) and save the result at $03.

Solution:
Flow Chart

Start

A ←[$00]

A ←[A]+[$01]

A ←[A]+[$02]

[$03] ← [A]

Stop
Program

LDAA $00 ; load the contents of memory location $00 into A.

ADDA $01 ; add the contents of memory location $01 to A.
ADDA $02 ; add the contents of memory location $02 to A.
STAA $03 ; save the sum at $03
END

4.7 Program Loops

A program loop tells the computer to execute the same sequence of instructions many times.
Example:
Write a program to compute 1 + 2 + . . . + N (Say N = 20) and save the sum at $00.

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Solution:
We will use accumulator B as the loop counter i, and accumulator A for the variable sum.

N EQU 20 ; loop counter limit

LDAB #00 ; initialize the loop at 0
LDAA #00 ; initialize the sum at 0
again INCB ; increment the loop count
ABA ; add i to the sum
CMPB #N ; compare loop count with upper limit
BNE again
STAA $00 ; save the sum
END

Start

i = 0, sum = 0

i = i+1

sum = sum + i

No i = 20?

Store sum

Stop

Flowchart for computing 1 + 2 + . . . + 20

4.8 Program Execution Time

Instruction execution in the 68HC11 is controlled by the E clock signal. Knowledge of the execution time for
each instruction and the clock period allows a time delay of any length to be created.
The frequency of the E clock signal is 2 MHz, Therefore the clock period is 0.5µs.

Example 1: Write a program to create a time delay of 100ms.

Solution:
The number of clock cycles in 100ms = (100x10-3)/(0.5x10-6) = 2x105
The execution time for the following 4 instructions is 10 clock cycles. i.e. 5µs
i.e.
again NOP ; 2 cycles
NOP ; 2 cycles
DEX ; 3 cycles
BNE again ; 3 cycles

To create a 100 ms delay, this loop must be executed 20000 times

i.e. (100x10-3)/(5x10-6) = 2x104

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 Therefore the following instruction sequence will create a time delay of 100 ms.
LDX #20000
again NOP
NOP
DEX
BNE again
A larger delay can be created by using nested program loops.

Example 2: Write a program to create a delay of 10 seconds.

Solution:
We need to write a two layer loop that includes the loop in the previous example and executes it the
following number of times.
10 sec ÷ 100ms = 100

The Program:
LDAB #100
outer LDX #20000
inner NOP
NOP
DEX
BNE inner
DECB
BNE outer
END

Exercises:
Write programs to create delays of the following durations: a) 0.25ms, b) 125ms, c) 3 seconds, d) 2 minutes.

4.9 Opcodes
Assembly language instructions are converted into corresponding binary codes for computer use. These codes
can be represented in hexadecimal form and are called opcodes. The codes that correspond to each instruction
(operation field) are listed in the microcontroller’s reference manual. The operands must be converted to
hexadecimal and spaced every two (2) hexadecimal digits, as this corresponds to one (1) byte.

Example: Write the Opcodes corresponding to the following lines of assembly code:
LDAA $4E
ADDA #52
STAA $30A7
Solution:
96 4E
8B 34
B7 30 A7

Exercise:
Referring to the MC68HC11 instruction set, write the sequence of opcodes that correspond to the following
program segments.

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1)
LDAA $3000
ADDA #45
STAA $14

2)
LDAA $2E
LDAB #76
SBA
STAA $3005

3)
LDAB #62
ADDB $8E27
STAB $94

4.10 Memory Map

The memory space allocation is often described using a map called a memory map. By examining the memory
map we can see what blocks of memory are occupied by which devices.

Example of a memory map

The number of unique addresses that can be addressed by an address bus is 2n where n is the number of lines in
the bus. E.g. an 18 bit address bus can address 218 = 262144 unique addresses.

The MC68HC11 has a 16 bit address bus, and so has 216 = 262144 unique addresses.

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Our use of the bootstrap mode allows us to use addresses from $01FF-$1000, $103F-$BF00 and $BFFF-$FFFF
to write our programs and data. The shaded areas hold interrupt vectors, I/O port memory, etc. and therefore
should not be used to write programs and data. Therefore, in this course, we usually use $2000 or $C000 as the
starting address to store or programs and $3000 or $B600 as the starting addresses to hold our data.

4.11 I/O ports of the MC68HC11

The MC68HC11 microprocessor has five I/O ports, i.e. port A, port B, port C, port D and port E. Each port has
8 pins for handling 8 bits in parallel.
Port B is an output port, ports C and D are bidirectional ports and port E is an input port.
On port A: pins 0 to 2 are input pins, pins 3 to 6 are output pins and pin 7 is bidirectional.

Data direction registers

A data direction register is used to assign the pins of a bidirectional port as inputs or outputs. The pins of a
bidirectional port corresponding to the bit positions in the corresponding data direction register that are set to 1
function as output pins. The pins of a bidirectional port corresponding to the bit positions in the corresponding
data direction register that are set to 0 function as input pins. For example, to set all the pins of the bidirectional
port C as input pins, 0s are sent to all of the bit positions in data direction register C, DDRC.

Memory mapped I/O

In memory mapped I/O special addresses correspond to the I/O ports. An instruction that loads a value from the
address of an input port is then an input instruction, and an instruction that stores a value at the address of an
output port is an output instruction.

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4.12 Subroutines
A subroutine is a separate area of program that is used by the main program to perform a specific task.

Subroutine Call and Return

When a subroutine is called the address of the next instruction of the main program is saved at a location
indicated by the stack pointer. The subroutine is then executed. At the end of the subroutine is a return
instruction, which causes a return to the main program which continues at the address indicated by the stack
pointer.

A jump table is a sequence of subroutine calls.

Note: Don’t put END statements in programs with subroutines until after the last subroutine.

4.13 Data Structures

The Stack
A stack is a list of data items that can be accessed only from one end. The operation that adds an item to the top
is called a push, and the removal of an item is called a pop. The stack is a last in first out (LIFO) structure.
The location of the top of the stack is recorded in a register called a stack pointer.

Indexable Data Structures

Vectors and matrices are indexable data structures.
A vector is 1 dimensional. A sequential search can be done in a vector.
The assembler directive FCB can be used to define a vector e.g.

VEC FCB 1,2,3,4,5,6

A matrix is a vector whose elements are vectors of the same length e.g.

Mat1 FCB 1,2,3

FCB 6,7,8
FCB 7,2,13

Strings
A string is a sequence of characters terminated by a NULL (ASCII 0). Operations performed on strings include
concatenation, character counting and word counting.

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4.14 Interrupts and Resets

Interrupts
An interrupt is a special event that requires the CPU to stop normal program execution and perform some
service to the special event. A hardware interrupt is externally generated by external circuitry which sends an
interrupt signal to the CPU, or can be internally generated by hardware circuitry in the CPU. A software
interrupt is generated by abnormal conditions which occur during program execution such as divide by zero,
overflow, illegal opcodes, etc. The MC68HC11 supports sixteen hardware interrupts and two software
interrupts.

When an interrupt occurs, it must be handled in what is written into the program as the Interrupt Service
Routine. The starting address of the interrupt service routine for each of the hardware or software interrupts is
stored in a location in memory called the Interrupt Vector. In general interrupt vectors are stored in tables
called interrupt-vector tables.

Enabling interrupts is done by the CLI instruction and disabling interrupts is done by the SEI instruction.

The general structure of a program with interrupts is as follows:

ORG $xxxx ; xxxx is the vector table address

FDB service_1 ; store the starting address of interrupt source 1
FDB service_2
.
.
.
FDB service_n

ORG $C000 ; starting address of user’s code (can be different)

* User’s code for main program goes here
.
.
SEI ; can be optionally inserted to disable interrupts in a section of code
* User’s code which will be unaffected by interrupts goes here

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 .
.
CLI ; inserted at the end of code unaffected by interrupts
.
.
* User’s code for main program continues here
.
.
service1_ISR
.
.
RTI

service2_ISR
.
.
RTI
.
.
.
servicen_ISR
.
.
RTI

In this course, we pay special attention to only one hardware interrupt, that is, the IRQ (external pin) interrupt.
An interrupt is enabled when the signal going to the IRQ pin goes low. The general format for code with this
interrupt is as follows:

ORG $FFF2
FDB IRQ_ISR

ORG $C000 ; starting address of user’s code (can be different)

* User’s code for main program goes here

IRQ_ISR
.
.
RTI

We can also via code, store the starting address of the IRQ_ISR interrupt service routine. For example, if the
interrupt service routine starts at address $70E0, then the following code can be used:

LDAA #$70
STAA $FFF2
LDAA #$E0
STAA $FFF3

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When an interrupt occurs, the contents of the CPU registers are stored in the stack. Further interrupts are
disabled and the appropriate interrupt handling routine is executed. The values of the registers are then restored
from the stack.

Reset
The microcontroller is in the reset state when the voltage level on the reset pin is low.
The RESET pin is used to reset the microcontroller and allow an orderly system startup.
The MC68HC11 supports 3 resets.

4.15 Timer
A dedicated timer can be useful for tasks such as delay creation, waveform generation and period measurement.
The 68HC11 includes a sophisticated timer system which has a 16 bit free running main timer. It also has a
function called input capture, which can latch the main timer value into a register when the rising or falling edge
(selected by the programmer) of a signal arrives. This can be used to measure the period between two events.

The timer also has an output compare function which compares the contents of the free running main timer to
that of an output-compare register once every E clock cycle and triggers an action when they are equal. The key
to the output compare function is to copy the contents of the main timer, add a delay to it and store the sum in
the output compare register.

A third timer function is the real time interrupt (RTI), this may be required for time critical activities such as
periodically checking temperature and pressure in a process plant.

TCNT(H) TCNT(L)
Prescaler 16-bit free-running
MCU
E clock Divide by counter
1, 4, 8, 16

68HC11 main timer system

When the count changes from $FFFF to $0000, the timer overflow flag (TOF) bit in the timer flag register 2 (TFLG2) is
set.

TOI RTII PAOII PAII 0 0 PR1 PR0 TMSK2 at $1024

The TMSK2 register

TOF RTI PAOVF PAIF TFLG2 at $1025

F
The TFLG register

An interrupt can be enabled by setting the timer overflow interrupt enable bit (TOI) in the timer interrupt mask
register 2 (TMSK2).
The bits PR1 and PR0 in the TMSK2 register are used to select the prescale factor according to the following
table.
PR1 PR0 Prescale 2MHz E clock
factor overflow period
0 0 1 32.77 ms
0 1 4 131.1 ms
1 0 8 262.1 ms
1 1 16 524.3 ms

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 Main timer clock frequency vs. PR1 and PR0

The timer counter (TCNT) register is meant to be read using a double byte read instruction such as LDD or
LDX.

The 68HC11 timer has three input capture channels. Each input capture channel includes a 16 bit input capture
register. The user can select the signal edge to be captured.
The three input capture registers are:
1. TIC1 (located at $1010 and $1011)
2. TIC2 (located at $1012 and $1013)
3. TIC3 (located at $1014 and $1015)

The user can select the signal edge to capture by programming the TCTL2 register. The signal edge to be
captured is specified by two bits. The user can select to capture the rising, falling or both edges.
EDG1B EDG1A EDG2B EDG2A EDG3B EDG3A TCTL2 at $1021
EDGxB EDGxA
0 0 capture disabled
0 1 capture on rising edge
1 0 capture on falling edge
1 1 capture on both edges
Example
Write an instruction sequence to capture the rising edge of the signal connected to PA0 (IC3).

Solution
The PA0 pin is used as the input capture channel IC3. To capture the rising edge, the edge select bits (bits 1 and
0 of TCLT2) of the channel IC3 must be set to 01. The following instruction sequence will set up the TCLT2 to
capture the time of a rising edge on PA0.

TCTL2 EQU $1021

REGBAS EQU $1000

LDX #REGBAS
BCLR TCTL2, #$02 ; clear bit 1
BSET TCTL2, #$01 ; set bit 0

EX 1.
What changes to the above program are required in order to capture:
a) The falling edge on PA0 (IC3)
b) Both the rising and falling edges on PA0 (IC3)
c) The rising edge on PA2 (IC1)
d) The falling edge on PA1 (IC2)

Ex 2.
a) What values will be in accumulators A and B after the execution of the following instructions if
TCNT contains $305D when the upper byte is accessed? Assume that the prescale factor is 1.

TCNTH equ $100E

TCNTL equ $100F
ldaa TCNTH ; read the upper byte of TCNT

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 ldab TCNTL ; read the lower byte of TCNT
4.16 Interface Between PC and EVB

1) The Serial Communication Interface (SCI) allows the PC to communicate with the EVB asynchronously via
an RS232 cable.

EVB

SCI Interface (Asynchronous)

2) The Serial Peripheral interface (SPI) is used to allow the EVB to control external devices.

SPI Interface (Synchronous)

Legend:
TxD = Data transmit
RxD = Data receive
SS = Slave select
MISO = Master serial data input
MOSI = Slave serial data input
SCLK = Serial clock

Asynchronous Serial Communication.

The EVB communicates with the PC via an RS232 serial port. This communication is in asynchronous mode.
In Asynchronous Mode there is no common system clock, but there must be an agreement on rate of
transmission so that both systems will be ready to handle the transmission rate.
Several registers are associated with this type of transmission and the bits placed in these registers determine
how the transmission proceeds.

The registers are SCI (Serial Communication Interface) registers.

Among the SCI registers are:
1) Baud register for setting baud rate; the default rate is 9600baud.
2) SCCR1 is used for setting character length; default 8 bits.
3) SCCR2 is used to enable transmit and receive operations;
4) SCSR is used to indicate various conditions in the transmission, e.g. whether it is ready to send or if
there is an error.
5) SCDR is where data is placed for transmission.

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For normal operations we program $30 into the baud register, $00 into SCCR1 and $0C into SCCR2.

Synchronous Serial Communication

In Synchronous Communication mode, there is a common system clock.
This mode is often used when the EVB is being used to control external devices.

Synchronous Serial Peripheral Interface (SPI)

The SPI is the second of two independent serial communication subsystems.
There will typically be one device that acts as master on the SPI bus. All other devices will act as slaves. A
slave select line allows the individual selection of slave SPI devices. The master device will drive the slave
select line and the serial clock line.

SPI Registers
The user can program the SPI configuration by three registers: SPCR, SPSR and SPDR.

SPI Control Register (SPCR)

Each bit in this 8 bit register represents a different control factor.
SPIE = SPI interrupt enable (1= enable, 0 = disable)
SPE = SPI enable (1= enable, 0 = disable)
DORD = Port D wired OR mode (1 = open drain, 0 = normal CMOS)
MSTR = Master configuration (1= master, 0 = slave)
CPOL = Clock parity control
CPHA = Clock phase
SPR1 and SPR0 are for bit rate control (Only when master)

SPI Status Register (SPSR)

In this register, the SPIF bit is the SPI transfer complete flag
WCOL is an error flag

SPI Data Register (SPDR)

We can write data to this register and then transmit. We can also read received data from this register.

Summary of normal operations

SPCR
We should program $D5 into this register on the master and $C5 into it on the slave.

The Data Direction Register D (DDRD) is also used for control purposes. For normal operation we should
program $38 into it for master and $04 into it for slave function.

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