Design of Basic Computer

CO2202 - Computer Organization

Dr. Sampath Edirisinghe

Acknowledgement - Notes from Dr. Randima Dinalankara
Design of Basic Computer

The basic computer consists of the following hardware components

1. A memory unit with 4096 words of 16 bits each

2. Nine registers: AR, PC, DR, AC, IR, TR, OUTR, INPR, and SC

3. Seven flip-flops: I, S, E, R, lEN, FGI, and FGO

4. Two decoders: a 3×8 operation decoder and a 4×16 timing decoder

5. A 16-bit common bus

6. Control logic gates

7. Adder and logic circuit connected to the input of AC

Control logic
The outputs of the control logic circuit are:

1. Signals to control the inputs of the nine registers

2. Signals to control the read and write inputs of

memory

3. Signals to set, clear, or complement the flip-flops

4. Signals for S2, S1, and S0 to select a register for the

bus

5. Signals to control the AC adder and logic circuit

Design of Accumulator Logic
The adder and logic circuit has three sets of inputs
One set of 16 inputs comes from the outputs of AC
. Another set of 16 inputs comes from the data
register DR. A third set of eight inputs comes from
the input register INPR
In order to design the logic associated with AC, it is
necessary to go over the register transfer
statements and extract all the statements that
change the content of AC.
Control Memory
The function of the control unit in a digital computer is to initiate sequences of
micro-operations
The number of different types of micro-operations that are available in a given
system is finite
When the control signals are generated by hardware using conventional logic
design techniques, the control unit is said to be hardwired
Microprogramming is a second alternative for designing the control unit of a
digital computer
The control memory is ROM so all control information is permanently stored.
Control Memory

Control Word: A control word is a word whose individual bits represent various
control signals

Micro-routine: A sequence of control words corresponding to the control

sequence of a machine instruction

Micro-instruction: Individual control words in this micro-routine are referred to as

microinstructions

The microinstruction specifies one or more microoperations for the system.

Micro-program: A sequence of micro-instructions is called a micro-program

Control Memory

Contains one or more micro-

operations

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Control Memory
A computer that employs a microprogrammed control unit will have two separate
memories: a main memory and a control memory.
The main memory is available to the user for storing the programs. The contents
of main memory may alter when the data are manipulated and every time that the
program is changed. The user's program in main memory consists of machine
instructions and data.
While the control memory holds a fixed microprogram that cannot be altered by
the occasional user.
Control Memory

Each machine instruction initiates a number of micro-instructions in the control

memory

These micro-instructions generate micro-operations to fetch the instruction from

main memory; to evaluate the effective address, to execute the operation
specified by the instruction, and to return control to the fetch phase in order to
repeat the cycle for the next instruction.
Control Memory
The control memory address register (CAR) specifies the address of the microinstruction and the control data register (CDR) holds the
microinstruction read from memory.

The next address generator is sometimes called a microprogram sequencer. It is used to generate the next micro-instruction address.

The location of the next microinstruction may be the one next in sequence or it may be located somewhere else in the control memory.

So it is necessary to use some bits of the present microinstruction to control the generation of the address of the microinstruction.

Sometimes the next address may also be a function of external input conditions.

The control data register holds the present microinstruction while next address is computed and read from memory. The data register is
times called a pipeline register.
Address Sequencing
Microinstructions are stored in control memory in groups, with each group specifying a routine

Each computer instruction has its own microprogram routine in control memory to generate the micro-
operations that execute the instruction

The hardware that controls the address sequencing of the control memory must be capable of sequencing
the microinstructions within a routine and be able to branch from one routine to another

An initial address is loaded into the control address register when power is turned on in the computer. This
address is usually the address of the first microinstruction that activates the instruction fetch routine

The fetch routine may be sequenced by incrementing the control address register through the rest of its
microinstructions.
Address Sequencing
In summary, the address sequencing capabilities required in a control memory are:
1. Incrementing of the control address register.
2. Unconditional branch or conditional branch, depending on status bit conditions.
3. A mapping process from the bits of the instruction to an address for control memory.
4. A facility for subroutine call and return.
 Instruction format
An Instruction consists of three fields:
● 1-bit held for indirect addressing symbolized
by I

● 4-bit operation code (opcode)

● 11-bit address field. Figure lists four of the 16

possible memory-reference instructions
Microinstruction Format
● The microinstruction format for the control
memory is shown in the figure
● The format 20 bits of the microiristruction
are divided into four functional parts. The
three fields Fl, F2, and F3 specify
microoperations for the computer.
● The CD field selects status bit conditions.
● The BR field specifies the type of branch to
be used. The AD field contains a branch
address.
● The address field is seven bits wide, since
the control memory has 128 = 27 words.
Microinstruction Format

The microoperations are subdivided into three fields of three bits each. The three
bits in each field are encoded to specify seven distinct microoperations as listed in
the table. This gives a total of 21 microoperations.
Microinstruction Format
The CD (condition) field consists of two bits which are encoded to specify four
status bit conditions as listed in Table. The first condition is always a 1, so that a
reference to CD = 00 (or the symbol U) will always find the condition to be true.
When this condition is used in conjunction with the BR (branch) field, it provides
an unconditional branch operation. The indirect bit I is available from bit 15 of DR
after an instruction is read from memory. The sign bit of AC provides the next
status bit.
Design of Control Unit
The figure shows the three decoders and some of
the connections that must be made from their
outputs.

Each of the three fields of the microinstruction

presently available in the output of control
memory are decoded with a 3x8 decoder to
provide eight outputs.

For example, when F1 = 101 (binary 5), the next

clock pulse transition transfers the content of
DR(0-10) to AR (symbolized by DRTAR in Table).

Similarly, when F1 = 110 (binary 6) there is a

transfer from PC to AR (symbolized by PCTAR).