1-Megabit (128K x 8) Paged Parallel EEPROM

Features
• Fast Read Access Time: 120 ns
• Automatic Page Write Operation:
– Internal address and data latches for 128 bytes
– Internal control timer
• Fast Write Cycle Time:
– Page Write cycle time: 10 ms maximum
– 1 to 128-byte Page Write operation
• Low-Power Dissipation:
– 40 mA active current
– 200 µA CMOS standby current
• Hardware and Software Data Protection
• DATA Polling for End of Write Detection
• High Reliability CMOS Technology:
– Endurance: 10,000 or 100,000 cycles
– Data retention: 10 years
• Single 5V ± 10% Supply
• CMOS and TTL Compatible Inputs and Outputs
®
• JEDEC Approved Byte-Wide Pinout
• Industrial Temperature Ranges
• Green (Pb/Halide-free) Packaging Option Only

Packages
• 32-Lead PLCC, 32-Lead TSOP

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 1

Table of Contents
Features......................................................................................................................................................... 1

Packages........................................................................................................................................................1

1. Package Types (not to scale)..................................................................................................................4

2. Pin Descriptions...................................................................................................................................... 5

3. Description.............................................................................................................................................. 6
3.1. Block Diagram.............................................................................................................................. 6

4. Electrical Characteristics.........................................................................................................................7
4.1. Absolute Maximum Ratings..........................................................................................................7
4.2. DC and AC Operating Range.......................................................................................................7
4.3. DC Characteristics....................................................................................................................... 7
4.4. Pin Capacitance........................................................................................................................... 8

5. Device Operation.................................................................................................................................... 9
5.1. Operating Modes........................................................................................................................10
5.2. AC Read Characteristics............................................................................................................ 10
5.3. AC Read Waveforms.................................................................................................................. 11
5.4. Input Test Waveforms and Measurement Level......................................................................... 11
5.5. Output Test Load........................................................................................................................ 12
5.6. AC Write Characteristics............................................................................................................ 12
5.7. AC Write Waveforms.................................................................................................................. 13
5.8. Page Mode Characteristics........................................................................................................ 14
5.9. Page Mode Write Waveforms(1,2)............................................................................................... 14
5.10. Chip Erase Waveforms...............................................................................................................15
5.11. Software Data Protection Enable Algorithm(1)............................................................................16
5.12. Software Data Protection Disable Algorithm(1)...........................................................................17
5.13. Software Protected Program Cycle Waveform(1,2,3)................................................................... 18
5.14. Data Polling Characteristics(1)....................................................................................................18
5.15. Data Polling Waveforms............................................................................................................. 19
5.16. Toggle Bit Characteristics(1)....................................................................................................... 19
5.17. Toggle Bit Waveforms.................................................................................................................19

6. Packaging Information.......................................................................................................................... 21
6.1. Package Marking Information.....................................................................................................21

7. Revision History.................................................................................................................................... 24

The Microchip Website.................................................................................................................................25

Product Change Notification Service............................................................................................................25

Customer Support........................................................................................................................................ 25

Product Identification System.......................................................................................................................26

Microchip Devices Code Protection Feature................................................................................................ 27

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 2

Legal Notice................................................................................................................................................. 27

Trademarks.................................................................................................................................................. 27

Quality Management System....................................................................................................................... 28

Worldwide Sales and Service.......................................................................................................................29

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 3

 Package Types (not to scale)

1. Package Types (not to scale)

32-Lead PLCC 32-Lead TSOP
Top View Top View

DC(1)
A12
A15
A16

WE
VCC

NC
A11 1 32 OE
A9 2 31 A10
4
3
2
1
32
31
30
A7 5 29 A14 A8 3 30 CE
A13 4 29 I/O7
A6 6 28 A13
A14 5 28 I/O6
A5 7 27 A8 NC 6 27 I/O5
A4 8 26 A9 WE 7 26 I/O4
A3 9 25 A11 VCC 8 25 I/O3
A2 10 24 OE NC 9 24 GND
A16 10 23 I/O2
A1 11 23 A10
A15 11 22 I/O1
A0 12 22 CE A12 12 21 I/O0
I/O0 13 21 I/O7 A7 13 20 A0
14
15
16
17
18
19
20

A6 14 19 A1
A5 15 18 A2
I/O1
I/O2
GND
I/O3
I/O4
I/O5
I/O6

A4 16 17 A3

Note 1: PLCC package pin 1 is Don’t Connect.

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 4

 Pin Descriptions

2. Pin Descriptions
The descriptions of the pins are listed in Table 2-1.
Table 2-1. Pin Function Table
Name 32-Lead PLCC 32-Lead TSOP Function
DC 1 — Don’t Connect
A16 2 10 Address
A15 3 11 Address
A12 4 12 Address
A7 5 13 Address
A6 6 14 Address
A5 7 15 Address
A4 8 16 Address
A3 9 17 Address
A2 10 18 Address
A1 11 19 Address
A0 12 20 Address
I/O0 13 21 Data Input/Output
I/O1 14 22 Data Input/Output
I/O2 15 23 Data Input/Output
GND 16 24 Ground
I/O3 17 25 Data Input/Output
I/O4 18 26 Data Input/Output
I/O5 19 27 Data Input/Output
I/O6 20 28 Data Input/Output
I/O7 21 29 Data Input/Output
CE 22 30 Chip Enable
A10 23 31 Address
OE 24 32 Output Enable
A11 25 1 Address
A9 26 2 Address
A8 27 3 Address
A13 28 4 Address
A14 29 5 Address
NC 30 6, 9 No Connect
WE 31 7 Write Enable
VCC 32 8 Device Power Supply

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 5

 Description

3. Description
The AT28C010 is a high‑performance Electrically Erasable and Programmable Read‑Only Memory (EEPROM).
Its 1‑Mb memory is organized as 131,072 words by 8 bits. Manufactured with Microchip’s advanced nonvolatile
CMOS technology, the device offers access times of 120 ns with power dissipation of just 220 mW. When the device
is deselected, the CMOS standby current is less than 200 µA.
The AT28C010 is accessed like a Static RAM for the read or write cycle without the need for external components.
The device contains a 128‑byte page register to allow writing of up to 128 bytes simultaneously. During a write cycle,
the address and 1 to 128 bytes of data are internally latched, freeing the address and data bus for other operations.
Following the initiation of a write cycle, the device will automatically write the latched data using an internal control
timer. The end of a write cycle can be detected by DATA Polling of I/O7. Once the end of a write cycle has been
detected, a new access for a read or write can begin.
The AT28C010 has additional features to ensure high quality and manufacturability. The device utilizes internal error
correction for extended endurance and improved data retention characteristics. An optional software data protection
mechanism is available to guard against inadvertent writes. The device also includes an extra 128 bytes of EEPROM
for device identification or tracking.

3.1 Block Diagram

VCC Data Inputs/Outputs
GND I/O0-I/O7

OE Data Latch
WE OE, CE and WE Logic
Input/Output Buffers
CE
Y Decoder Y-Gating
Address
Inputs Cell Matrix
X Decoder
Identification

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 6

 Electrical Characteristics

4. Electrical Characteristics

4.1 Absolute Maximum Ratings

Temperature under bias -55°C to +125°C
Storage temperature -65°C to +150°C
All input voltages (including NC pins) with respect to ground -0.6V to +6.25V
All output voltages with respect to ground -0.6V to VCC + 0.6V
Voltage on OE and A9 with respect to ground -0.6V to +13.5V

Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operation listings of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.

4.2 DC and AC Operating Range

Table 4-1. DC and AC Operating Range

AT28C010‑12 AT28C010‑15
Operating Temperature (Case) Industrial -40°C to +85°C -40°C to +85°C
VCC Power Supply 5V ± 10% 5V ± 10%

4.3 DC Characteristics
Table 4-2. DC Characteristics

Parameter Symbol Minimum Maximum Units Test Conditions

Input Load Current ILI — 10 μA VIN = 0V to VCC + 1V
Output Leakage Current ILO — 10 μA VI/O = 0V to VCC
VCC Standby Current CMOS ISB1 — 200 μA CE = VCC - 0.3V to VCC + 1V
VCC Standby Current TTL ISB2 — 3 mA CE = 2.0V to VCC + 1V
VCC Active Current ICC — 40 mA f = 5 MHz; IOUT = 0 mA
Input Low Voltage VIL — 0.8 V
Input High Voltage VIH 2.0 — V
Output Low Voltage VOL — 0.45 V IOL = 2.1 mA
Output High Voltage VOH1 2.4 — V IOH = -400 μA
Output High Voltage CMOS VOH2 4.2 — V IOH = -100 μA; VCC = 4.5V

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 7

 Electrical Characteristics

4.4 Pin Capacitance

Table 4-3. Pin Capacitance(1,2)

Symbol Typical Maximum Units Conditions

CIN 4 10 pF VIN = 0V
COUT 8 12 pF VOUT = 0V

Note:
1. This parameter is characterized but is not 100% tested in production.
2. f = 1 MHz, TA = 25°C

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 8

 Device Operation

5. Device Operation
READ: The AT28C010 is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at
the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high-
impedance state when either CE or OE is high. This dual-line control gives designers flexibility in preventing bus
contention in their system.
BYTE WRITE: A low pulse on the WE or CE input with CE or WE low (respectively) and OE high initiates a write
cycle. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first
rising edge of CE or WE. Once a byte write is started, it will automatically time itself to completion. Once a
programming operation is initiated and for the duration of tWC, a read operation will effectively be a polling operation.
PAGE WRITE: The page write operation of the AT28C010 allows 1 to 128‑byte of data to be written into the device
during a single internal programming period. A page write operation is initiated in the same manner as a byte write;
the first byte written can then be followed by 1 to 127 additional bytes. Each successive byte must be written within
150 µs (tBLC) of the previous byte. If the tBLC limit is exceeded, the AT28C010 will cease accepting data and
commence the internal programming operation. All bytes during a page write operation must reside on the same
page as defined by the state of the A7‑A16 inputs. For each WE high‑to‑low transition during the page write
operation, A7‑A16 must be the same. The A0 to A6 inputs are used to specify which bytes within the page are to be
written. The bytes may be loaded in any order and may be altered within the same load period. Only bytes which are
specified for writing will be written; unnecessary cycling of other bytes within the page does not occur.
DATA POLLING: The AT28C010 features DATA Polling to indicate the end of a write cycle. During a byte or page
write cycle, an attempted read of the last byte written will result in the complement of the written data to be presented
on I/O7. Once the write cycle has been completed, true data is valid on all outputs, and the next write cycle may
begin. DATA Polling may begin at anytime during the write cycle.
TOGGLE BIT: In addition to DATA Polling, the AT28C010 provides another method for determining the end of a write
cycle. During the write operation, successive attempts to read data from the device will result in I/O6 toggling
between one and zero. Once the write has completed, I/O6 will stop toggling and valid data will be read. Reading the
toggle bit may begin at any time during the write cycle.
DATA PROTECTION: If precautions are not taken, inadvertent writes may occur during transitions of the host system
power supply. Microchip incorporated both hardware and software features that will protect the memory against
inadvertent writes.
HARDWARE PROTECTION: Hardware features protect against inadvertent writes to the AT28C010 in the following
ways:
• VCC sense – if VCC is below 3.8V (typical), the write function is inhibited
• VCC power‑on delay – once VCC has reached 3.8V, the device will automatically time out 5 ms (typical) before
allowing a write
• write inhibit – holding any one of OE low, CE high or WE high inhibits write cycles
• noise filter – pulses of less than 15 ns (typical) on the WE or CE inputs will not initiate a write cycle
SOFTWARE DATA PROTECTION: A software-controlled data protection feature has been implemented on the
AT28C010. When enabled, the software data protection (SDP) will prevent inadvertent writes. The SDP feature may
be enabled or disabled by the user; the AT28C010 is shipped with SDP disabled.
SDP is enabled by the host system issuing a series of three write commands; three specific bytes of data are written
to three specific addresses (refer to Software Data Protection Algorithm). After writing the 3‑byte command sequence
and after tWC, the entire AT28C010 will be protected against inadvertent write operations. It should be noted that,
once protected, the host may still perform a byte or page write to the AT28C010. This is done by preceding the data
to be written by the same 3‑byte command sequence used to enable SDP.
Once set, SDP will remain active unless the disable command sequence is issued. Power transitions do not disable
SDP and SDP will protect the AT28C010 during power‑up and power‑down conditions. All command sequences must
conform to the page write timing specifications. The data in the enable and disable command sequences is not
written to the device and the memory addresses used in the sequence may be written with data in either a byte or
page write operation.

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 9

 Device Operation

After setting SDP, any attempt to write to the device without the 3‑byte command sequence will start the internal write
timers. No data will be written to the device; however, for the duration of tWC, read operations will effectively be polling
operations.
DEVICE IDENTIFICATION: An extra 128 of EEPROM memory are available to the user for device identification. By
raising A9 to 12V ± 0.5V and using address locations 1FF80H to 1FFFFH, the bytes may be written to or read from in
the same manner as the regular memory array.
OPTIONAL CHIP ERASE MODE: The entire device can be erased using a 6‑byte software code. See Software Chip
Erase application note for details.

5.1 Operating Modes

Table 5-1. Operating Modes

Mode CE OE WE I/O
Read VIL VIL VIH DOUT
Write(1) VIL VIH VIL DIN
Standby/Write Inhibit VIH X(2) X High-Z
Write Inhibit X X VIH
Write Inhibit X VIL X
Output Disable X VIH X High-Z

Note:
1. Refer to AC Programming Waveforms.
2. X can be VIL or VIH.

5.2 AC Read Characteristics

Table 5-2. AC Read Characteristics

Parameter Symbol AT28C010‑12 AT28C010‑15 Units

Min. Max. Min. Max.
Address to Output tACC — 120 — 150 ns
Delay
CE to Output Delay tCE(1) — 120 — 150 ns
OE to Output Delay tOE(2) 0 50 0 55 ns
CE or OE to Output tDF(3,4) 0 50 0 55 ns
Float
Output Hold from OE, tOH 0 — 0 — ns
CE or Address,
whichever occurred first

CE Pulse High Time tCEPH(5) 50 — 50 — ns

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 10

 Device Operation

Note:
1. CE may be delayed up to tACC‑tCE after the address transition without impact on tACC.
2. OE may be delayed up to tCE‑tOE after the falling edge of CE without impact on tCE or by tACC‑tOE after an
address change without impact in tACC.
3. tDF is specified from OE or CE whichever occurs first (CL = 5 pF).
4. This parameter is characterized and is not 100% tested.
5. If CE is de-asserted, it must remain de-asserted for at least 50 ns during read operations otherwise incorrect
data may be read.

5.3 AC Read Waveforms

tCE
tOE
tDF
tOH
tACC

High-Z

Note:
1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an
address change without impact on tACC.
3. tDF is specified from OE or CE whichever occurs first (CL = 5 pF).
4. This parameter is characterized and is not 100% tested.
5. If CE is de-asserted, it must remain de-asserted for at least 50 ns during read operations otherwise incorrect
data may be read.

5.4 Input Test Waveforms and Measurement Level

3.0V

AC AC
DRIVING 1.5V MEASUREMENT
LEVELS LEVELS

0.0V

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 11

 Device Operation

5.5 Output Test Load

5.0V

1.8K

OUTPUT
PIN

1.3K 100 pF

5.6 AC Write Characteristics

Table 5-3. AC Write Characteristics

Parameter Symbol Minimum Maximum Units

Address, OE Set-Up Time tAS, tOES 0 — ns
Address Hold Time tAH 50 — ns
Chip Select Set-Up Time tCS 0 — ns
Chip Select Hold Time tCH 0 — ns
Write Pulse Width (WE or CE) tWP 100 — ns
Data Set-Up Time tDS 50 — ns
Data, OE Hold Time tDH, tOEH 0 — ns

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 12

 Device Operation

5.7 AC Write Waveforms

5.7.1 WE Controlled

OE tOES
tOEH

ADDRESS
tAS
tAH
CE tCH

tCS
WE

tWPH

tWP

tDS tDH

DATA IN

5.7.2 CE Controlled

OE tOES
tOEH

ADDRESS
tAS
tAH
WE tCH

tCS
CE

tWPH

tWP

tDS tDH

DATA IN

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 13

 Device Operation

5.8 Page Mode Characteristics

Table 5-4. Page Mode Characteristics

Parameter Symbol Minimum Maximum Units

Write Cycle Time tWC — 10 ms
Address Set-Up Time tAS 0 — ns
Address Hold Time tAH 50 — ns
Data Set-Up Time tDS 50 — ns
Data Hold Time tDH 0 — ns
Write Pulse Width tWP 100 — ns
Byte Load Cycle Time tBLC — 150 µs
Write Pulse Width High tWPH 50 — ns

5.9 Page Mode Write Waveforms(1,2)

OE

CE
tWPH tBLC
tWP
WE
tAS
tDH
tAH
A0-A16 VALID ADD
tDS

DATA VALID DATA

BYTE 0 BYTE 1 BYTE 2 BYTE 3 BYTE 126 BYTE 127

tWC

Note:
1. A7 through A16 must specify the page address during each high-to-low transition of WE (or CE).
2. OE must be high only when WE and CE are both low.

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 14

 Device Operation

5.10 Chip Erase Waveforms

VIH
CE

VIL

VH(3)
OE

VIH tS(1) tH

VIH

WE
VIL
tW(2)

Note:
1. tS = 5 msec (minimum)
2. tW = tH = 10 msec (minimum)
3. VH = 12.0V ± 0.5V

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 15

 Device Operation

5.11 Software Data Protection Enable Algorithm(1)

LOAD DATA AA
TO
ADDRESS 5555

LOAD DATA 55
TO
ADDRESS 2AAA

LOAD DATA A0
TO
ADDRESS 5555
WRITES ENABLED(2)

LOAD DATA XX
TO
ANY ADDRESS(3)

LOAD LAST BYTE

TO
LAST ADDRESS
ENTER DATA
PROTECT STATE

Note:
1. Data format: I/O7-I/O0 (Hex); Address format: A16-A0 (Hex).
2. Write-Protect state will be activated at end of write even if no other data is loaded.
3. 1 to 128 bytes of data are loaded.

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 16

 Device Operation

5.12 Software Data Protection Disable Algorithm(1)

LOAD DATA AA
TO
ADDRESS 5555

LOAD DATA 55
TO
ADDRESS 2AAA

LOAD DATA 80
TO
ADDRESS 5555

LOAD DATA AA
TO
ADDRESS 5555

LOAD DATA 55
TO
ADDRESS 2AAA

LOAD DATA 20
TO
ADDRESS 5555
EXIT DATA
PROTECT STATE(2)

LOAD DATA XX
TO
ANY ADDRESS(3)

LOAD LAST BYTE

TO
LAST ADDRESS

Note:
1. Data format: I/O7-I/O0 (Hex); Address format: A16-A0 (Hex).
2. Write-Protect state will be deactivated at end of write period even if no other data is loaded.
3. 1 to 128 bytes of data are loaded.

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 17

 Device Operation

5.13 Software Protected Program Cycle Waveform(1,2,3)

OE

CE
tWPH tBLC
tWP
WE
tAS
tAH

A0-A6 BYTE ADDRESS

A7-A16 PAGE ADDRESS

tDS tDH

DATA
BYTE 0 BYTE 126 BYTE 127
tWC

Note:
1. A0-A16 must conform to the addressing sequence for the first 3 bytes as shown above.
2. After the command sequence has been issued and a page write operation follows, the page address inputs
(A7‑A16) must be the same for each high‑to‑low transition of WE (or CE).
3. OE must be high only when WE and CE are both low.

5.14 Data Polling Characteristics(1)

Table 5-5. Data Polling Characteristics

Parameter Symbol Minimum Typical Maximum Units

Data Hold Time tDH 10 — — ns
OE Hold Time tOEH 10 — — ns
OE to Output Delay(2) tOE — — — ns
Write Recovery Time tWR 0 — — ns

Note:
1. These parameters are characterized and not 100% tested.
2. See AC Read Characteristics.

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 18

 Device Operation

5.15 Data Polling Waveforms

WE

CE
tOEH
OE
tDH
tWR
tOE
High-Z
I/O7

A0-A16 AN AN AN AN AN

5.16 Toggle Bit Characteristics(1)

Table 5-6. Toggle Bit Characteristics

Parameter Symbol Minimum Typical Maximum Units

Data Hold Time tDH 10 — — ns
OE Hold Time tOEH 10 — — ns
OE to Output Delay(2) tOE — — — ns
OE High Pulse(2) tOEHP 150 — — ns
Write Recovery Time tWR 0 — — ns

Note:
1. These parameters are characterized and not 100% tested.
2. See AC Read Characteristics.

5.17 Toggle Bit Waveforms

WE

CE
tOEH

OE
tDH
tOE
(2) High-Z
I/O6 tWR

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 19

 Device Operation

Note:
1. Toggling either OE or CE or both OE and CE will operate toggle bit.
2. Beginning and ending state of I/O6 will vary.
3. Any address location may be used but the address should not vary.

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 20

 Packaging Information

6. Packaging Information

6.1 Package Marking Information

AT28C010: Package Marking Information (Industrial Grade)

32-Lead TSOP 32-Lead PLCC

Topside Backside Topside Backside

Δ Δ
ATMEL ATMEL
AT28C010@ AT28C010@
%%U-19506V %%U-19506V
YYWWNNN YYWWNNN

%%= Access Time @ = Write Endurance Rating

12: 120 ns Blank: Standard (10K)
15: 150 ns E: Extended (100K)

Lot Trace Code

YWWNNN: Lot Trace Code

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 21

 M
Packaging Diagrams and Parameters
Packaging Information

32-Lead Plastic Leaded Chip Carrier (L) – Rectangle [PLCC]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

D
D1
#LEADS=ND

E
#LEADS=NE E1

NOTE 1
N12 3
CH1 x 45°
CH2 x 45°
CH3 x 30°

A
A1
c b1 A3
e b
D2 E2

Units INCHES
Dimension Limits MIN NOM MAX
Number of Pins N 32
Pitch e .050
Pins along Length ND 7
Pins along Width NE 9
Overall Height A .125 – .140
Contact Height A1 .060 – .095
Standoff § A3 .015 – –
Corner Chamfer CH1 .042 – .048
Chamfers CH2 – – .020
Side Chamfer Height CH3 .023 – .029
Overall Length D .485 – .495
Overall Width E .585 – .595
Molded Package Length D1 .447 – .453
Molded Package Width E1 .547 – .553
Footprint Length D2 .376 – .446
Footprint Width E2 .476 – .546
Lead Thickness c .008 – .013
Upper Lead Width b1 .026 – .032
Lower Lead Width b .013 – .021
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic.
3. Dimensions D1 and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side.
4. Dimensioning and tolerancing per ASME Y14.5M.
Microchip Technology Drawing C04-023B

DS00049AR-page 68 © 2007 Microchip Technology Inc.

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 22

 Packaging Information

32-Lead (8 x 20 mm package) Plastic Thin Small Outline Package, Type I (TSOP)

PIN 1
0º ~ 8º
c

Pin 1 Identifier

D1 D

e b L1

E A2 A SEATING PLANE GAGE PLANE

COMMON DIMENSIONS
A1 (Unit of measure = mm)

SYMBOL MIN NOM MAX NOTE

A – – 1.20
A1 0.05 – 0.15
A2 0.95 1.00 1.05
Notes: 1. This package conforms to JEDEC reference MO-142, Variation BD. D 19.80 20.00 20.20
2. Dimensions D1 and E do not include mold protrusion. Allowable
protrusion on E is 0.15mm per side and on D1 is 0.25mm per side. D1 18.30 18.40 18.50 Note 2
3. Lead coplanarity is 0.10mm maximum. E 7.90 8.00 8.10 Note 2
L 0.50 0.60 0.70
L1 0.25 BASIC
b 0.17 0.22 0.27
c 0.10 – 0.21
e 0.50 BASIC

10/18/01
TITLE DRAWING NO. REV.
32T, 32-lead (8 x 20mm package) 32T B
Plastic Thin Small Outline Package, Type I (TSOP)

Note:
For the most current package drawings, please see the Microchip Packaging Specification located at http://
www.microchip.com/packaging.

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 23

 Revision History

7. Revision History
Revision A (March 2020)
Updated to the Microchip template. Microchip DS20006331 replaces Atmel document 0353. Added marking details
and product identification system details.

Atmel Document 0353 Revision I (August 2009)

Updated AC Characteristics and ordering information.

Atmel Document 0353 Revision I (July 2009)

Added a revision history page and update this version "I" with the changes (AC Characteristics and ordering info from
the word file).

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 24

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To register, go to http://www.microchip.com/pcn and follow the registration instructions.

Customer Support
Users of Microchip products can receive assistance through several channels:
• Distributor or Representative
• Local Sales Office
• Embedded Solutions Engineer (ESE)
• Technical Support
Customers should contact their distributor, representative or ESE for support. Local sales offices are also available to
help customers. A listing of sales offices and locations is included in this document.
Technical support is available through the website at: http://www.microchip.com/support

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 25

Product Identification System

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

AT28 C 010 (E)- 12 T U

AT28 = Parallel EEPROM

U = -40°C to +85°C Industrial Temperature Grade, matte Sn Terminal Finish
C = 4.5V to 5.5V

010 = 1 Mbit Size

Blank = 10K Standard Write Endurance

E = 100K Extended Write Endurance Option
J = 32-Lead, Plastic J-Leaded Chip Carrier (PLCC)
T = 32-Lead, Plastic Thin Small Outline Package (TSOP)

12 = 120 ns Speed
15 = 150 ns Speed

Examples
Table 11-1. AT28C010 Ordering Information

Ordering Code Package Number tACC(ns) Quantity Operating Range

AT28C010-12JU P3X Tube 32
AT28C010-12JU-T P3X Reel 750
120
AT28C010-12TU 32T Tray 156
AT28C010-12TU-T 32T Reel 1500
Industrial (-40°C to +85°C)
AT28C010-15JU P3X Tube 32
AT28C010-15JU-T P3X Reel 750
150
AT28C010-15TU 32T Tray 156
AT28C010-15TU-T 32T Reel 1500

Table 11-2. AT28C010E Ordering Information

Ordering Code Package tACC(ns) Quantity Operating Range

Number
AT28C010E-12JU P3X Tube 32
AT28C010E-12JU-T P3X Reel 750
120
AT28C010E-12TU 32T Tray 156
AT28C010E-12TU-T 32T Reel 1500
Industrial (-40°C to +85°C)
AT28C010E-15JU P3X Tube 32
AT28C010E-15JU-T P3X Reel 750
150
AT28C010E-15TU 32T Tray 156
AT28C010E-15TU-T 32T Reel 1500

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 26

 Package Types
P3X 32-Lead, Plastic J-leaded Chip Carrier (PLCC)
32T 32-Lead, Plastic Thin Small Outline Package (TSOP)
Options
Blank Standard Device: Endurance = 10K Write Cycles; Write Time 10 ms
E High Endurance Option: Endurance = 100K Write Cycles

Microchip Devices Code Protection Feature

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today,
when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these
methods, to our knowledge, require using the Microchip products in a manner outside the operating
specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of
intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code
protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection
features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital
Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you
may have a right to sue for relief under that Act.

Legal Notice
Information contained in this publication regarding device applications and the like is provided only for your
convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with
your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER
EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend,
indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such
use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless
otherwise stated.

Trademarks
The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime,
BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox,
KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST,
MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer,
QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control,
HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus,

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 27

ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider,
Vite, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom,
CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM,
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP,
INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM,
PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad
I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense,
ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of
Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.
© 2020, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 978-1-5224-5808-1
AMBA, Arm, Arm7, Arm7TDMI, Arm9, Arm11, Artisan, big.LITTLE, Cordio, CoreLink, CoreSight, Cortex, DesignStart,
DynamIQ, Jazelle, Keil, Mali, Mbed, Mbed Enabled, NEON, POP, RealView, SecurCore, Socrates, Thumb,
TrustZone, ULINK, ULINK2, ULINK-ME, ULINK-PLUS, ULINKpro, µVision, Versatile are trademarks or registered
trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

Quality Management System

For information regarding Microchip’s Quality Management Systems, please visit http://www.microchip.com/quality.

© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 28

 Worldwide Sales and Service
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© 2020 Microchip Technology Inc. Datasheet DS20006331A-page 29