SN55115, SN75115

DUAL DIFFERENTIAL RECEIVERS

SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998

D Choice of Open-Collector or Active Pullup SN55115 . . . J OR W PACKAGE

(Totem-Pole) Outputs SN75115 . . . N PACKAGE
(TOP VIEW)
D Single 5-V Supply
D Differential Line Operation 1YS 1 16 VCC
D Dual-Channel Operation 1YP 2 15 2YS
D TTL Compatible
1STRB
1RTC
3
4
14
13
2YP
2STRB
D ± 15-V Common-Mode Input Voltage Range 1B 5 12 2RTC
D Optional-Use Built-In 130-Ω Line- 1RT 6 11 2B
Terminating Resistor 1A 7 10 2RT
D Individual Frequency-Response Controls GND 8 9 2A
D Individual Channel Strobes
D Designed for Use With SN55113, SN75113, SN55114 . . . FK PACKAGE
SN55114, and SN75114 Drivers (TOP VIEW)
D

VCC
Designed to Be Interchangeable With

1YP
1YS

2YS
NC
National DS9615 Line Receivers
3 2 1 20 19
description 1STRB 4 18 2YP
1RTC 5 17 2STRB
The SN55115 and SN75115 dual differential line
NC 6 16 NC
receivers are designed to sense small differential
1B 7 15 2RTC
signals in the presence of large common-mode
1RT 8 14 2B
noise. These devices give TTL-compatible output 9 10 11 12 13
signals as a function of the differential input

2RT
1A

2A
NC
GND
voltage. The open-collector output configuration
permits the wire-ANDing of similar TTL outputs
(such as SN5401/SN7401) or other NC – No internal connection
SN55115/SN75115 line receivers. This permits a
level of logic to be implemented without extra
delay.
The output stages are similar to TTL totem-pole outputs, but with sink outputs, 1YS and 2YS, and the
corresponding active pullup terminals, 1YP and 2YP, available on adjacent package pins. The frequency
response and noise immunity may be provided by a single external capacitor. A strobe input is provided for each
channel. With the strobe in the low level, the receiver is disabled and the outputs are forced to a high level.
The SN55115 is characterized for operation over the full military temperature range of – 55°C to 125°C. The
SN75115 is characterized for operation from 0°C to 70°C.

FUNCTION TABLE
OUTPUT
DIFF INPUT (YP AND YS
STRB
(A AND B) TIED
TOGETHER)
L X H
H L H
H H L
H = VI ≥ VIH min or VID more positive than VT + max
L = VI ≤ VIL max or VID more negative thanVT – max
X = irrelevant

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright  1998, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998

logic symbol†
5 &
1B
7 2
1A 1YP
6
1RT RT
3 1
1STRB 1YS
4
1RTC RSP
11
2B
9 14
2A 2YP
10
2RT
13 15
2STRB 2YS
12
2RTC

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)

5
1B 2 1YP (Pullup)
7
1A 1 1YS (Sink)
6
1RT
4
1RTC
3
1STRB

11
2B 14 2YP (Pullup)
9
2A 15 2YS (Sink)
10
2RT
12
2RTC
13
2STRB

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998

schematic (each receiver)

Response
Time
RT Strobe Control
6,10 3,13 4,12 16
VCC
1k 1k V 2.7 k V 2k V

1.5 k 1.64 k 1.64 k 130 2.6 k

1 pF 2.6 k
1 pF

Input 7.9 500 500 20

2,14 Pullup
A YP
8k 8k
7k 5k
7k

3k
Input 5.11
B 1,15 Sink
Output
130 150 YS

150 1.5 k
150 8
GND

Common to
Both Receivers

2.5 k
V

150

Resistor values are nominal and in ohms.

Pin numbers shown are for the J, N, and W packages.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage VI (A, B, and RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V
Input voltage VI (STRB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Off-state voltage applied to open-collector outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or W package . . . . . . . . . . . . . . . . 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values, except differential input voltage, are with respect to network ground terminal.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998

DISSIPATION RATING TABLE

TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 125°C
PACKAGE
POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING
FK† 1375 mW 11.0 mW/°C 880 mW 275 mW
J† 1375 mW 11.0 mW/°C 880 mW 275 mW
N 1150 mW 9.2 mW/°C 736 mW —
W† 1000 mW 8.0 mW/°C 640 mW 200 mW
† In the FK, J, and W packages, SN55115 chips are either silver glass or alloy mounted. SN75115 chips are
glass mounted.

recommended operating conditions

SN55115 SN75115
UNIT
MIN NOM MAX MIN NOM MAX
Supply voltage, VCC 4.5 5 5.5 4.75 5 5.25 V
High-level input voltage at STRB, VIH 2.4 2.4 V
Low-level input voltage at STRB, VIL 0.4 0.4 V
High-level output current, IOH –5 –5 mA
Low-level output current, IOL 15 15 mA
Operating free-air temperature, TA – 55 125 0 70 °C

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)
SN55115 SN75115
PARAMETER TEST CONDITIONS† UNIT
MIN TYP‡ MAX MIN TYP‡ MAX
Positive-going
VIT + § VO = 0 .4 V, IOL = 15 mA, VIC = 0 500 500 mV
threshold voltage
Negative-going
VIT – § VO = 2 .4 V, IOH = – 5 mA, VIC = 0 – 500¶ – 500¶ mV
threshold voltage

Common-mode + 15 + 24 + 15 + 24
VICR VID = ± 1 V to to to to V
input voltage range – 15 – 19 – 15 – 19
TA = MIN 2.2 2.4
High-level
Hi hl l ouputt VCC = MIN
MIN, VID = – 0.5
0 5 V,
V
VOH TA = 25°C 2.4 3.4 2.4 3.4 V
voltage IOH = – 5 mA
TA = MAX 2.4 2.4
Low-level output VCC = MIN, VID = – 0.5 V,
VOL 0.22 0.4 0.22 0.45 V
voltage IOL = 15 mA
TA = MIN – 0.9 – 0.9
L l l input
Low-level i t MAX
VCC = MAX, 0 4 V,
VI = 0.4 V
IIL TA = 25°C – 0.5 – 0.7 – 0.5 – 0.7 mA
current Other in ut at 5.5
input 55V
TA = MAX – 0.7 – 0.7
High-level
g strobe VCC = MIN,, VID = – 0.5 V,, TA = 25°C 2 5
ISH µA
current Vstrobe = 4.5 V TA = MAX 5 10
Low-level strobe VCC = MAX, VID = 0.5 V,
ISL TA = 25°C – 1.15 – 2.4 – 1.15 – 2.4 mA
current Vstrobe = 0.4 V
Response-time- VCC = MAX, VID = 0.5 V,
I(RTC) TA = 25°C – 1.2 – 3.4 – 1.2 – 3.4 mA
control current VRC = 0
VCC = MIN,, VOH = 12 V,, TA = 25°C 100
Off-state VID = – 4.5 V TA = MAX 200
IO(off) open-collector
open collector µA
output
out ut current VCC = MIN,, VOH = 5.25 V,, TA = 25°C 100
VID = – 4.75 V TA = MAX 200
Line-terminating
RT VCC = 5 V TA = 25°C 77 130 167 74 130 179 Ω
resistance
Supply-circuit output VCC = MAX, VID = – 0.5 V,
IOS TA = 25°C – 15 – 40 – 80 – 14 – 40 – 100 mA
current # VO = 0
Supply current VCC = MAX, VID = 0.5 V,
ICC TA = 25°C 32 50 32 50 mA
(both receivers) VIC = 0
† Unless otherwise noted, Vstrobe = 2.4 V. All parameters with the exception of off-state open-collector output current are measured with the active
pullup connected to the sink output.
‡ All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0.
§ Differential voltages are at the B input terminal with respect to the A input terminal.
¶ The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold
voltages only.
# Only one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998

switching characteristics, VCC = 5 V, CL = 30 pF, TA = 25°C

SN55115 SN75115
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
Propagation delay time,
tPLH RL = 3.9 kΩ, See Figure 1 18 50 18 75 ns
low-to-high level output
Propagation delay time,
tPHL RL = 390 Ω, See Figure 1 20 50 20 75 ns
high-to-low level output

PARAMETER MEASUREMENT INFORMATION

Open 2.4 V 5V
RT STRB
Input ≤ 5 ns ≤ 5 ns
Differential 3V
RL 90% 90%
Pulse B YP Input 0V
0V
Generator 10% 10%
(see Note A) VO –3 V
YS tPHL tPLH
A CL = 30 pF VOH
(see Note B)
Response
Time Control Output 1.5 V 1.5 V
VOL
Open

TEST CIRCUIT VOLTAGE WAVEFORM

NOTES: A. The pulse generator has the following characteristics: ZO = 50 Ω, PRR ≤ 500 kHz, tw ≤ 100 ns, duty cycle = 50%.
B. CL includes probe and jig capacitance.

Figure 1. Test Circuit and Voltage Waveforms

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998

TYPICAL CHARACTERISTICS†
INPUT CURRENT
vs
INPUT VOLTAGE
6
VCC = 5 V
Input Not Under Test at 0 V
4 TA = 25°C

IIII – Input Current – mA

2

–2

–4

–6
– 25 – 20 – 15 – 10 – 5 0 5 10 15 20 25
VI – Input Voltage – V

Figure 2

OUTPUT VOLTAGE OUTPUT VOLTAGE

vs vs
FREE-AIR TEMPERATURE COMMON-MODE INPUT VOLTAGE

ÎÎÎÎÎ
4
ÎÎÎÎ 6

ÎÎÎÎÎÎÎÎÎ
VCC = 4.5 V No Load
3.4 TA = 25°C

ÎÎÎÎÎÎÎÎÎ
3.2 VOH (VID = – 0.5 V, IOH = – 5 mA)

ÎÎÎÎ
5
VCC = 5.5 V
CC – Output Voltage – V

VO – Output Voltage – V

ÎÎÎÎÎ
ÎÎÎÎ
2.8 VCC = 5 V
4

ÎÎÎÎÎ
2.4 VCC = 4.5 V

ÁÁ
2
ÎÎÎÎ 3

ÁÁ
1.6

ÁÁ ÎÎÎÎ 2
VID = – 1 V
IICC

ÁÁ ÎÎÎÎÎÎÎÎÎ ÁÁ
VO

1.2

ÎÎÎÎ
0.8
1

ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ
0.4 VOL (VID = 0.5 V, IOL = 15 mA) VID = 1 V

0 0
– 75 – 50 – 25 0 25 50 75 100 125 – 25 – 20 – 15 – 10 – 5 0 5 10 15 20 25
TA – Free-Air Temperature – °C VIC – Common-Mode Input Voltage – V

Figure 3 Figure 4

† Data for temperatures below 0°C and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115 circuits
only. These parameters were measured with the active pullup connected to the sink output.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998

TYPICAL CHARACTERISTICS

HIGH-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE

vs vs

ÎÎÎÎÎ
HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT
0.4

ÎÎÎÎÎ ÎÎÎÎ
5
VID = – 0.5 V VID = 0.5 V

ÎÎÎÎÎ
ÎÎÎÎÎ ÎÎÎÎ
TA = 25°C TA = 25°C
VOH – High-Level Output Voltage – V

VOL – Low-Level Output Voltge – V

ÎÎÎÎÎ
4
VCC = 5.5 V

ÎÎÎÎ
0.3

ÎÎÎÎÎ
VCC = 5 V VCC = 4.5 V
3

ÎÎÎÎÎ
VCC = 5.5 V

ÎÎÎÎÎ
0.2
VCC = 4.5 V
2

ÁÁ ÁÁ
ÁÁ ÁÁ
0.1

VOL
VOH

0 0
0 –10 – 20 – 30 – 40 – 50 0 5 10 15 20 25 30
IOH – High-Level Output Current – mA IOL– Low-Level Output Current – mA

Figure 5 Figure 6

OUTPUT VOLTAGE OUTPUT VOLTAGE

vs vs
DIFFERENTIAL INPUT VOLTAGE DIFFERENTIAL INPUT VOLTAGE
6 6
VCC = 5.5 V
VCC = 5 V
Load = 2 kΩ to VCC VCC = 5 V
5 5
VCC = 4.5 V
TA = 125°C
VO – Output Voltage – V
VO – Output Voltage – V

4 4

TA = 25°C
3 3
TA = – 55°C

ÁÁÁ 2
ÁÁ 2

ÁÁÁ ÁÁ ÁÁÁÁÁÁ
VO
VO

1 1

0
– 0.2 – 0.1 0 0.1 0.2
ÁÁÁÁÁÁ 0
Load = 2 kΩ to VCC
TA = 25°C

– 0.2 – 0.15 – 0.1 – 0.05 0 0.5 0.1 0.15 0.2

VID – Differential Input Voltage – V VID – Differential Input Voltage – V

Figure 7 Figure 8

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998

TYPICAL CHARACTERISTICS†

OUTPUT VOLTAGE OUTPUT VOLTAGE

vs vs

ÁÁÁÁÁ ÁÁÁÁ
STROBE INPUT VOLTAGE STROBE INPUT VOLTAGE

ÎÎÎÎÎ
ÁÁÁÁÁ ÁÁÁÁ
6 6
No Load

ÎÎÎÎÎ
ÁÁÁÁÁ ÁÁÁÁ
VCC = 5 V
VID = 0.5 V
No Load

ÁÁÁÁÁ ÁÁÁÁ
5 TA = 25°C 5 VID = 0.5 V
VCC = 5.5 V

VO – Output Voltage – V
VO – Output Voltage – V

4 4
TA = 125°C

3 3

ÁÁ ÎÎÎÎ ÁÁ
VCC = 5 V TA = – 55°C

ÁÁ ÁÁ
2 2

VO
VO

VCC = 4.5 V
TA = 25°C
1 1

0 0
0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.5 1 1.5 2 2.5 3 3.5 4
Vstrobe – Strobe Input Voltage – V Vstrobe – Strobe Input Voltage – V

Figure 9 Figure 10

SUPPLY CURRENT SUPPLY CURRENT

(BOTH RECEIVERS) (BOTH RECEIVERS)
vs vs
SUPPLY VOLTAGE FREE-AIR TEMPERATURE

ÎÎÎÎ
60 40

ÎÎÎÎ
No Load
TA = 25°C 35
50
I CC – Supply Current – mA

30
CC – Supply Current – mA

40 B Input at VCC
A Input at 0 V 25

30 20

ÁÁ ÁÁ
ÁÁ
B Input at 0 V 15
20 A Input at VCC

ÁÁ ÁÁ ÎÎÎÎÎÎÎÎ
ICC
IICC

10
VCC = 5.5 V
10

ÎÎÎÎÎÎÎÎ
5 B Input at 5.5 V
A Input at 0 V
0 0
0 1 2 3 4 5 6 7 8 – 75 – 50 – 25 0 25 50 75 100 125

VCC – Supply Voltage – V TA – Free-Air Temperature – °C

Figure 11 Figure 12
† Data for temperatures below 0°C and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115 circuits
only. These parameters were measured with the active pullup connected to the sink output.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998

TYPICAL CHARACTERISTICS†

PROPAGATION DELAY TIMES MAXIMUM OPERATING FREQUENCY

vs vs
FREE-AIR TEMPERATURE RESPONSE-TIME-CONTROL CAPACITANCE
30 10M
VCC = 5 V

fmax– Maximum Operating Frequency – Hz

See Figure 1
25
1M
Propagation Delay Times – ns

tPHL (RL = 390 Ω)

20

15
tPLH (RL = 3.9 kΩ) 10k
10

5 fmax
1k
ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎ
VCC = 5 V

ÎÎÎÎ
Input: – 0.5-V to 0.5-V Square Wave
TA = 25°C
0 100
– 75 – 50 – 25 0 25 50 75 100 125 0.001 0.01 0.1 1 10
TA – Free-Air Temperature – °C Response-Time-Control Capacitance – µF

Figure 13 Figure 14
† Data for temperatures below 0°C and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115 circuits
only. These parameters were measured with the active pullup connected to the sink output.

APPLICATION INFORMATION
Location 3 Location 5

ZO‡ ZO‡

Location 1 Location 6

Location 2 Twisted Location 4

Pair

SN75113 Driver

SN75115 Receiver

‡ ZO = RT. A capacitor may be connected in series with ZO to reduce power dissipation.

Figure 15. Basic Party-Line or Data-Bus Differential Data Transmission

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 PACKAGE OPTION ADDENDUM

www.ti.com 14-Aug-2021

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

5962-88745012A ACTIVE LCCC FK 20 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-
& Green 88745012A
SNJ55
115FK
5962-8874501FA ACTIVE CFP W 16 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-8874501FA
& Green SNJ55115W
JM38510/10404BEA ACTIVE CDIP J 16 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 JM38510
& Green /10404BEA
M38510/10404BEA ACTIVE CDIP J 16 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 JM38510
& Green /10404BEA
SN55115J ACTIVE CDIP J 16 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 SN55115J
& Green
SN75115D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 SN75115

SN75115DE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 SN75115

SN75115DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 SN75115

SN75115N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN75115N

SN75115NE4 ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN75115N

SN75115NSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 SN75115

SNJ55115FK ACTIVE LCCC FK 20 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-
& Green 88745012A
SNJ55
115FK
SNJ55115J ACTIVE CDIP J 16 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 SNJ55115J
& Green
SNJ55115W ACTIVE CFP W 16 1 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-8874501FA
& Green SNJ55115W

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 14-Aug-2021

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF SN55115, SN75115 :

• Catalog : SN75115
• Military : SN55115

NOTE: Qualified Version Definitions:

• Catalog - TI's standard catalog product

• Military - QML certified for Military and Defense Applications

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 27-Jul-2021

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN75115DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
SN75115NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 27-Jul-2021

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN75115DR SOIC D 16 2500 340.5 336.1 32.0
SN75115NSR SO NS 16 2000 853.0 449.0 35.0

Pack Materials-Page 2
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