THESIS

INDEX:-
• Abstract
• Introduction
• review of literature
• theory
types
block diagram
circuit diagram
truth table
• material required
• working
• Construction of subtractor
• k - map
• parallel binary subtractor
• binary adder subtractor
• application
• advantage
• disadvantage
• conclusion
• bipliography

• ABSTRACT :-

In this project we study about half and full subtractor stuffing following factors
• theory
• Working and circuit requirements
• Characteristics of half and full subtractor
• Application, advantages and disadvantages

A Binary Subtractor is a digital circuit that performs the arithmetic binary subtraction between two
numbers with respect to the logic operations and laws of Boolean Algebra.
The subtractors are used in combinational circuit design and the Arithmetic Logic Unit (ALU) of
the processor to calculate multiple addresses. Subtractor circuits reduce sound distortion in
amplifiers and the power of radio signals.

A half subtractor subtracts a single bit binary number from another and has two inputs (A and B)
and two outputs (D for difference and B for borrow).

A full subtractor subtracts three bit binary numbers and has three inputs (X, Y, Z) and two outputs
(D for difference and B for borrow). Truth tables are provided to show the logic outputs for all input
combinations for both half and full subtractors.

• INTRODUCTION :-

The Full Subtractors are generally employed for ALU (Arithmetic Logic Unit) in computers to
subtract as CPU & GPU for the applications of graphics to decrease the circuit difficulty. The full
subtractor is the combinational circuit to perform subtraction using 3 bits.
Subtractors are mainly used for the performing of the arithmetic functions like subtraction
in digital devices and electronic calculators. Here, we will see what is a full subtractor in detail,
along with its truth table and implementation.

• REVIEW OF LITRATURE
Combinational Logic Circuits are built up of basic logic NAND, NOR or NOT gates that are
linked or connected to compose more complicated switching circuits. These logic gates signify
the building blocks of combinational logic circuits. Examples of combinational logic circuits are
adders, subtractors, decoder, encoder, multiplexer, and demultiplexer.

In the combinational circuits for the X input binary variable, there are Y output variables. In these
circuits for every possible combinational circuit, there is one possible output combination. So if
one of the conditions of its inputs changes state, from 0-1 or 1-0, so too will the resulting output
as combinational logic circuits by default have no memory/feedback loops within their design.

The subtractor is one of the types of the combinational arithmetic circuit that generates an output
which is the subtraction of two binary numbers. Through this article on Subtractors, you will learn
about half subtractors, full subtractors with the truth tables, circuit diagram and boolean
expression.

• THEORY :-

In electronics a subtractor – a digital circuitthat performs subtraction of numbers – can be

designed using the same approach as that of an adder. The binary subtraction process is
summarized below. As with an adder, in the general case of calculations on multi-bit numbers,
three bits are involved in performing the subtraction for each bit of the difference:
the minuend ( Xi), subtrahend (Yin), and a borrow in from the previous (less
significant) bit order position (Bi). The outputs are the difference bit ( Di) and borrow bit (Bi+1) .
The subtractor is best understood by considering that the subtrahend and both borrow
bits have negative weights, whereas the X and D bits are positive. The operation performed by the
subtractor is to rewrite (Xi-Yi-Bi)

(which can take the values -2, -1, 0, or 1) as the sum :-

- 2Bi+1 + Di.
Di = XOY;
@Bi
Bi+1 = X; < (Y + Bi) ,

where ⊕ represents exclusive or.

Subtractors are usually implemented within a binary adder for only a small cost when using the
standard two's complement notation, by providing an addition/subtraction selector to the carry-in
and to invert the second operand.

-B= B + 1 (definition of two's complement notation)

A -B= A+ (-B)
=A+B+1

• TYPE OF SUBTRACTOR :-

there are two type of basic subtractor are following :

• Half Subtractor :-

Half subtractor is a combinational logic circuit intended to perform the subtraction of two single
bits and generate the output. A subtractor circuit with two input variables as A and B displays two
outputs i.e Difference and Borrow and ,
The half subtractor is also a building block for subtracting two binary numbers. It has two
inputs and two outputs. This circuit is used to subtract two single bit binary numbers A and B.
The 'diff' and 'borrow' are two output states of the half subtractor.

• BLOCK DIAGRAM :-

The block diagram of a Half subtractor is as shown below :

• LOGIC DIAGRAM :-

The half subtractor circuit or the logical diagram is as shown:

• TRUTH TABLE :-

The SOP form of the Diff and Borrow is as follows:

 Diff= A'B+AB'
Borrow = A'B

In the above table :

• 'A' and 'B' are the input variables whose values are going to be subtracted.
• The 'Diff' and 'Borrow' are the variables whose values define the subtraction result, i.e.,
difference and borrow.
• The first two rows and the last row, the difference is 1, but the 'Borrow' variable is 0.
• The third row is different from the remaining one. When we subtract the bit 1 from the bit 0, the
borrow bit is produced.

From the above half subtractor truth table, we can recognize that the Difference (D) output is the
resultant of the Exclusive-OR gate and the Borrow is the resultant of the NOT-AND combination.
Then the Boolean expression for a half subtractor is as below.

• The logical expression for half - subtractor is :

Difference (D) = AB + AB = A0 B
Borrow = AB

The half-subtractor can be implemented using universal gates i.e the NAND and NOR gate as
shown below :

Half-subtractor using NAND gate ;

Half-subtractor using NOR gate ;

If we examine the Boolean expressions of the half subtractor with a half adder, Then we can figure
out that the two expressions for the Sum regarding adder and Difference regarding subtractor are
exactly the same and this is because of the Exclusive-OR gate function.
However, the two Boolean expressions for the binary subtractor Borrow are also quite alike to
that for the adder Carry. The only difference is that to transform a half adder to a half subtractor
the inversion of the minuend input A is made.

• Full Subtractor

A full subtractor is again a combinational circuit that delivers subtraction of two bits, one is
minuend and the other is subtrahend, taking into account the borrow of the earlier adjacent lower
minuend bit. The block diagram of a full subtractor is as shown below

• BLOCK DIAGRAM:-

The full subtractor circuit includes three input variables and two output variables. The three inputs;
Consider as A, B and Bin. The two outputs, D and Bout, outline the difference and output borrow,
respectively. and
the Half Subtractor is used to subtract only two numbers. To overcome this problem, a full
subtractor was designed. The full subtractor is used to subtract three 1-bit numbers A, B, and C,
which are minuend, subtrahend, and borrow, respectively. The full subtractor has three input
states and two output states i.e., diff and borrow.

• circuit diagram :-
• The full subtractor truth table is as shown:

• TRUTH TABLE ;-

In the above table,

• 'A' and' B' are the input variables. These variables represent the two significant bits that are
going to be subtracted.
• 'Borrowin' is the third input which represents borrow.
• The 'Diff' and 'Borrow' are the output variables that define the output values.
• The eight rows under the input variable designate all possible combinations of 0 and 1 that can
occur in these variables.

Note: We can simplify each of the Boolean output functions with the help of the unique map
method.

The logical expression for Full - subtractor

Difference =
A B Bin + A B Bin + A B Bin + A
E = Em (1,2, 4,7)
Borrow = ABin + AB + BBin
= Im (1,2,3, 7)

The combinational circuit of a full subtractor executes the operation of subtraction on three binary
bits generating outputs for the difference D and borrow B-out. Exactly like the binary adder circuit,
the full subtractor can also be imagined as two half subtractors connected together as shown
below.

• APPARATUS REQUIRED :-

• for full subtractor;

1. IC 7486, IC 7432, IC 7408, IC 7404, IC 7400.

2. BreadBoard.
3. We will use a Full Adder logic chip 74LS283N and NOT gate IC 74LS04. Components used-
4. 4pin dip switches 2 pcs
5. 4pcs Red LEDs
6. 1pc Green LED
7. 8pcs 4.7k resistors
8. 74LS283N
9. 74LS04
10. 13 pcs 1k resistors
11. Breadboard
12. Connecting wires
13. 5V adapter

• for half- subtractor

For making the half-Subtractor circuit we will need following components-

1. Green LED – 1 pc
2. Red LED – 1 pc
3. 74LS86
4. 74LS08N
5. 74LS04
6. 1pc 4pin DIP switch
7. 2pcs 4.7k resistor
8. 2pcs 1k resistor
9. 5V wall adapter
10. Breadboard and hook up wires

• WORKING :-
working of full subtractor :-

In the above image, 74LS283N is shown on the left and 74LS04 is on the right. 74LS283N is a
4bit full Subtractor TTL chip with Carry look ahead feature. And 74LS04 is a NOT gate IC, It has
six NOT gates inside it. We will use five of them.
The pin diagram is shown in the schematic.

Circuit Diagram to use these ICs as a Full-Subtractor circuit-

• Pin diagram of the IC 74LS283N and 74LS04 are also shown in the schematic. Pin 16 and Pin 8
is VCC and Ground respectively,
• 4 Inverter gates or NOT gates are connected across Pin 5, 3, 14 and 12. Those pins are the first
4-bit number (P) where the Pin 5 is the MSB and pin 12 is the LSB.
• On the other hand, Pin 6, 2, 15, 11 is the second 4-bit number where the Pin 6 is the MSB and
pin 11 is the LSB.
• Pin 4, 1, 13 and 10 are the DIFF output. Pin 4 is the MSB and pin 10 is the LSB when there is no
Borrow out.
• SW1 is subtrahend and SW2 is Minuend. We connected Carry in pin (Pin 7) to 5V for making it
Logic High. It’s needed for 2’s complement.
• 1k resistors are used in all input pins to provide logic 0 when the DIP switch is in OFF state. Due
to the resistor, we can switch from logic 1 (binary bit 1) to logic 0 (binary bit 0) easily. We are
using 5V power supply.
• When the DIP switches are ON, the input pins get shorted with 5V making those DIP switches
Logic High; we used Red LEDs to represent the DIFF bits and Green Led for Borrow out bit.
• R12 resistor used for pull up due to the 74LS04 couldn’t provide enough current to drive the
LED. Also, the Pin 7 and Pin 14 is respectively Ground and 5V pin of 74LS04. We also need
to convert the Borrow out bit coming from the Full-adder 74LS283N.
• Check the Demonstration Video for further understanding below, where we have shown
subtracting two 4-bit binary Numbers.
• On the other hand, Pin 6, 2, 15, 11 is the second 4-bit number where the Pin 6 is the MSB and
pin 11 is the LSB.
• Pin 4, 1, 13 and 10 are the DIFF output. Pin 4 is the MSB and pin 10 is the LSB when there is no
Borrow out.
• SW1 is subtrahend and SW2 is Minuend. We connected Carry in pin (Pin 7) to 5V for making it
Logic High. It’s needed for 2’s complement.
• 1k resistors are used in all input pins to provide logic 0 when the DIP switch is in OFF state. Due
to the resistor, we can switch from logic 1 (binary bit 1) to logic 0 (binary bit 0) easily. We are
using 5V power supply.
• When the DIP switches are ON, the input pins get shorted with 5V making those DIP switches
Logic High; we used Red LEDs to represent the DIFF bits and Green Led for Borrow out bit.
• R12 resistor used for pull up due to the 74LS04 couldn’t provide enough current to drive the
LED. Also, the Pin 7 and Pin 14 is respectively Ground and 5V pin of 74LS04. We also need
to convert the Borrow out bit coming from the Full-adder 74LS283N.
• Check the Demonstration Video for further understanding below, where we have shown
subtracting two 4-bit binary Numbers.
• On the other hand, Pin 6, 2, 15, 11 is the second 4-bit number where the Pin 6 is the MSB and
pin 11 is the LSB.
• Pin 4, 1, 13 and 10 are the DIFF output. Pin 4 is the MSB and pin 10 is the LSB when there is no
Borrow out.
• SW1 is subtrahend and SW2 is Minuend. We connected Carry in pin (Pin 7) to 5V for making it
Logic High. It’s needed for 2’s complement.
• 1k resistors are used in all input pins to provide logic 0 when the DIP switch is in OFF state. Due
to the resistor, we can switch from logic 1 (binary bit 1) to logic 0 (binary bit 0) easily. We are
using 5V power supply.
• When the DIP switches are ON, the input pins get shorted with 5V making those DIP switches
Logic High; we used Red LEDs to represent the DIFF bits and Green Led for Borrow out bit.
• R12 resistor used for pull up due to the 74LS04 couldn’t provide enough current to drive the
LED. Also, the Pin 7 and Pin 14 is respectively Ground and 5V pin of 74LS04. We also need
to convert the Borrow out bit coming from the Full-adder 74LS283N.
• Check the Demonstration Video for further understanding below, where we have shown
subtracting two 4-bit binary Numbers

• half subtractor :-

We can make the circuit in real on Breadboard to understand it clearly; for this we have used three
widely used XOR, AND and NOT chip from 74 series 74LS86, 74LS08, and 74LS04.
74LS86 has four XOR gates inside the chip and 74LS08 has four AND gates inside it where as
74LS04 has six NOT gate inside it. These three ICs are widely available and we will make Half-
Subtractor circuit using these three. Below are the pictures of those three ICs.
We can also see the pin diagram in the below image-

Circuit Diagram to use these three ICs as a half-Subtractor circuit-

We constructed the circuit in breadboard and observed the output.

1. In the above circuit diagram one of the XORgate from 74LS86, one of the AND gate from
74LS08 and a NOT gate from 74LS04are used.
2. Pin 1 and 2 of 74LS86 are the inputs of the Ex-OR gate and pin 3 is the output from the gate,
on the other side pin 1 and 2 of 74LS08 is the input of the AND gate and pin 3 is the output
from the gate, pin1 from the 74LS04 is the input of inverter gate and pin2 is the output of
inverter gate.
3. As per the pin diagram, 7th pin of those ICs are connected to GND and 14th pin of those ICs
are connected to VCC.
4. In our case the VCC is 5v. We added two LEDs to identify the output.
5. When the output is 1, the LED will glow. Here Red LED is used for the Diffand Green LED is
used for the Borrow bit.
6. We added DIP switch in the circuit to provide input on the gates, for the bit 1 we providing 5V
as input and for 0 We providing GND through 4.7k resistor
7. 7. 4.7k resistors are used to provide 0 inputs when the DIP switch is in off state.

Half Subtractor circuit is used for bit subtraction and logical output related operations in
computers.

• Construction of Half Subtractor Circuit:-

• BLOCK DIAGRAM :-

In the block diagram, we have seen that it contains two inputs and two outputs. The carry and
sum are the output states of the half subtractor. The half subtractor is designed with the help of
the following logic gates:

1. 2-input AND gate.

2. 2-input Exclusive-OR Gate or Ex-OR Gate
3. NOT or inverter Gate

• 1. 2-input Exclusive-OR Gate or Ex-OR Gate :-

The Diff bit is generated with the help of the Exclusive-OR or Ex-OR gate.

• OF GATE :-

The above is the symbol of the EX-OR gate. In the above diagram, 'A' and 'B' are the inputs, and
'Diff' is the final outcome after performing the XOR operation of both numbers.

The truth table of the EX-OR gate is as follows:

From the above table, it is clear that the XOR gate gives the result 1 when both of the inputs are
different. When both of the inputs are the same, the XOR gives the result 0. To learn more about
the XOR gate,

• 2. 2-input AND gate:-

The XOR gate is unable to generate the carry bit. For this purpose, we use another gate called
AND gate. The AND gate is not enough to give the correct result of 'Borrow'. We will use the NOT
gate with the 'AND' gate to get the correct result.

• AND GATE :-

The above is the symbol of the AND gate. In the above diagram, 'A' and 'B' are the inputs, and
'OUT' is the final outcome after performing AND operation of both numbers.

• There is the following truth table of AND gate:

From the above table, it is clear that the AND gate gives the result 1 when both of the inputs are 1.
When both of the inputs are different and 0, the AND gates gives the result 0. To learn more about
the AND gate,

• 3. NOT or Inverter Gate:

The NOT gate is used to get the inverse output. We can combine the 'AND' and 'NOT' gates in
order to get the combinational gate 'NAND'. By inverting the input 'A' using 'NOT' gate and then
use the output of the 'NOT' gate as the input of the 'AND' gate, we can get the 'Borrow' bit.

• NOT GATE :-

• TRUTH TABLE :-

• LOGICAL CIRCUIT DIAGRAM :-

So, the Half Subtractor is designed by combining the 'XOR', 'AND', and 'NOT' gates and provide
the Diff and Borrow.
The Boolean expression of the Half Adder circuit is given below:

Diff= A XOR B (A⊕B)

Borrow= not-A AND B (A'.B)

• Construction of Full
Subtractor Circuit:
• BLOCK DIAGRAM :-

The above block diagram describes the construction of the Full subtractor circuit. In the
above circuit, there are two half adder circuits that are combined using the OR gate. The first half
subtractor has two single-bit binary inputs A and B. As we know that, the half subtractor
produces two outputs, i.e., 'Diff' and 'Borrow'. The 'Diff' output of the first subtractor will be the
first input of the second half subtractor, and the 'Borrow' output of the first subtractor will be the
second input of the second half subtractor. The second half subtractor will again provide 'Diff' and
'Borrow'. The final outcome of the Full subtractor circuit is the 'Diff' bit. In order to find the final
output of the 'Borrow', we provide the 'Borrow' of the first and the second subtractor into the OR
gate. The outcome of the OR gate will be the final carry 'Borrow' of full subtractor circuit.
The MSB is represented by the final 'Borrow' bit.
The full subtractor logic circuit can be constructed using the 'AND', 'XOR’ gate NOT gate with an
OR gate :-

• circuit diagram:-

The actual logic circuit of the full subtractor is shown in the above diagram. The full subtractor
circuit construction can also be represented in a Boolean expression.

Diff:
• Perform the XOR operation of input A and B.
• Perform the XOR operation of the outcome with 'Borrow'. So, the difference is (A XOR B) XOR
'Borrowin' which is also represented as:
(A ⊕ B) ⊕ 'Borrowin'

Borrow :-

• Perform the 'AND' operation of the inverted input A and B.

• Perform the 'XOR' operation of input A and B.
• Perform the 'OR' operations of both the outputs that come from the previous two steps. So the
'Borrow' can be represented as:
A'.B + (A ⊕ B)'

• K-MAP :-

The Karnaugh map is a method of simplifying Boolean algebraexpressions.

• HALF SUBTRACTOR

The for the half subtractor Using the table below and a karnaugh map :-

Inputs Outputs
X Y D Bout
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
Using the table above and a Karnaugh map, we tind the following logic equations for D and Bout :
D=XOY
Bout =X.Y.
Consequently, a simplified half-subtract circuit, advantageously avoiding crossed traces in
particular as well as a negate gate is :-

X ── XOR ─┬─────── |X-Y|, is 0 if X equals Y, 1 otherwise

┌──┘ └──┐
Y ─┴─────── AND ── borrow,
is 1 if Y > X, 0 otherwise

• FULL SUBTRACTOR :-

where lines to the right are outputs and others (from the top, bottom or left) are inputs.

Inputs Outputs
X Y Bin D Bout
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

From above table we can draw the K-Map as shown for “difference” and “borrow”.
• Logical expression for difference -

D = A'B'Bin + A'BBin' + AB'Bin' + ABBin

= Bin(A'B' + AB) + Bin'(AB' + A'B)
= Bin( A XNOR B) + Bin'(A XOR B)
= Bin (A XOR B)' + Bin'(A XOR B)
= Bin XOR (A XOR B)
= (A XOR B) XOR Bin

• Logical expression for borrow -

Bout = A'B'Bin + A'BBin' + A'BBin + ABBin

= A'B'Bin +A'BBin' + A'BBin + A'BBin + A = A'Bin(B + B') + A'B(Bin + Bin') + BBin = A'Bin + A'B
+
BBin

• Logic Circuit for Full Subtractor –

Implementation of Full Subtractor using Half Subtractors – 2 Half Subtractors and an OR gate is
required to implement a Full Subtractor.

• Parallel binary Subtractor -

A Parallel Subtractor is a digital circuit capable of finding the arithmetic difference of two binary
numbers that is greater than one bit in length by operating on corresponding pairs of bits in
parallel. The parallel subtractor can be designed in several ways including combination of half and
full subtractors, all full subtractors or all full adders with subtrahend complement input.

• Working of Parallel Subtractor –

1. As shown in the figure, the parallel binary subtractor is formed by combination of all full
adders with subtrahend complement input
2. This operation considers that the addition of minuend along with the 2’s complement of the
subtrahend is equal to their subtraction.
3. Firstly the 1’s complement of B is obtained by the NOT gate and 1 can be added through the
carry to find out the 2’s complement of B. This is further added to A to carry out the arithmetic
subtraction.
4. The process continues till the last full adder FAn uses the carry bit Cn to add with its input An
and 2’s complement of Bn to generate the last bit of the output along last carry bit Cout.
•
Advantages of parallel Adder/Subtractor –

1. The parallel adder/subtractor performs the addition operation faster as compared to serial
adder/subtractor.
2. Time required for addition does not depend on the number of bits.
3. The output is in parallel form i.e all the bits are added/subtracted at the same time.
4. It is less costly.
•
Disadvantage of parallel Subtractor –

1. Each adder has to wait for the carry which is to be generated from the previous adder in
chain.
2. The propagation delay( delay associated with the travelling of carry bit) is found to increase
with the increase in the number of bits to be added.

• Binary Adder-Subtractor :-

A Binary Adder-Subtractor is a special type of circuit that is used to perform both operations, i.e.,
Addition and Subtraction. The operation which is going to be used depends on the values
contained by the control signal. In Arithmetic Logical Unit, it is one of the most important
components.
To work with Binary Adder-Subtractor, it is required that we have knowledge of the XOR gate Full-
Adder, Binary Addition, and subtraction.
For example, we will take two 4-bit binary numbers 'X' and 'Y' for the operation with digits.

X0 X1 X2 X3 for X
Y0 Y1 Y2 Y3 for Y
The Binary Adder-Subtractor is a combination of 4 Full-Adder, which is able to perform the
addition and subtraction of 4-bit binary numbers. The control line determines whether the
operation being performed is either subtraction or addition. This determination is done by the
binary values 0 and 1, which is hold by K.
In the above diagram, the control lines of the first Full-Adder is directly coming as its input(input
carry C0). The X0 is the least significant bit of A, which is directly inputted in the Full-Adder. The
result produced by performing the XOR operation of Y0 and K is the third input of the Binary
Adder-Subtractor. The sum/difference(S0) and carry(C0) are the two outputs produced from the
First Full-adder.

When the value of K is set to true or 1, the Y0⨁K produce the complement of Y0 as the output.
So the operation would be X+Y0', which is the 2's complement subtraction of X and Y. It means
when the value of K is 1; the subtraction operation is performed by the binary Adder-Subtractor.
In the same way, when the value of K is set to 0, the Y0⨁K produce Y0 as the output. So the
operation would be X+Y0, which is the binary addition of X and Y. It means when the value of K is
0; the addition operation is performed by the binary Adder-Subtractor.

The carry/borrow C0 is treated as the carry/borrow input for the second Full-Adder. The sum/
difference S0 defines the least significant bit of the sum/difference of numbers X and Y. Just like
X0, the X1, X2, and X3 are faded directly to the 2nd, 3rd, and 4th Full-Adder as an input. The
outputs after performing the XOR operation of Y1, Y2, and Y3 inputs with K are the third inputs for
2nd, 3rd, and 4th Full-Adder. The carry C1, C2 are passed as the input to the Full-Adder. Cout is
the output carry of the sum/difference. To form the final result, the S1, S2, S3 are recorded with
s0. We will use n number of Full-Adder to design the n-bit binary Adder-Subtractor.

Example:
We assume that we have two 3 bit numbers, i.e., X=100 and Y=011, and feed them in Full-Adder
as an input.
X0 = 0 X1 = 0 X2 = 1
Y0 = 1 Y1 = 1 & Y2 =
0 For K=0:
Y0⨁K=Y0 and
Cin=K=0 So, from first
Full-Adder S0 =
X0+Y0+Cin
S0= 0+1+0
S0=1
C0=0

Similarly,
S1 = X1+Y1+C0
S1 = 0+1+0
S1=1 and C1=0

Similarly,

S2 = X2+Y2+C1
S2 = 1+0+0
S2=1 and C2=0

Thus,
X= 100 =4
Y = 011 = 3
Sum = 0111 = 7
For K=1
Y0⨁K=Y0' and Cin=k=1
So,
S0 =
X0+Y0'+Cin S0
= 0+0+1 S0=1
and C0=0

• Application :-

HALF SUBTRACTOR ;

Some of the applications of half subtractor include the following :-

1. Calculators:

Most mini-computers utilize advanced rationale circuits to perform numerical tasks. A Half
Subtractor can be utilized in a number cruncher to deduct two parallel digits from one another.

2. Alarm Frameworks:

Many caution frameworks utilize computerized rationale circuits to identify and answer
interlopers. A Half Subtractor can be utilized in these frameworks to look at the upsides of two
parallel pieces and trigger a caution in the event that they are unique.

3. Automotive Frameworks:

Numerous advanced vehicles utilize computerized rationale circuits to control different

capabilities, like the motor administration framework, stopping mechanism, and theater setup. A
Half Subtractor can be utilized in these frameworks to perform computations and examinations.

4. Security Frameworks:

Advanced rationale circuits are usually utilized in security frameworks to identify and answer
dangers. A Half Subtractor can be utilized in these frameworks to look at two double qualities and
trigger a caution in the event that they are unique.

5. Computer Frameworks:
Advanced rationale circuits are utilized broadly in PC frameworks to perform estimations and
examinations. A Half Subtractor can be utilized in a PC framework to deduct two paired values
from one another.

• FULL SUBTRACTOR ;

Some of the applications of full subtractorinclude the following :-

• These are generally employed for ALU (Arithmetic logic unit) in computers to subtract as CPU &
GPU for the applications of graphics to decrease the circuit difficulty.

• Subtractors are mostly used for performing arithmetical functions like subtraction, in electronic
calculators as well as digital devices

• These are also applicable for different microcontrollers for arithmetic subtraction, timers, and the
program counter (PC)

• Subtractors are used in processors to compute tables, addresses, etc.

• It is also useful for DSP and networking based systems.

• These are used mainly for ALU within computers for subtracting like CPU & GPU for graphics
applications to reduce the complexity of the circuit.

• These are mainly used to perform arithmetical functions such as subtraction within digital
devices, calculators, etc.

• These subtractors are also appropriate for various microcontrollers for timers, PC (program
counter) & arithmetic subtraction

• These are employed for processors to calculate addresses, tables, etc.

• The implementation of this with logic gates like NAND & NOR can be done with any full
subtractor logic circuit because both the NOR & NAND gates are called universal gates.

From the above information, by evaluating the adder, full subtractor using two half subtractor
circuits, and its tabular forms, one can notice that Dout in the full-subtractor is accurately similar
to the Sout of the full-adder. The only variation is that A (input variable) is complemented in the
full-subtractor. Thus, it is achievable to change the full-adder circuit into a full-subtractor by just
complementing the i/p A before it is given to the logic gates to generate the last borrow-bit output
(Bout).
By using any full subtractor logic circuit, full subtractor using NAND gates and full
subtractor using nor gates can be implemented, since both the NAND and NOR gates are treated
as universal gates.

• ADVANTAGE :-

• HALF SUBTRACTOR ;

1. Simplicity: The half subtractor circuits are simple and easy to design, implement, and debug
compared to other binary arithmetic circuits.
2. Building blocks: The half subtractor are basic building blocks that can be used to construct
more complex arithmetic circuits, such as full adders and subtractors, multiple-bit adders and
subtractors, and carry look-ahead adders.
3. Low cost: The half subtractor circuits use only a few gates, which reduces the cost and
power consumption compared to more complex circuits.
4. Easy integration: The half subtractor can be easily integrated with other digital circuits and
systems.
• FULL SUBTRACTOR :-

1. Full subtractor is a combinational circuit which takes three inputs as 2 operands (A, B) an one
carry in (Cin) and generates output as sum and carry out.

2. The advantage of the circuit is that it is easy to construct and it is used in various applications
like multi bit subtractor, adder,multipliers, arithmetic programmable state machines, up
counter.

2. provides facility to add the carry from the previous stage.

3. The power consumed by the full subtractor is relatively less as compared to half subtractor.

4. Full subtractor can be easily converted into a half subtractor just by adding a NOT gate in the
circuit.

5. Full subtractor produces higher output that half subtractor.

•
DISADVANTAGES :-
•
Half subtractor ;

1. Limited functionality: The half subtractor can only perform binary addition and subtraction of
two single-bit numbers, respectively, and are not suitable for more complex arithmetic
operations.

2. Inefficient for multi-bit numbers: For multi-bit numbers, multiple half subtractors need to be
cascaded, which increases the complexity and decreases the efficiency of the circuit

3. High propagation delay: The propagation delay of half subtractor is higher compared to other
arithmetic circuits, which can affect the overall performance of the system.

• FULL ADDER :-

1. The disadvantage of full adder starts to appear when multiple full adder circuits are cascaded
as the propagation delay increases so the next stages needs to wait for the carry in of
previous stages for such applications the ripple carry look ahead adders are used in which the
Carrie is calculated previously to the addition using a logic.

2. For all practical uses look ahead carry adder is used in major context accept the counter and
few specific applications where the fabrication layout is limited.

• Conclusion :-
A half subtractor is a combinational logic circuit that can calculate the difference of two binary
digits. A half subtractor can only be used to subtract the LSB (Least Significant Bit) of the
subtrahend from the LSB of the minuend when one binary number is subtracted from another
binary number.
and for full subtractor we can conclude that a full-subtractor is a combinational logic circuit that
can compute the difference of three binary digits. In a full subtractor, the borrow (if any) from the
previous stage is also used in subtraction operation in the next stages. Therefore, full subtractors
are used to perform subtraction of binary numbers having any number of digits.

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