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Carry Save Addition: CS623 Cad For Vlsi

This document summarizes a lecture on carry save addition and multipliers. It introduces carry save addition as a way to add three n-bit numbers to produce an n-bit sum and (n+1)-bit carry without propagating the carry. This is implemented using a carry save adder circuit. It describes how carry save addition can be used to add many numbers using carry save adders in a tree structure. It then discusses how carry save addition can be applied to implement multipliers using partial products and a Wallace tree. Different multiplier architectures like array, booth encoding, and lookup tables are also covered.

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Siva Charan
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68 views5 pages

Carry Save Addition: CS623 Cad For Vlsi

This document summarizes a lecture on carry save addition and multipliers. It introduces carry save addition as a way to add three n-bit numbers to produce an n-bit sum and (n+1)-bit carry without propagating the carry. This is implemented using a carry save adder circuit. It describes how carry save addition can be used to add many numbers using carry save adders in a tree structure. It then discusses how carry save addition can be applied to implement multipliers using partial products and a Wallace tree. Different multiplier architectures like array, booth encoding, and lookup tables are also covered.

Uploaded by

Siva Charan
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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CS623

Carry Save Addition


CS623
CAD for VLSI

Given three n-bit numbers x, y and z.


The circuit computes a n-bit number u and a
(n+1)-bit number v such that

Lecture 22 : CSA and Multipliers

x+y+z = u + v

Shankar Balachandran
Dept. of Computer Science and Engineering
25 February 2007

Indian Institute of Technology Madras


[email protected]

CS623

CS623

Carry Save Addition - Example

= X

= Y

= Z

Generate CARRY and SUM


Use Full Adders

Accumulate the carry and sum


Do not propagate carry
The carry from stage i is not used by stage i+1

= U

SUM

= V

CARRY

25 February 2007

25 February 2007

Implementation of CSA

U and V are generated in O(1) steps


The summation U+V can be done in any way that
you desire
This specific implementation is also called a 3:2
compressed adder
4

CS623

CS623

Adding M Numbers Using CSA

Carry Save Adder Circuit

X1

X2

X3

X4

X5

Xm

CSA

CSA

25 February 2007

25 February 2007

CSA

CSA
Any Adder of Choice
6

CS623

CS623

Adding M Numbers W/ Wallace Tree


X0

X1

X2

X3

CSA

X4

CSA

X5

X6

X7

Multipliers

X8

Simple grade-school multiplication method

CSA

Concept of partial-products
CSA

Partial products generated in parallel and carry


save addition results in faster array multiplier

CSA

CSA

Any Adder of Choice


7

25 February 2007

25 February 2007

CSA

CS623

CS623

Grade-school multiplication

Wallace Tree Multiplication

25 February 2007

25 February 2007

1110=a
1101=b
-----------------------------1 1 1 0 = m(0)
0 0 0 0 = m(1)
1110
= m(2)
1110
= m(3)
------------------------------10110110=p

10

CS623

CS623

11

Scaling Accumulator

25 February 2007

25 February 2007

Carry Save Array Multiplier

12

CS623

CS623

Lookup Table Based Multiplication

25 February 2007

25 February 2007

Ripple Carry Array Multiplier

13

000

001

010

011

100

101

110

111

000

000000

000000

000000

000000

000000

000000

000000

000000

001

000000

000001

000010

000011

000100

000101

000110

000111

010

000000

000010

000100

000110

001000

001010

001100

001110

011

000000

000011

000110

001001

001100

001111

010010

010101

100

000000

000100

001000

001100

010000

010100

011000

011100

101

000000

000101

001010

001111

010100

011001

011110

100011

110

000000

000110

001100

010010

011000

011110

100100

101010

111

000000

000111

001110

010101

011100

100011

101010

110001

One address bit for each bit in each input


Table size grows exponentially
Very limited use
Fast - result is just a memory access away
14

CS623

CS623

Partial Products Lookup Multiplier

15

67
x 54
28
240
350
+3000
3618

67
x 54
28
240
350
+3000
3618

67
x 54
28
240
350
+3000
3618

25 February 2007

25 February 2007

67
x 54
28
240
350
+3000
3618

6x6 Multiplier Using 3x3 Multiplier

16

CS623

CS623

input
000
001
010
011
100
101
110
111
17

00
0
67
134
201
268
335
402
469

References
5 bit input * 67
01
10
536
1072
603
1139
670
1206
737
1273
804
1340
871
1407
938
1474
1005
1541

Computer Arithmetic Algorithms, 2nd Edition


by Israel Koren
11
1608
1675
1742
1809
1876
1943
2010
2077

Computer Arithmetic: Algorithms and Hardware


Designs by Behrooz Parhami
Ray Andrakas Website

25 February 2007

25 February 2007

Constant Multiplier

18

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