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Assignment 17

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15 views2 pages

Assignment 17

Uploaded by

sreejeet17111995
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Carry Look-Ahead Adder

A carry look-ahead adder reduces the propagation delay by introducing more complex
hardware. In this design, the ripple carry design is suitably transformed such that the carry
logic over fixed groups of bits of the adder is reduced to two-level logic.
Boolean expression for carry look-ahead adder:

Table of Carry Look-Ahead Adder

Design Carry Look-Ahead Adder


Procedure
1. Take 7 input pin and change facing – “South”, Label – “C1, G1, G2, G3, P1, P2, P3”
respectively.
2. Take 3 output pin and change Label – “W, X, Y, Z” respectively.
3. Take 6 AND gate from Gates section and change number of Inputs – “2” and “3”.
4. Take 3 OR gate from Gates section and change number of Inputs – “3”, “2”, “1”.
5. Connect all the line as shown in the picture.
Discussion
1. We define two variables as ‘carry generate’ Gi and ‘carry propagate’ Pi.
2. The sum output and carry output can be expressed in terms of carry generate Gi and
carry propagate Pi as Si= Pi XOR Ci, Ci+1= Gi OR (Pi AND Ci).
3. C4 does not have to wait for C 3 and C2 to propagate but actually C 4 is propagated at
the same time as C3 and C2 . Pi= Ai XOR Bi, Gi= Ai AND Bi.

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