EE-401 Boost Convertor

Shailesh Agarwal Saurabh Maurya

21085085 21085084
[email protected] [email protected]

I. I NTRODUCTION II. S MALL SIGNAL ANALYSIS OF BOOST CONVERTER

A. Ideal boost converter
Among DC-DC converters with different topologies [1], a Determine the ideal condition The circuit required for power
Boost converter with an efficiency of 65to95 is a converter conversion is placed in the ideal boost converter circuit, and
where output voltage is higher than the input. electric. It can the ON state and OFF state are equal, as shown in Figure
be seen that the Boost converter model is more complex than 1,2,3.
buck, buck-boost considering that the Boost converter is not
low-level. A fraction also has a zero base. In other words,the
state space equation’s solution for the design of this converter
will be more difficult [4] because the duty ratio is considered
as the controller of this converter and appears in the voltage
and current equation [4].
The structure of the DC-DC converter having linear ele-
ments such as R, CandL and non-linear (i.e. switch) compo-
nents. Since these transformers can be described as non-linear
and timevarying, a small sample of the state space averaging Fig. 1. Circuit Diagram of Ideal-Boost-Converter
model is needed to generate a control line. References [3-7]
depicts examples of small signal and control circuits designed
in frequency range of boost converters. These models also in-
clude parasitic components to improve the modeling accuracy.
In recent years, advancements in DC-DC converter tech-
nology have focused on integrating various control mecha-
nisms to enhance response time, reliability, and efficiency.
The operation of these converters can be categorized into
two modes: (I) continuous operation and (II) discontinuous
operation. The mode of operation is influenced by factors such
as the converter’s topology, power supply configuration, and
operating frequency.
Efficiency in converters is primarily governed by the control Fig. 2. When switch is ON
system, which typically includes classic controllers like PI
and PID controllers. However, certain converter configurations, State space equations during On state will be
such as boost, buck, and flyback, exhibit a non-minimum  diL     1
0 0 iL
phase characteristic, particularly with a half-right zero plane. dt
dvc = −1 + L vin (1)
This characteristic poses challenges for PID controllers, espe- dt
0 RC v C 0
 
cially in handling load variations, leading-edge modulation,   iL
vo = 0 1 (2)
and stochastic operation. Therefore, a type-3 controller is vC
considered more suitable in such cases. State space equations during off state will be
To address this, the state-average method is employed for  diL  
0 −1
  1
iL
dt L + L vin
transition calculations. The primary aim of this study is to dvc = 1 −1 (3)
dt C RC v C 0
design a type3 compensator for power conversion and assess  
 iL
the closedloop stability of the converter concerning both time

vo = 0 1 (4)
and frequency domains. vC
apply the state space averaging technique, using this:
x̄ = [A1∗d+A2∗(1−d)]∗ x̄+[B1∗d+B2∗(1−d)]∗vin (5)
 Fig. 3. When Switch is off

After applying state-space averaging technique, we will get:

 diL  " #
−(1−d)   1
dt 0 L iL
dvc = (1−d) −1
+ L vin (6)
dt
vC 0
C RC
 
  iL Fig. 4. Bode Plot of Ideal Boost Converter
vo = 0 1 (7)
vC
After getting small signal model equations, we will apply
perturbation as follow. and complicate the design process. picture. Figure 4 shows
the simple equivalent circuit of a Non-ideal Boost converter.
(iL ) = (IL + ĩL ) C and l can be considered as filters for output response. The
resistance in series with capacitor Rc and resistance in series
(vC ) = (VC + vf
C)
with inductor Rl has been included in the analysis
(vin ) = (Vin + vf
in )
(d) = (D + d) (8)
After applying perturbation, we get:
" # " #
diL −(1−D)  ˜  1 VC
 
g
dt 0 L iL L L
vfin
= (1−D) + (9)
df
vc
C
−1
RC
v
f C 0 −IL
C d˜
dt
 i˜L
 

vo = 0 1 (10)
v˜C
Next step is to do linearization about steady state point and
keep input perturbation equals to zero as we keep input voltage
constant, we get:
I
− ′ ∗V
v̂(s) C [s− DI∗L ]
= ′2  (11) Fig. 5. Non-ideal Boost-converter
ˆ
d(s) 2 s
s + C∗R + L∗C D

B. Parasitic or non-ideal Boost Converter

The statespace equation can be derived with the help of
The difference between ideal-and non-ideal boost converter KVL and KCL equation derived from below figure: the state
is only that in ideal, we consider the inductor and capacitor to space (ss) equation when switch is closed will be:-
be pure inductive and capacitive, but in non-ideal, we add a
small resistance with both the inductor and capacitor. The idea State space equations during On state will be
of considering the best/not the worst and keeping the parasite,
as we did before, is to make it easier to develop the model
and understand the characteristic factors of change. However,  diL   RL
− L 0

iL
 1
dt = + L vin (12)
its important to take the effect of parasitic components and dvc 0 −1
vC 0
dt C(R+RC )
losses into account to make modal accuracy better and examine i 
iL
h
effectiveness and efficiency of system. The problem with R
vo = 0 (R+RC ) (13)
parasites is that they can cause non-linear currents and voltages vC
 After this, we will get our small signal model:
" # "h
 (1−D)2 (RRC ) i  −(1−D)R #  
−RL
dfiL
dt L − L(R+RC ) L(R+RC ) ieL
= (1−D)R
d
g vC −1 vf C
dt C(R+RC ) C(R+RC )
" h  i#  
1 Vo

(1−DRRC IL )
L + vf
in
+ L L(R+RC )
−RIL
(20)
0 d
e
C(R+RC )
i e  h i vf 
iL
h 
(1−D)RRC C −RRC IL in
vo = R+RC (R+RC ) + 0 (R+RC )
vfC d
e
(21)

Fig. 6. When Switch is ON

Fig. 7. When Switch is off

State space equations during On state will be

"   # Fig. 8. Bode Plot of Open loop Boost Converter

−RL RRC −R
 diL 
 1
dt
[ L −
L(R+RC ) ] ( L(R+R iL
C)
)
dvC = + L vin
dt
R −1 vC 0 III. T YPE -III C OMEPENSATOR DESIGN
C(R+RC ) C(R+RC )
(14) The design of a controller is critical for maintaining ef-
h  i 
iL fective working and power supply’s regulation. Controllers,
RRC 1
vo = R+R (R+R ) (15) which combine zeros and pole , shape the traditional loop by
C C vC
adjusting phase as well as gain characteristics of the open-
loop frequency response, ensuring the robustness of converter.
After this, applying the state space averaging technique, we The ”Type-III” compensator, characterized as lead lead type
will get with a pole located at origin, offers a phase boost ranging
 diL  " −RL
 (1−d)2 (RRC )  #    from 0°-180° with negligible steady state error.Despite the
−(1−d)R 1non-minimum phase issue of boost converter, employing a

dt
[ L − L(R+RC ) ] ( L(R+RC ) ) iL
dvC = + Lcascaded
v Type-3 compensator can enhance closed-loop per-
dt
R −1 v C 0 in
C(R+RC ) C(R+RC ) formance. By appropriately tuning controller parameters, op-
(16) timal closedloop performance with minimum overshoots and
h  i i 
vo = (1−d)RR
R+RC
C 1
(R+RC )
L
(17) minimum steadystate error can be achieved.
vC
A. Calculating parameters
After getting small signal model equations, we will apply Type-3 controller have two zero and two pole with a pole
perturbation as follows, keeping the input voltage constant. at origin.

(1 + s/ωz1 ) (1 + s/ωz2 )
iL = IL + ĩL Tc (s) = (22)
(s/ωpo ) (1 + s/ωp1 ) (1 + s/ωp2 )
vC = VC + vf
C
Now let’s assume both zeroes are at same point and both poles
d=D+d (18) are at same point.
 ωz1 = ωz2 = ωz1,2 and ωp1 = ωp2 = ωp1,2 .   2
phase boost π
k= tan +
s
2
 4 4
1 + ωz1,2
Tc (s) =   2 (23) With the help of Eq.22 we can derive fp1,2 and fz1,2
s s
ωpo 1 + ωp1,2
√
 
phase boost π
Find magnitude by replacing s with ωj in Eq.(23) fp1,2 = k · fc = tan + fc (30)
4 4
  2 
ω
1 + ωz1,2 fc fc
fz1,2 = √ =   (31)
k phase boost π
|Tc (jω)| =    2  (24) tan 4 + 4
ω ω
ωpo 1 + ωp1,2
With the help of given Controller parameters, we can easily
Similarly, We can write Argument as: find the fp1,2 and fz1,2 with the help of Eq.(30) and Eq.(31)
and hence the transfer function of the compensator.
   
ω π ω C. Mid-Band Gain Calculation
arg Tc (jω) = 2 tan−1 − 2 tan−1 −
ωz1,2 2 ωp1,2 The Controllers transfer function can also be written as
(25) below from Eq.(23)
The frequency at which the maximum phaseboost occurs can
be readily determined by differentiating the equation (25) (ωz1 /s + 1) (1 + s/ωz2 )
Tc (s) = Go (32)
(1 + s/ωp1 ) (1 + s/ωp2 )
d
(arg Tc (jω))
df Go is also called MidBand-Gain which is equal to ωpo /ωz1
Let gain at fc be G, we can write:
    
d f f 2


−1 −1 ωp1,2 + ωc2
= 2 tan − 2 tan ωpo = G · ωz1 (33)
df fz1,2 fp1,2 r 2 r  2
2 ωz1,2 ωc
ωp1,2 ωc +1 ωz1,2 +1
2 2
=>  −   =0 IV. C OMPENSATOR D ESIGN WITH EXAMPLE
f2 f2
fz 2 +1 fp 2 +1
fz1,2 fp1,2 Let’s assume that we have to design a Controller for a DC-
p DC Boost Conveter having crossover frequency of 1KHz and
fmax = fz1,2 fp1,2 (26) phase margin of 60° . The necessary Phase Boost is 142°. The
This frequency is called the Crossover Frequency(fc) of the position of both zero can be derived from Eq.(23) :
controller. 1000
fz1,2 = 142◦

= 167.17 Hz (34)
B. K factor Calculation tan 4 + 45◦
The ratio of double pole frequency to double zero frequency Similarly, the position of pole can be derived from Eq.(24)
of the controller is called k factor. Zero pole pairs together 
142◦

◦
provide a maximum frequency range of 180°. Therefore, it is fp1,2 = tan + 45 × 1000 = 598.18Hz (35)
4
necessary to balance the relation between k and amplification
level of compensator. With the help of above-calculated values, we can write the our
     transfer function of Type-3 Compensator as:
fc fc
phaseboost = 2 tan−1 − tan−1 (27) 3.5 ∗ 1010 s2 + 7.4 ∗ 1013 s + 3.8 ∗ 1016
fz1,2 fp1,2 Tc (s) = (36)
s (1.1 ∗ 106 s2 + 8.3 ∗ 1010 s + 1.5 ∗ 1015 )
and p
fc = fmax = fz1,2 fp1,2 (28) Now, we will integrate this compensator with our boost
converter.
    
−1 fp1,2 −1 fc
phaseboost = 2 tan − tan (29)
fc fp1,2
let k be a constant
2 2
k = fp1,2 /fz1,2
So,
√
  
−1 −1 1
phaseboost = 2 tan ( k) − tan √
k
 Fig. 9. Bode Plot of Compensator Fig. 12. Bode Plot of Compensator

Fig. 10. Root Locus of Plant

Fig. 13. Closed Loop Output Waveform

Fig. 11. Closed Loop Circuit Diagram Fig. 14. Bode Plot of Compensator
 V. PID C OMPENSATOR D ESIGN
Given the performance requirements and stability margins,
a PID compensator can be designed to achieve the desired
system response. The PID compensator has the following
transfer function:

Ki
C(s) = KP + + Kd s
s
Where:
• KP is the proportional gain
Fig. 18. Transient Output Response
• Ki is the integral gain
• Kd is the derivative gain

Fig. 19. Transient Output Response

Fig. 15. Bode Plot of Compensated System

The goal is to ensure that the system meets the specified
performance criteria (rise time, settling time, overshoot, etc.).
• Steady-State Error: 0.0000
• Settling Time: 1.8365 seconds
• Rise Time: 1.0340 seconds
• Peak Overshoot: 0.00%
• Damping Ratio: 1.0000
• Natural Frequency: 720.0000 rad/s
• Efficiency: 100.00%

Fig. 16. Root Locus Plot of Compensated System

Fig. 17. Nyquist Plot of Compensated System

Time Domain Simulation

To validate the PID compensator design using a time-
domain simulation, we’ll simulate the step response of the
compensated system and compare it to the design targets.
Controllability and Observability Analysis
To carry out the controllability and observability analysis
for the state-space model, we will calculate the controllability
and observability matrices and check their ranks. A system is:
• Controllable if the controllability matrix has full rank
(equal to the number of states).
• Observable if the observability matrix has full rank
(equal to the number of states).

Closed-Loop Controllability Matrix:

 
0 0 0.0016
1.0 × 109 × 0.0000 −0.0013 −3.6352
0 0.0016 −3.4560

Closed-Loop Observability Matrix:

 
0.0000 0 0.0000
5
1.0 × 10 ×  0 0.0002 −0.0020
−1.6000 −0.4300 3.5000

• Rank of Closed-Loop Controllability Matrix: 3

• Rank of Closed-Loop Observability Matrix: 3
The Compensated System is Controllable and Observable