34348-OP

128X64 GRAPHIC DISPLAYAY

White Characters on Blue

GENERAL SPECIFICATIONS

Contents

1.Module Classification Information

2.Precautions in use of LCD Modules
3.General Specification
4.Absolute Maximum Ratings
5.Electrical Characteristics
6.Optical Characteristics
7.Interface Description
8.Contour Drawing & Block Diagram
9. Function Description
10. Instructions
11. Parallel interface
12.Reliability
13.Backlight Information

Information including Drawings, Schematics, Links and Code (Software) Supplied or Referenced in
this Document is supplied by MPJA inc. as a service to our customers and accuracy or usefulness is not
guaranteed nor is it an Endorsement of any particular part, supplier or manufacturer. Use of
information and suitability for any application is at users own discretion and user assumes all risk.
All rights are retained by the respective Owners/Author(s)

MARLIN P. JONES & ASSOC., INC.

P.O. Box 530400 Lake Park, Fl 33403
800-652-6733 FAX 561-844-8764
WWW.MPJA.COM
1.Module Classification Information

 Chip Set: Sitronix ST7920/21

 Display Type: Graphic Type
 Displays Logical Dimensions: 128 pixels by 64 pixels
 Backlight Type: LED, White  LCD Mode: STN Negative, Blue

LCD Polarizer
 Type/ Temperature
range/ View Transmissive, W. T, 6:00
direction

2. Precautions in use of LCD Modules

(1)Avoid applying excessive shocks to the module or making any alterations or modifications to it.
(2)Don’t make extra holes on the printed circuit board, modify its shape or change the components of
LCD module.
(3)Don’t disassemble the LCM.
(4)Don’t operate it above the absolute maximum rating.
(5)Don’t drop, bend or twist LCM.
(6)Soldering: only to the I/O terminals.
(7)Storage: please storage in anti-static electricity container and clean environment.

3.General Specification

Item Dimension Unit

Number of Characters 128 x 64 Dots －
Module dimension 75.0 x 52.7 x 8.9(MAX) mm
View area 60.0 x 32.6 mm
Active area 55.0 x 27.48 mm
Dot size 0.39 x 0.39 mm
Dot pitch 0.43 x 0.43 mm
LCD type STN Negative, Transmissive, Blue
Duty 1/64
View direction 6 o’clock
Backlight Type LED White
4.Absolute Maximum Ratings

Item Symbol Min Typ Max Unit

Operating Temperature TOP -20 － +70 °C
Storage Temperature TST -30 － +80 °C
Input Voltage VI 0 － VDD V
Supply Voltage For Logic VDD 0 － 6.7 V
Supply Voltage For LCD VDD-VSS 0 － 7.0 V

5.Electrical Characteristics

Item Symbol Condition Min Typ Max Unit

Supply Voltage For Logic VDD-VSS － 4. 5 5.0 5.5 V
Supply Voltage For LCD V0 -VSS Ta=-20°C － － 5.15 V
Ta=25°C － 5.14 － V

Ta=+70°C 5.09 － － V
Input High Volt. VIH － 0.7 VDD － VDD V
Input Low Volt. VIL － -0.3 － 0.6 V
Output High Volt. VOH － 0.8 VDD － VDD V
Output Low Volt. VOL － 0 － 0.4 V
Supply Current IDD VDD=5V 1.7 2.0 2.3 mA
* Note: Please design the VOP adjustment circuit on customer's main board
6.Optical Characteristics

Item Symbol Condition Min Typ Max Unit

View Angle (V)θ CR≧2 20 － 40 deg

(H)φ CR≧2 -30 － 30 deg

Contrast Ratio CR － － 3 － －

Response Time T rise － － 200 300 ms

T fall － － 200 300 ms

Definition of Operation Voltage (Vop) Definition of Response Time ( Tr , Tf )

Non-selected Non-selected
Conition Selected Conition Conition
Intensity Selected Wave
100％ Non-selected Wave Intensity

10％
Cr Max
Cr = Lon / Loff 90％
100％

Vop
Driving Voltage(V) Tr Tf

[positive type] [positive type]

Conditions :
Operating Voltage : Vop Viewing Angle(θ，φ) : 0°， 0°
Frame Frequency : 64 HZ Driving Waveform : 1/N duty , 1/a bias
Definition of viewing angle(CR≧2)
θb
θf
φ= 180°
θl
θr

φ= 270° φ= 90°

φ= 0°
7.Interface Description

Pin No. Symbol Level Description

1 VSS 0V Power Supply (GND)
2 VDD 5.0V Power Supply (+5V)
3 VO (Variable) Contrast Adjustment
4 RS H/L Data/ Instruction
5 R/W H/L Data read /write
6 E H Enable signal
7 DB0 H/L Data bus line
8 DB1 H/L Data bus line
9 DB2 H/L Data bus line
10 DB3 H/L Data bus line
11 DB4 H/L Data bus line
12 DB5 H/L Data bus line
13 DB6 H/L Data bus line
14 DB7 H/L Data bus line
15 PSB Parallel/Serial H: Parallel L: Serial
16 NC Not Connected
17 RST Reset signal
18 VOUT Positive Voltage output
19 A － 5VPower Supply for LED ( +)
20 K － Power Supply for LED ( - )
8.Mechnical Drawing &Block Diagram

Optional Contrast Adj.

9.Function Description

function Description：
System interface
ST7920 supports 3 kinds of bus interface to MPU. 8 bits parallel, 4 bits parallel and clock
synchronized serial interface. Parallel interface is selected by PSB="I" and serial interface by
PSB="0". 8 bit / 4 bit interface is selected by function set instruction DL bit.
Two 8 bit registers (data register DR, instruction register IR) are used in ST7920's write and
read operation. Data Register (DR) can access DDRAM/CGRAM/GDRAM and IRAM's data
through the address pointer implemented by Address Counter (AC). Instruction Register (IR)
stores the instruction by MPU to ST7920.
4 modes of read/write operation specified by RS and RW：
RS RW Description
L L MPU write instruction to instruction register (IR)
L H MPU read busy flag (BF) and address counter (AC)
H L MPU write data to data register (DR)
H H MPU read data from data register (DR)
Busy Flag (BF)
Internal operation is in progress when BF="I", ST7920 is in busy state. No new instruction will be
accepted until BF="0". MPU must check BF to determine whether the internal operation is finished and
new instruction can be sent.
Address counter (AC)
Address counter( AC )is used for address pointer of DDRAM/CGRAM/IRAM/GDRAM.
(AC) can be set by instruction and after data read or write to the memories (AC) will
increase or decrease by 1 according to the setting in "entry mode set". When RS="0" and
RW= "1" and E="1" the value of ( AC ) will output to DB6~DB0.
16x16 character generation ROM (CGROM) and 8x16 half height ROM ( HCGROM )
ST7920 provides character generation ROM supporting 8192 16 x 16 character fonts and 126 8 x 16 alphanumeric
characters. It is easy to support multi languages application such as Chinese and English. Two consecutive bytes are used
to specify one 16x16 character or two 8x16 half-height characters. Character codes are written into DDRAM and the
corresponding fonts are mapped from CGROM or HCGROM to the display drivers.
Character generation RAM (CGRAM)
ST7920 provides RAM to support user-defined fonts. Four sets of 16x16 bit map area are available. These user-defined
fonts are displayed the same ways as CGROM fonts through writing character cod data to DDRAM
ICON RAM (IRAM)
ST7920 provides 240 ICON display. It consists of 15 sets of IRAM address. Each IRAM address has 16 bits data IRAM
address should be set first before writing to the IRAM. Two bytes for each address. First higher byte (D15~D8) and then
lower byte (D7~D0).
D is p l ay d at a R A M ( D D R A M )

Th er e ar e 6 4x 2 b yt es fo r di s p la y d a ta RA M a re a. Ca n s to re d is pl a y da t a f or 1 6
ch ar a c te rs (1 6x 16 ) b y 4 li ne s o r 32 c ha ra c t er s ( 8x 16 ) b y 4 l i ne s . H ow e ve r, on l y 2
li n es c an be di s p la ye d a t a ti me . C ha ra c te r c od es s t or ed i n D D R A M po in t t o t he
fo nt s s pe c if i ed b y C G RO M , H CG RO M a nd CG RA M . S T 79 20 d is pl a y ha l f h ei gh t
H C G R O M fo nt s , u s er-d ef i ne d CG RA M f on ts a nd fu ll 16 x1 6 CG R O M fo nt s . D at a
co de s 00 00 H ~ 00 06H a re fo r CG R A M us e r- de fi n ed fo nt s . D a t a c od es 0 2H ~ 7F H a re
fo r ha lf he ig h t a lp h a n u mer i c f on ts . D a ta co de s (A 14 0- -~D 75F ) ar e f or B IG 5 co de
an d (A 1A 0 ~ F 7F F ) ar e f or G B c od e.
1. d is pl a y H CG RO M f on ts : Wr i t e 2 b yt e s d at a to D D RA M t o di s p l a y tw o 8x 16
f on ts . Ea c h b yt e r ep re s e nt s 1 c ha ra c t er fo nt . Th e d a ta of e a ch b yt e is
0 2H ~ 7F H .
2. d is pl a y CG RA M fo nt s : Wr i te 2 b yt e s d at a t o D D RA M to di s p la y o ne 16 x1 6
f on t. O nl y 0 00 0H , 0 00 2H , 0 00 4H , 00 06H a re al l ow ed .
3 . di s p la y C G RO M f on ts : Wri t e 2 b yt es da ta to D D RA M t o d is pl a y on e 1 6x 16
f on t. A 1 40H ~D 7 5F H a re fo r (B IG 5) c od e, A 1A 0H ~ F 7F F H ar e f or (G B) c od e.
H i gh er b yt e ( D 15 -- , D 8 ) ar e w ri t te n f ir s t an d th e n l ow er b yt e ( D 7~ D O ) . R ef er to
Ta bl e 5 fo r ad dr es s ma p

C G R A M fo nt s an d CG RO M f on ts c an on l y b e d is pl a ye d in th e s ta rt po s i t io n o f ea ch
ad dr es s . ( R e fe r t o Ta bl e 4)
8 0 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8 F
H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L H L
S I t r o n I x S T 7 9 2 0
矽 創 電 子 ‧ 中 文 編 碼 ( 正 確 )
矽 創 電 子 中 文 編 碼

Table 4

Incorrect position
Graphic RAM (GDRAM)
Graphic display RAM supports 64x256 bits bit-mapped memory space. GDRAM address is set by writing
2 consecutive bytes for vertical address and horizontal address. Two-bytes data write to GDRAM for one
address. Address counter will automatically increase by one for the next two-byte data. The procedure is
as followings.
1. Set vertical address (Y) for GDRAM

2. Set horizontal address (X) for GDRAM

3. Write D 15~ D8 to GDRAM (first byte)
4. Write D7~D0 to GDRAM (second byte)
Graphic display memory map please refer to Table-8

LCD driver
LCD driver have 33 common and 64 segments to drive the LCD panel. Segment data from CGRAM
/CGROM/HCGROM are shifted into the 64 bits segment latches to display. Extended segment driver
ST7921 can be used to extend the segment drivers to 256.
Table 5：DDRAM data（character code），CGRAM data / address map
Note
1. DDRAM data (character code) bit1 and bit2 are the same as CGRAM address bit4 and bit5.
2. CGRAM address bit0 to bit3 specify total 16 rows. Row16 is for cursor display. The data in row 16
will be logical OR to the cursor.
3. CGRAM data for each address is 16 bits.
4. DDRAM data to select CGRAM bit4 to bit15 must be “0”. Bit0 and bit3 value are “don’t care”.
ICON RAM address ICON RAM data
Set SR ”0”,and then
set IRAM address
AC3…AC0
Higher byte Lower byte
AC3 AC2 AC1 AC D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0
0 0 0 0 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15
SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31
0 0 0 1
0 0 1 0 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47

0 0 1 1 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63

0 1 0 0 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79

SEG80 SEG81 SEG82 SEG83 SEG84 SEG85 SEG86 SEG87 SEG88 SEG89 SEG90 SEG91 SEG92 SEG93 SEG94 SEG95
0 1 0 1
SEG96 SEG97 SEG98 SEG99 SEG100 SEG101 SEG102 SEG103 SEG104 SEG105 SEG106 SEG107 SEG108 SEG109 SEG110 SEG111
0 1 1 0
SEG112 SEG113 SEG114 SEG115 SEG116 SEG117 SEG118 SEG119 SEG120 SEG121 SEG122 SEG123 SEG124 SEG125 SEG126 SEG127
0 1 1 1
SEG128 SEG129 SEG130 SEG131 SEG132 SEG133 SEG134 SEG135 SEG136 SEG137 SEG138 SEG139 SEG140 SEG141 SEG142 SEG143
1 0 0 0
1 0 0 1 SEG144 SEG145 SEG146 SEG147 SEG148 SEG149 SEG150 SEG151 SEG152 SEG153 SEG154 SEG155 SEG156 SEG157 SEG158 SEG159

1 0 1 0 SEG160 SEG161 SEG162 SEG163 SEG164 SEG165 SEG166 SEG167 SEG168 SEG169 SEG170 SEG171 SEG172 SEG173 SEG174 SEG175

1 0 1 1 SEG176 SEG177 SEG178 SEG179 SEG180 SEG181 SEG182 SEG183 SEG184 SEG185 SEG186 SEG187 SEG188 SEG189 SEG190 SEG191

SEG192 SEG193 SEG194 SEG195 SEG196 SEG197 SEG198 SEG199 SEG200 SEG201 SEG202 SEG203 SEG204 SEG205 SEG206 SEG207
1 1 0 0
SEG208 SEG209 SEG210 SEG211 SEG212 SEG213 SEG214 SEG215 SEG216 SEG217 SEG218 SEG219 SEG220 SEG221 SEG222 SEG223
1 1 0 1
SEG224 SEG225 SEG226 SEG227 SEG228 SEG229 SEG230 SEG231 SEG232 SEG233 SEG234 SEG235 SEG236 SEG237 SEG238 SEG239
1 1 1 0
1 1 1 1 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---

Table 6 ICON RAM address,data and segment pins

Table 6 16x8 half-height characters

10.Instructions
Instructions
ST7920 offers basic instruction set and extended instruction set:
Ins code Description Exec time
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (540KHZ)

CLEAR 0 0 0 0 0 0 0 0 0 1 Fill DDRAM with “20H”, and set 1.6 ms

DDRAM address counter (AC) to
“00H”
HOME 0 0 0 0 0 0 0 0 1 X Set DDRAM address counter (AC) 72 us
to “00H”, and put cursor to origin; to
content of DDRAM are not changed.
ENTRY 0 0 0 0 0 0 0 1 I/D S Set cursor position and shift when 72 us
doing write or read operation.
MODE
DISPLAY 0 0 0 0 0 0 1 D C B D=1：display ON 72 us
ON/OFF C=1：cursor ON
B=1：blink ON
CURSOR 0 0 0 0 0 1 S/C R/L X X Cursor position and display shift 72 us
control； the content of DDRAM
DISPLAY are not changed.
CONTROL
FUNCTION 0 0 0 0 1 DL X 0 X X DL=1 8-BIT interface 72 us
RE DL=0 4-BIT interface
SET
RE=1：extended instruction
RE=0：basic instruction
SET 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address to address 72 us
counter (AC)
CGRAM
Make sure that in extended
ADDR.
instruction SR=0 (scroll or RAM
address select)
SET 0 0 1 0 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address to address 72 us
AC6 counter(AC)
DDRAM
AC6 is fixed to 0
ADDR.
READ 0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 Read busy flag (BF) for completion 0 us
of internal operation, also
BUSY
Read out the value of address
FLAG(BF)
counter(AC)
& ADDR.
WRITE 1 0 D7 D6 D5 D4 D3 D2 D1 D0 Write data to internal RAM 72 us
RAM (DDRAM/CGRAM/IRAM/GDRAM
)
READ 1 1 D7 D6 D5 D4 D3 D2 D1 D0 Read data from internal RAM 72 us
RAM (DDRAM/CGRAM/IRAM/GDRAM
)
Instruction set 2：(RE=1： extended instruction)
Ins code Description Exec time
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (540KHZ)

STAND BY 0 0 0 0 0 0 0 0 0 1 Enter stand by mode, any other 72 us

instruction can terminate
(Com1..32 halted, only Com33 ICON
can display)
SCROLL or 0 0 0 0 0 0 0 0 1 SR SR=1：enable vertical scroll position 72 us
RAM SR=0：enable IRAM address
ADDR.
SELECT (extended instruction)
SR=0：enable CGRAM address
(basic instruction)
REVERSE 0 0 0 0 0 0 0 1 R1 R0 Select 1 out of 4 line (in DDRAM) 72 us
and decide whether to reverse the
display by toggling this instruction.
R1, R0 initial value is 00
SLEEP 0 0 0 0 0 0 1 SL X X SL=1： leave sleep mode 72 us
SL=0： enter sleep mode
EXTENDED 0 0 0 0 1 DL X 1 G 0 DL=1 8-BIT interface 72 us
FUNCTION RE DL=0 4-BIT interface
SET
RE=1：extended instruction
RE=0：basic instruction
G=1： graphic display ON
G=0： graphic display OFF
SET IRAM 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 SR=1： AC5~AC0 the address of 72 us
or SCROLL vertical scroll
ADDR SR=0：AC3~AC0 the address of
ICON RAM
SET 0 0 1 0 0 0 AC3 AC2 AC1 AC0 Set CGRAM address to address 72 us
GRAPHIC AC6 AC5 AC4 AC3 AC2 AC1 AC0 counter (AC)
First set vertical address and the
RAM
horizontal address by consecutive
ADDR.
writing.
Vertical address range AC6..AC0
Horizontal address range AC3..AC0
Note：
1. Make sure that ST7920 is not in busy state by reading the busy flag before sending instruction or data.
If use delay loop instead please make sure the delay time is enough. Please refer to the instruction
execution time.
2. “RE” is the selection bit of basic and extended instruction set. Each time when altering the value of RE
it will remain. There is no need to set RE every time when using the same group of instruction set.
Initial setting(Register flag) (RE=0: basic instruction)
Ins code Description
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
ENTRY 0 0 0 0 0 0 0 1 I/D S Cursor move to right, DDRAM address counter (AC) plus 1
MODE SET
1 0

DISPLAY 0 0 0 0 0 0 1 D C B Display, cursor and blink ALL OFF

STATUS
0 0 0

CURSOR 0 0 0 0 0 1 S/C R/L X X No cursor or display shift operation

DISPLAY
X X
SHIFT

FUNCTION 0 0 0 0 1 DL X 0 X X 8 BIT MPU interface, basic instruction set

SET RE

1 0

Initial setting(Register flag) (RE=1：extended instruction set)

Ins code Description
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
SCROLL 0 0 0 0 0 0 0 1 1 SR Allow IRAM address or set CGRAM address
OR RAM
ADDR. 0
SELECT

REVERSE 0 0 0 0 0 0 0 1 R1 R0 Begin with normal and toggle to reverse

0 0

SLEEP 0 0 0 0 0 0 1 SL X X Not in sleep mode

EXTENDED 0 0 0 0 1 DL X 0 G X Graphic display OFF

FUNCTION RE
SET
0

Description of basic instruction set

● CLEAR
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code
0 0 0 0 0 0 0 0 0 1
Fill DDRAM with
"20H"(space code). And set DDRAM address counter （AC to"00H". Set entry mode I/D bit to be "1".
Cursor moves right and AC adds 1 after write or read operation.
● HOME
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code 0 0 0 0 0 0 0 0 1 X
Set DDRAM address counter AC to "00H". Cursor moves to origin. Then content of DDRAM is not
changed.
● ENTRY MODE SET
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code 0 0 0 0 0 0 0 1 I/D S
Set the cursor movement and display shift direction when doing write or read operation.
I/D :address counter increase / decrease
When I/D = "1", cursor moves right, DRAM address counter AC add by 1.
When I/D = "0", cursor moves left, DRAM address counter AC subtract by 1.
S: Display shift
S I/D DESCRIPTION
H H Entire display shift left by 1
H L Entire display shift right by 1
● DISPLAY STATUS
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code 0 0 0 0 0 0 1 D C B

Controls display, cursor and blink ON/OFF.

D : Display ON/OFF control bit
When D = "1", display ON
When D = "0",display OFF , the content of DDRAM is not changed
C : Cursor ON/OFF control bit
When C = "1", cursor ON.
When C = "0", cursor OFF.
B : Blink ON/OFF control bit
When B = "1", cursor position blink ON. Then display data in cursor position will blink.
When B = "0", cursor position blink OFF
● CURSOR AND DISPLAY SHIFT CONTROL
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code 0 0 0 0 0 1 S/C R/L X X

Instruction to move the cursor or shift the entire display. The content of DDRAM is not changed.
S/C R/L Description AC Value
L L Cursor moves left by 1 AC=AC-1
L H Cursor moves right by 1 AC=AC+1
H L Display shift left by 1, cursor also follows to shift. AC=AC
H H Display shift right by 1, cursor also follows to shift. AC=AC

● FUNCTION SET
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code
DL : 4/8 BIT 0 0 0 0 1 DL X RE X X
interface control bit
When DL = "1", 8 BIT MPU bus interface
When DL = "0", 4 BIT MPU bus interface
RE : extended instruction set control bit
When RE = "1", extended instruction set
When RE = "0", basic instruction set
In same instruction cannot alter DL and RE at once. Make sure that change DL first then RE.

● SET CGRAM ADDRESS

RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0
Set CGRAM address to address counter AC
AC range is 00H..3FH
Make sure that in extended instruction SR=0 (scroll address or RAM address select)
● SET DDRAM ADDRESS
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0

Set DDRAM address to address counter (AC) .

First line AC range is 80H..8FH
Second line AC range is 90H..9FH
Third line AC range is A0H..AFH
Fourth line AC range is B0H..BFH
Please note that only 2 lines can be display at a time.

● READ BUSY FLAG (BF) AND ADDRESS

RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

code
0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0

Read busy flag BF can check whether internal operation is finished. At the same time the value of
address counter (AC) is also read. When BF = “1” new instruction will not be accepted. Must wait for
BF = “0” for new instruction.

● WRITE DATA TO RAM

RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code 1 0 D7 D6 D5 D4 D3 D2 D1 D0

Write data to internal RAM and alter the (AC) by 1

Each RAM address (CGRAM,DDRAM,IRAM…..) must write 2 consecutive bytes for 16 bit data.
After the second byte the address counter will add or subtract by 1 according to the entry mode set
control bit.

● READ RAM DATA

RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code
1 1 D7 D6 D5 D4 D3 D2 D1 D0
Read data
from internal RAM and alter the (AC) by 1
After address set to read (CGRAM,DDRAM,IRAM…..)a DUMMY READ is required.
There is no need to DUMMY READ for the following bytes unless a new address set instruction is
issued.
Description of extended instruction set
● STAND BY
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code 0 0 0 0 0 0 0 0 0 1

Instruction to enter stand by mode. Any other instruction follows this instruction can terminate stand
by.
The content of DDRAM remain the same.

● VERTICAL SCROLL OR RAM ADDRESS SELECT

RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code
0 0 0 0 0 0 0 0 1 SR
When SR =
"1", the vertical scroll address set is enabled.
When SR = "0", the IRAM address set (extended instruction) and CGRAM address set(basic
instruction) is enabled.
● REVERSE
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code 0 0 0 0 0 0 0 1 R1 R0
Select 1 out of 4 lines to reverse the display and to toggle the reverse condition by repeating this
instruction.
R1,R0 initial vale is 00. When set the first time the display is reversed and set the second time the
display become normal.

R1 R0 Description
L L First line normal or reverse
L H Second line normal or reverse
H L Third line normal or reverse
H H Fourth line normal or reverse
Please note that only 2 lines out of 4 line display data can be displayed.
● SLEEP
RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code 0 0 0 0 0 0 1 SL 0 0

SL=1: leave sleep mode

SL=0: enter sleep mode
● EXTENED FUNCTION SET

RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

code 0 0 0 0 1 DL X RE G X

DL : 4/8 BIT interface control bit

When DL = "1", 8 BIT MPU interface
When DL = "0", 4 BIT MPU interface
RE : extended instruction set control bit
When RE = "1", extended instruction set
When RE = "0", basic instruction set
G : Graphic display control bit
When G = "1", graphic display ON
When G = "0", Graphic display OFF

In same instruction cannot alter DL, RE and G at once. Make sure that change DL or G first and
then RE.

● SET IRAM OR SCROLL ADDRESS

RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

code 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0

SR=1: AC5~AC0 is vertical scroll displacement address

SR=0: AC3~AC0 is ICON RAM address

● SET GRAPHIC RAM ADDRESS

RS RW DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
code
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0
Set GDRAM address to address counter AC .
First set vertical address and then horizontal address(write 2 consecutive bytes to complete vertical
and horizontal address set)
Vertical address range is AC6...AC0
Horizontal address range is AC3…AC0
The address counter AC of graphic RAM(GRAM) only increment after write for horizontal address.
After horizontal address=0FH it will automatically back to 00H. However, the vertical address will
not increase as the result of the same action.
11.Parallel interface

ST7920 is in parallel mode by pulling up PSB pin. And can select 8 bit or 4-bit bus interface by function
set instruction DL control bit. MPU can control ( RS , RW , E , and DB0..DB7 ) pins to complete the data
transmission.

In 4-bit transfer mode, every 8 bits data or instruction is separated into 2 parts. Higher 4 bits DB7~DB4
data will transfer.
First and placed into data pins (DB7~DB4). Lower 4 bits (DB3~DB0) data will transfer second and
placed into data pins (DB7~DB4). (DB3~DB0) data pins are not used.

Timing Diagram of 8-bit Parallel Bus Mode Data Transfer

Timing Diagram of 4-bit Parallel Bus Mode Data Transfer

Serial interface :
ST7920 is in serial interface mode when pull down PSB pin. Two pins (SCLK and SID) are used to
complete the data transfer. Only write data is available.

When connecting several ST7920, chip select (CS) must be used. Only when (CS) is high the serial clock
(SCLK) can be accepted. On the other hand, when chip select (CS) is low ST7920 serial counter and data
will be reset. Transmission will be terminated and data will be cleared. Serial transfer counter is set to the
first bit. For a minimal system with only one ST7920 and one MPU,
only SCLK and SID pins are necessary. CS pin should pull to high.

ST7920’s serial clock SCLK is asynchronous to the internal clock and is generated by MPU. When
multiple instruction/data is transferred instruction execution time must be considered. Must wait for the
previous instruction to finish before sending the next. ST7920 has no internal instruction buffer area.

When starting a transmission a start byte is required. It consists of 5 consecutive ”1”(sync character).
Serial transfer counter will be reset and synchronized. Following 2 bits for read/write (RW) and
register/data select (RS). Last 4 bits is filled by “0”

After receiving the sync character and RW and RS bits, every 8 bits instruction/data will be separated into
2 groups. Higher 4 bits (DB7~DB4) will be placed in first section followed by 4 “0”. And lower 4 bits
DB3~DB0 will be placed in second section followed by 4 “0”.

Timing Diagram of Serial Mode Data Transfer

8 bit interface：
POWER ON

Wait time > 40 ms

XRESET LOW HIGH

Function set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 1 X 0 X X

Wait time > 100 us

Function set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 1 X 0 X X

Wait time > 37 us

Display ON/OFF control

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 1 D C B

Wait time > 100 us

Display clear
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 0 0 1

Wait time > 10 ms

Entry mode set

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 1 I/D S

Initialization end
4 bit interface：
POWER ON

Wait time > 40 ms

XRESET LOW HIGH

Function set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 0 X X X X

Wait time > 100 us

Function set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 0 X X X X
0 0 X 0 X X X X X X

Wait time > 100 us

Display ON/OFF control

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 1 D C B
0 0 1 D C B X X X X

Wait time > 100 us

Display clear
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 X X X X
0 0 0 0 0 1 X X X X

Wait time > 10 ms

Entry mode set

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 X X X X
0 0 0 1 I/D S X X X X

Initialization end
8 bit interface timing diagram
● MPU write data to ST7920

● MPU read data from ST7920

Serial interface timing diagram

● MPU write data to ST7920
Absolute Maximum Ratings
Characteristics Symbol Value
Power Supply Voltage VDD -0.3V to +5.5V
LCD Driver Voltage VLCD -0.3V to +7.0V
Input Voltage VIN -0.3V to VDD+0.3V
Operating Temperature TA -20°C to +85°C
Storage Temperature TSTO -55°C to +125°C

DC Characteristics ( TA=25°C, VDD=2.7V – 4.5V )

Symbol Characteristics Test Condition Min. Typ. Max. Unit
VDD Operating Voltage ─ 2.7 ─ 5.5 V
VLCD LCD Voltage V0 – Vss 3.0 ─ 7 V
Icc Power Supply Current fOSC = 530KHz, VDD = 3.0V ─ 0.20 0.45 mA
Rf = 18 kΩ
VIH1 Input High Voltage ─ 0.7 VDD ─ VDD V
(Except OSC1)
VIL1 Input Low Voltage ─ -0.3 ─ 0.6 V
(Except OSC1)
VIH2 Input High Voltage ─ VDD-1 ─ VDD V
(OSC1)
VIL2 Input Low Voltage ─ ─ ─ 1.0 V
(OSC1)
VOH1 Output High Voltage IOH = -0.1 mA 0.8VDD ─ VDD V
(DB0 – DB7)
VOL1 Output Low Voltage IOL = 0.1 mA ─ ─ 0.1 V
(DB0 – DB7)
VOH2 Output High Voltage IOH = -0.04 mA 0.8 VDD ─ VDD V
(Except DB0 – DB7)
VOL2 Output Low Voltage IOL = 0.04 mA ─ ─ 0.1 V
(Except DB0 – DB7) VDD
ILEAK Input Leakage Current VIN = 0V TO VDD -1 ─ 1 μa
IPUP Pull Up MOS Current VDD = 3V 22 27 32 μA
DC Characteristics (TA = 25°C, VDD = 4.5 V – 5 V)
Symbol Characteristics Test Condition Min. Typ. Max. Unit
VDD Operating Voltage ─ 4.5 ─ 5.5 V
VLCD LCD Voltage V0 – Vss 3.0 ─ 7 V
Icc Power Supply Current fOSC = 540KHz, VDD = 5 V ─ 0.45 0.75 mA
Rf = 33kΩ
VIH1 Input High Voltage ─ 0.7 VDD ─ VDD V
(Except OSC1)
VIL1 Input Low Voltage ─ -0.3 ─ 0.6 V
(Except OSC1)
VIH2 Input High Voltage ─ VDD-1 ─ VDD V
(OSC1)
VIL2 Input Low Voltage ─ ─ ─ 1.0 V
(OSC1)
VOH1 Output High Voltage IOH = -0.1 mA 0.8VDD ─ VDD V
(DB0 – DB7)
VOL1 Output Low Voltage IOL = 0.1 mA ─ ─ 0.4 V
(DB0 – DB7)
VOH2 Output High Voltage IOH = -0.04 mA 0.8 VDD ─ VDD V
(Except DB0 – DB7)
VOL2 Output Low Voltage IOL = 0.04 mA ─ ─ 0.1 V
(Except DB0 – DB7) VDD
ILEAK Input Leakage Current VIN = 0V TO VDD -1 ─ 1 μA
IPUP Pull Up MOS Current VDD = 5 V 75 80 85 μA
AC Characteristics ( TA = 25°C, VDD = 4.5V ) Parallel Mode Interface
Symbol Characteristics Test Condition Min. Typ. Max. Unit
Internal Clock Operation
fOSC LCD Voltage V0 – Vss 3.0 ─ 7 V
fEX Power Supply Current fOSC = 540KHz, VDD = 5 V ─ 0.45 0.75 mA
Rf = 33kΩ
VIH1 Input High Voltage ─ 0.7 VDD ─ VDD V
(Except OSC1)
VIL1 Input Low Voltage ─ -0.3 ─ 0.6 V
(Except OSC1)
VIH2 Input High Voltage ─ VDD-1 ─ VDD V
(OSC1)
VIL2 Input Low Voltage ─ ─ ─ 1.0 V
(OSC1)
VOH1 Output High Voltage IOH = -0.1 mA 0.8VDD ─ VDD V
(DB0 – DB7)
VOL1 Output Low Voltage IOL = 0.1 mA ─ ─ 0.4 V
(DB0 – DB7)
VOH2 Output High Voltage IOH = -0.04 mA 0.8 VDD ─ VDD V
(Except DB0 – DB7)
VOL2 Output Low Voltage IOL = 0.04 mA ─ ─ 0.1 V
(Except DB0 – DB7) VDD
ILEAK Input Leakage Current VIN = 0V TO VDD -1 ─ 1 μA
IPUP Pull Up MOS Current VDD = 5 V 75 80 85 μA
AC Characteristics ( TA = 25°C, VDD = 4.5V ) Parallel Mode Interface
Symbol Characteristics Test Condition Min. Typ. Max. Unit
Internal Clock Operation
fOSC OSC Frequency R=33kΩ 480 540 600 KHz
External Clock Operation
fEX External Frequency ─ 480 540 600 KHz
Duty Cycle ─ 45 50 55 %
TR,TF Rise/Fall Time ─ ─ ─ 0.2 μS
Write Mode (Writing data from MPU to ST7920)
Tc Enable Cycle Time Pin E 1200 ─ ─ nS
TPW Enable Pulse Width Pin E 140 ─ ─ nS
TR,TF Enable Rise/Fall Time Pin E ─ ─ 25 nS
TAS Address Setup Time Pins : RS,RW,E 10 ─ ─ nS`
TAH Address Hold Time Pins : RS,RW,E 20 ─ ─ nS
TDSW Data Setup Time Pins : DB0-DB7 40 ─ ─ nS
TH Data Hold Time Pins : DB0-DB7 20 nS
Read Mode (Reading Data from ST7920 to MPU)
Tc Enable Cycle Time Pin : E 1200 ─ ─ nS
TPW Enable Pulse Width Pin : E 140 ─ ─ nS
TR,TF Enable Rise/Fall Time Pin : E ─ ─ 25 nS
TAS Address Setup Time Pins : RS,RW,E 10 ─ ─ nS
TAH Address Hold Time Pins : RS,RW,E 20 ─ ─ nS
TDDR Data Delay Time Pins : DB0-DB7 ─ ─ 100 nS
TH Data Hold Time Pins : DB0-DB7 20 ─ ─ nS
Interface Mode with LCD Driver (ST7921)
TCWH Clock Pulse with High Pins : CL1, CL2 800 ─ ─ nS
TCWL Clock Pulse With Low Pins : CL1, CL2 800 ─ ─ nS
TCST Clock Setup time Pins : CL1, CL2 500 ─ ─ nS
TSU Data Setup Time Pin : D 300 ─ ─ nS
TDM Data Hold Time Pin : D 300 ─ ─ nS
TPW Enable Pulse Width Pin : M -1000 ─ 1000 nS
AC Characteristics ( TA = 25°C, VDD = 2.7V ) Parallel Mode Interface
Symbol Characteristics Test Condition Min. Typ. Max. Unit
Internal Clock Operation
fOSC OSC Frequency R=18kΩ 470 530 590 KHz
External Clock Operation
fEX External Frequency ─ 470 530 590 KHz
Duty Cycle ─ 45 50 55 %
TR,TF Rise/Fall Time ─ ─ ─ 0.2 μS
Write Mode (Writing data from MPU to ST7920)
Tc Enable Cycle Time Pin E 1800 ─ ─ nS
TPW Enable Pulse Width Pin E 160 ─ ─ nS
TR,TF Enable Rise/Fall Time Pin E ─ ─ 25 nS
TAS Address Setup Time Pins : RS,RW,E 10 ─ ─ nS`
TAH Address Hold Time Pins : RS,RW,E 20 ─ ─ nS
TDSW Data Setup Time Pins : DB0-DB7 40 ─ ─ nS
TH Data Hold Time Pins : DB0-DB7 20 nS
Read Mode (Reading Data from ST7920 to MPU)
Tc Enable Cycle Time Pin : E 1800 ─ ─ nS
TPW Enable Pulse Width Pin : E 320 ─ ─ nS
TR,TF Enable Rise/Fall Time Pin : E ─ ─ 25 nS
TAS Address Setup Time Pins : RS,RW,E 10 ─ ─ nS
TAH Address Hold Time Pins : RS,RW,E 20 ─ ─ nS
TDDR Data Delay Time Pins : DB0-DB7 ─ ─ 260 nS
TH Data Hold Time Pins : DB0-DB7 20 ─ ─ nS
Interface Mode with LCD Driver (ST7921)
TCWH Clock Pulse with High Pins : CL1, CL2 800 ─ ─ nS
TCWL Clock Pulse With Low Pins : CL1, CL2 800 ─ ─ nS
TCST Clock Setup time Pins : CL1, CL2 500 ─ ─ nS
TSU Data Setup Time Pin : D 300 ─ ─ nS
TDM Data Hold Time Pin : D 300 ─ ─ nS
TPW Enable Pulse Width Pin : M -1000 ─ 1000 nS
12.Reliability
Content of Reliability Test (wide temperature, -20°C70°C

Environmental Test
Test Item Content of Test Test Condition Note
High Temperature Endurance test applying the high storage 80°C 2
storage temperature for a long time. 200hrs
Low Temperature Endurance test applying the high storage -30°C 1,2
storage temperature for a long time. 200hrs
High Temperature Endurance test applying the electric stress 70°C ——
Operation (Voltage & Current) and the thermal stress to the 200hrs
element for a long time.
Low Temperature Endurance test applying the electric stress under -20°C 1
Operation low temperature for a long time. 200hrs
High Temperature/ The module should be allowed to stand at 60°C, 90%RH 1,2
Humidity Operation 60°C90%RH max for 96hrs under no-load 96hrs
condition excluding the polarizer, Then taking it
out and drying it at normal temperature.
Thermal shock The sample should be allowed stand the -20°C to 70°C ——
resistance following 10 cycles of 10 cycles
operation
-20°C 25°C 70°C

30min 5min 30min

1 cycle

Vibration test Endurance test applying the vibration during Total fixed amplitude : 3
transportation and using. 1.5mm
Vibration Frequency :
10~55Hz
One cycle 60 seconds
to 3 directions of
X,Y,Z for Each 15
minutes
Static electricity test Endurance test applying the electric stress to the VS=800V, RS=1.5kΩ ——
terminal. CS=100pF
1 time

Note1: No dew condensation to be observed.

Note2: The function test shall be conducted after 4 hours storage at the normal
Temperature and humidity after remove from the test chamber.
Note3: Vibration test will be conducted to the product itself without putting it in a container.
13.Backlight Information

Specification

PARAMETER SYMBOL MIN TYP MAX UNIT TEST CONDITION

Supply Current ILED 48 60 90 mA V=5V

Supply Voltage V 4.9 5.0 5.1 V －
Reverse Voltage VR － 5 － V －
Luminous IV 150 190 － cd/m2 ILED=60mA
Intensity
Life Time － － 25K － Hr. ILED≤60mA
Color White

PARAMETER SYMBOL

Note: The LED of B/L is drive by current only, drive voltage is for reference only.
drive voltage can make driving current under safety area (current between
minimum and maximum).