COMPUTER HARDWARE (PAPER-II)MICROPROCESSOR AND ORGANISATION OF 8085 [ON igital computers were large expensive machines, now size and gamachines has been changed in past few years due to this new device gor’ also named as up (mu-p)- The microprocessor is an IC that the processing capabilites of a computer i is small but extremely that is programmable. There are many ‘companies which are is microprocessor chips with different technologies and with E jeneth, Most popular companies in the manufacturing of up are ROLA, Zilog, Toshiba. This chapter describes general features of @ d detail study of a very popular fevolution of microprocessor an ‘rao intel 8085-A as a basic programmable model of microprocessor. (ON OF MICROPROCESSOR ions of microprocessors: than fifteen years we have seen five gener? 2000 AD a number of microprocessor in We willl exceed the sje on earth. ‘The microprocessor is @ twenty-year-old child of the it and digital computer. tion:(4-bit Microprocessor) sor introduced in the market Was INTEL 4004, a 4-bit st Faggin, ‘This wp was in fact in 1971 by designed by scienti Mealeulajors.~ It was not powerful ‘and was inadequate for INTEL, introducel the 8008, the first general purpose 8-bit UP with t of ISI technology with 45 jasiructions, Intel introduced its 8080, Simultancously, Intel's competitors, inspired by the early design new jips. MOTOROLA introduced the 6800. 1 Gener + (B:bit Microprocessor) ation: (AO ere introduced the 280, 8085 14 the 8080 and-6800 w In 1976, 8085 was introduced. These12 ADVANCEME NT OF MICROPROCESSOR General Information {Generation ‘Year First 1971 Similar to 4040 First 8-bit oC perform arithmetic E 0 operations. Enhanced version of @ Second | 1974 Showed developed in LSI 16800 (Motorola) ‘Second generation which we use commonly. 7976 ips developed in a di to a complete microcomp with CPU, Clock, I/O port) ina single IC package. 1977 12 bit ps developed ai enhancement in 8 bit ups, Third 1978 to 12 bit pps were followed 1980 46 bit ips. It showed a fd ‘of progress of pps to the CPU which has ‘capability to work with wor bits, bytes. Posi | ites 32 Latest advancement in 1p Hewlett Packard's 32 ; HPS2 32. 32 Fifth 1993 4 64 64 After 1996 Dual core facility.ted a flow 5 towards has a ith words at in ups. | address | of 4 Giga Bes (386. eA currently 32 bit ped of 4 rk with words, bytes, stri 0 cond In 1978 INTEL introduced its Ravenal and other teleatay SAH Scientist. This third generation VO ports grew from 256 each in the Hon: (32-bit Microprocessor) has introduced a first 37 ‘sical icroprocessor. The 80386, memory of 4 Gbytes (4 X 230G bytes). Other 32-bit up ition: (64-bit Microprocessor) a drastic improvement in microprocessor design to provide greatest system on new OS like UNIX. The processor in this generation mame Pentium, may be called as 80586 followed by Pentiumil, in twentieth century, Intel has developed so many processors with § like low voltage operating capability, processors handling mobile with Celeron, Xenon,i3,i7 dual core processors. Intel also [processors with greater speed and additional features. COMPUTER ORGANISATION =m always contains five main blocks as (i) Input Device (i) & Unit with Arithmetic unit and control unit combined, in it (iv) memory unit and (v) output device. brief how computer operates a given program.Microprocessor 893; ith block diagram, i isati a computer with bI LA i typical organisation 0° 4° ie or i es stored in a memory either for aoe ey on oy inaruciond are stored in a memory a as eM) Bete: toca, ) ets orn tex pat of BEMIS fog to ead the St ner fron of instructions into - memory, com cf Haeipork with the memory an gram ing to the instruction it performs the or trol and eal adding of two numbers, jumping to other me; of cont . 1 E after ming desired operation Tes oe oe nce between microprocesso! sult is transferred to the output devi ees ¢ and microcomputer is we heat ae small size computer while microprocessor is one of the blog rr ey microcomputer system, in ‘other way we cam say microprocessor ig CPU mak the microcomputer system which actually is the heart of the syst Microprocessor with memory, it and clock form a microcomputer. input, output 1.3 GENERIC MICROPROCESSOR Generic. Microprocessor gives an idea of simple & microprocessor; it is a general ‘model showing essential blocks in a Microprocess Figyre shows a generic microprocessor ‘with internal’ blocks connected in a logi strueture to perform arithmetic and logical operations with data and address bus. Jearn 8085; this model of generic microprocessor becomes helpful. A generic microprocessor includes the following blocks and a required st wires or lines called Bus: 1. Arithmetic logic unit (ALU) 2. Registers 3. Instruction decoder 4, Timing and control section. 5. Interrupt Control 6. Three types of bus architecture of a gen Crvelal Power Supply Block Diagram of Generic Microprocessor. Instruction decoder . Interrupt Control Arithmetic logic ‘unit (ALU) tis an 8-bit unit where arithmetic and logical operations are carried out. After peeing the operation it sets the flags according to the nature of resulting Registers Microprocessor makes use of several registers: i 8-bit. -gisters ;some of them are 16-bit and i) Accumulator -8 Bit: Main register used to store Result of arithmetic and logical operation. General purpose registers ii) Register-B - 8 Bit iii)Register-C -8 Bit iv)Register-D - 8 Bit v)Register-E -8 Bit viRegister-H - 8 Bit viiRegister-L -8 Bit viii) Temporary Register -8 Bit ix) Status register: it is as a set of flip-flops called as Flags. Microprocessor has two flags carry and zero flag. ix) Program Counter-16 bit: used to store the address of next memory location. It points or directs to the memory location containing the next instruction to be executed. x) Stack Pointer-16 bit used to store address of a memory called stack. xi) Instruction Register-8bit the first byte of instruction is loaded in this register. AAs its name suggests it takes instruction from Instruction Register and decodes it by driving control section. Timing and control section : : Refer block diagram; as per signal given by instruction decoder it generals appropriate signals to control respective devices in order to execute the instruction. Interrupt is an essential process jn microprocessor it executes certain steps when interrupt occurs. Seen i i I lines called sor shows three different types if parallel Dna ae itis 16-bit bus and unidirecti ional. vege aes ii) Data bus: it is 8- bit but bidirectional carries binary data. i iiiyControl bus: carries signal to execute operation._ Shes a i Microprocessor 8035 MICROCOMPUTER s all five blocks ag 186 : DIAGRAM OF 1 mmputer contain: 15 BLOCK ‘ed in the above topic microco it (iv) Program memory and As explain Ge Input device (ji) Control it) metic circuit r ‘ memory (¥) Output device. Fig. (1.2) shows more detail architecture of Merovomputer in terms of blOCK diagrar ‘with all essential bus and control si lines. POWER ‘SUPPLY. DATA BUS }«—— POWER LINE Fig. (1.2) Block Diagram of a Microcomputer As shown in ! i wus anne Reema architecture of a microcomputer it requires dit bn, star where bs is & sFOHp Of Conducting lines, It shows ty ical I ne eee cote Ri aia naiiec bus ib Vdate Bus" as 0 MPU (Micro Processor Unit) i 'U. Address bus is normally unidirectional from hile aoe essor Unit it sends an address of the required irectional fror APU eee sees) from MPU data ean be tr ae memory on this ip of bus is called as.""control bus”? ae Pe a at ich control si are carried. Control si ‘i 5 ignals are civ the edited ae of ett tel am me mma mntezvd on TS| }— DATA ay | | j—Poven Microprocessor 8085 1 q 1, Input Device (Keyboard) | ‘The instructions prepared for a particular program are entered through this 4 device as shown in the fig.(1.2) through keyboard, At the same time data is entered t with instructions. When instruction and data is entered through keyboard it is not i] possible to feed the instruction directly to MPU because MPU may be busy in performing previous instruction therefore it is stored in a keyboard interface. Another ! reason to connect keyboard input to keyboard interface is the speed of input device and MPU may not be equal. After storing the instruction and data it tells the CPU through a special signal line “interrupt” which interrupts the MPU. After MPU completes the current instruction it stops the normal execution and jumps to a special group of instructions in its monitor program, which gives the response to the Keyboard data, is entered in the keyboard interface. Actually keyboard interface, is a special chip. Keyboard interface is connected to address bus, chip select and control ' lines, because when data is entered it is informed to the MPU through interrupt line | therefore MPU generates the control signals and chip select signal to activate only this keyboard interface. MPU tells it to send the data on the data bus. Then MPU accepts the data and continues its current job. 2, Microprocessor Unit (MPU/CPU) It can be referred as a CPU unit. In this main part of the system like brain of human being; data is processed and required control signals are generated to control the system. Whole processing and data flow is done with the MPU chip. Microprocessor is a controlling unit and fabricated on a very small chip capable of performing three main functions: ; i) Toreceive information in digital form. }) To process this information by means of arithmetic and logical operations. iii) To send the result or information in standard form. 3. ROM (Program Memory) It contains the fixed stored program that is known as monitor program. It has address bus, chip select and read signal lines. ROM is read only memory. It allows aly resting gored informatica. Worwelwnle => Cr mmonent a DPA ae 4. RAM (Data Memory) : if : It is normally used to store data; it is a temporary storage. device. Bi- directional data bus is required because to write and read the data into the memory. RAM has address input lines and chip select, read/write enable lines. RAM is ‘normally 8-bit wide. It allows both read and write hence called read/svrite or Random 5. Output Device (Display) r _ Similar as input device and keyboard interface output displayed through display interface. The stored data in continuously transferred to 7-segment LED disMicropressne’F S085 188 6. Address Decoder Tt samples the data important lines as OC eral of the system also depent is : = MPU,\(ii) Power Lines: a Powe this power supply Hine, ee us see what ig, nected 10 t MS Penta Gl : as shoe al i exeoules the instruction with its org: microp! ? ey OR ae Te HOO at au ge Pi ae Ps Sti sant ral i f applications ideal microprocess ccopur ieee eae i me ace Tae tmioroprocessor 3085 chip has selected tO ‘understand hardware of the common microprocessor and to illustrate the ‘assembly language program. ADDRESS DATA/BUS CONTROL BU EXCLUDING ° ‘SERIAL DATA IN/OUT 10M To Fig. (1.3) Microprocessor 8085 FA FEATURES OF 8085 PAO? 1. The Intel microprocessor 8085 is an 8-bit mic i ah fer fig, (1.3), this indi ies hat Ble ERESear be nared 0 toll 'g. (1-3) this indicates that T byte (8-bid data ean be transferred 0” (h* Pris Bes eo it stable ina 40 pin plastic ceramic (DIP) package. an fi.) he ares si address G4 K bytes. Refer fiz!) % ie divided into two group ‘on eight i ess own 08 mules fo" both data and cl bs s two into one), lexed bus", (multiplexer means ™" e advantage of mult b ea 108. Mplexed bus is no of pins are minimised fro" !°hh Mio f S_of address are transmitted on address. bu ies , wnsmitted on Is MIE the k . Since microprocessor 8085 has 16 bit = (2!°) = 64 Kbytes OW ler locations can be accessed. Each ion i ” ; ee . Each memory location is of 1 byte Witts is In 8085 to select external i n aapped, /O system is used. ee ee n set of 8085 consists of 74 instructions, © and it, ONAL PIN DIAGRAM OF 8085 B idea) ,,.° 4 liagram of 8085 is illustrated by fig. (1.4) and its brief functional Bed yi en in table (1. ie ‘ tied. TOP tO in the pin diagram of 8085 has address/data multiplexed bus hardware an other address bus pins are Ag-Ajs. ' Program, 4 ‘Supply connections are given across pins +Vcc and Vss ground (Gen or 4m ) §S DATABUS DATA IN/OUT vid on ic spit data bY bbe transfer Kage, (14 IP) paeyer fe byte* oft ied OF oss Pye auavadr® and a a me°° gw ID. Microprocessor og, i is known as Active low Pin; it is activated with low sy Note: When Pin name is with Bar it is known as voltage, Remaining pins without Bar activated with high level voltage. [Pin No. [Pin Name |Type [Description fe a as [input Crystal Connections a = RESET OUT [Output [Reset for Peripherals + ISoD ” /Serial data output es 5 SID Hinput ‘Serial data can be input through this pin 6 TRAP Input \Nonmaskable interrupt request 7 RST 7.5 ‘Input Hardware Vectored Interrupt a 8 RST 6.5 Input agers. 19 RST 5.5 [Input eer 10 NTR Input Interrupt i INTA [Output(Active low) [Interrupt acknowledged by 8085 on 12to 19 |Apo— Apr Bi-directional Tristate _ | Address/Data bus 20 [Vss Input ‘Supply ground connection 21 to 28 |A8- AIS (Output Tristate Address bus MSB bits. av 29 [So Output Tristate /Address bus MSB bits I 30 ALE (Output [Address latch enable control 31 WR [Output Tristate Write control(Active low) 32 RD Output Tristate |Read control(Active low) 33 st [Output Tristate VO or memory control 34 HOM: Output Tristate VO or memory selector control 35 IREADY. Input |Wait request 36 RESETIN [Input Activelow) [System RESET active low pin 37 (Clock (Ue) [Output [Clock signal ps LDA Output Hold is acknowledge 5) HOLD input TReguees to bela a Vee (SV) [Input Positive supply connection Table (1.2) 3) X1-X2 - 8085 microprocessor has its own bi i in oscillat ircuit ins it to which externally crystal is connected across lator (Clock) cir s pins X, and X,(OSL 4) RD and WR ~ These are active low pins. A low level RD signal indicates the selected memory/IO is to be read and data bus is available for data transfer. Similarly, a low level WR signal indicates that data on data bus is to be written into the selected memory/I0 location, 5) RESET IN/RESET OUT — Pins are used to make program counter of 8085 reset to 0000H, After program counter is reset by peripheral through RESET IN pin, ‘microprocessor sends signal through output pin RESET OUT that the "program. counter is reset to inform peripheral. 6 Interrupt pins - Microprocessor 8085 has five interrupt-pins through which 8085 is interrupted (Interrupt is explained in later topic). 7) SID/SOD - For serial data transmission SID and SOD pins are used. For this type of transmission RIM and SIM instructions are required. 8) READY - The Pin READY input from peripheral device informs the microprocessor that is peripheral device is ready to receive or to send the data. 9) HOLD/HLDA - HOLD input pin is required during direct memory access (DMA) operation that is HOLD signal informs microprocessor that another device requires to use address and data bus. After receiving the signal HOLD request has been received on the pin HLDA (holds acknowledge). ADDRESSING I/O DEVICES (10/M) When microprocessor is connected with other devices as memory and input- output devices it forms a microcomputer. Sometimes to select particular input device and output device particular address is given as a memory locations for example address 0002 is used to select input device like keyboard and 0003 for output device like printer, Therefore whenever address is given by, microprocessor 0002 or 0003 then there is no other information in these memory locations. In other words when these two addresses are used to select I/O devices then these two addresses are not used for any memory location. This type of /O addressing is known as "Memory ‘mapped 119". But in microprocessor 8085 “1/0 mapped 1/0” method is used for VO devices. For example the address 0002 and 0003 when it appears on address bus then this address may be memory or for /O which depends on the control signal present at pin 1O/M, “ ‘When 10/M = 1 then this address is for /O device and when IO/M = 0 then it is for memory. In microprocessor actually IO/M, Si and So contro! signal decide the type of peration. It is given in table (1.3) Refer table (1.3) when IO/M = 0 then memory is selected either read or write which is decided by So and $; and when IO/M = 1 then /O device is selected to read or write decided by So and S, signal.eg Hold Reset ome 1 ‘Memory write ; 0 Memory read ; i VO write iM 0 1/0 read i 1 OP code fetch | 1 Interrunt acknowledge 4 0 Halt Table (1.3) At us see the difference between memory mapped VO and /O mapped 1/0. a Maiialy nag pe DU! 1/0 mapped VO. 1) WO is assigned to the separate address | 1) W/O is assigned with same ad space of memory. memory. 2) Separate control signal is not required. | 3) Itis required like IO/M. 3) Memory space is reduced due to | 4) Full memory space can be used, insertion of /O address. 4) It requires 16-bit address bus. 5) It uses 8-bit address bus only. 18 INTERNAL BLOCK DIAGRAM OF 8085 Internal block diagram many times is referred ie 4 of 8085. It is shown by fig. (1.5) as organisation or archi Figure (1.5) shows following main blocks as: Three types of bus Registers Arithmetic logic unit (ALU) Flags Program Counter Stack Pointer Inerementer/D ter ‘iming and control Secti ‘et us see the significance ofeach block jn 8085 Three Bus Structure efer fig. (1.5) there are ty i, % ¢ wo 1/0 bus as 8-bi ‘i Riatoned earlier An ~ Aoy bu fg aeatins ee Stas oe c diteret sigan Oe cael “multiplexed bus. Control ae el generated by control secti Gifferent blocks like WR, includes INTR. INA wer oe: 5), the topside goes # cOnteol bus, Ika " INTA, RST'5.5, RST 65, RET come. P. The second on 8 : . . The second one is 1.al communication SID/SOD. The third control bus is the main control bus. It sd aa ‘gnals which are applied internally and externally to execute an instruction. e sf Roti ees enna] [enxwoomal {IT INTERNAL OATA BUS. Bale nee | ee Ole 0) nee | es eft nsravorion| [nes. Res ‘DECODER STACK PONTER ti) PROGRAW lcousren 19] fanrrumari] Toaie UNIT aw Pincribecr | | ADD-LATCH TAGDRESS BUFFER|| DATHADDRESS B-bit address b le BPRRGANn Conner [ ‘|| Burren MAIN CONTROL BUS Aes AD, AD. F 8085 pooness _ADDRESSIXTA eu5 38. 4 as organisation Fig. (1.5) Internal Block Diagram of 8085 2 Registers Refer fig (1.5), there are different registers used for different purposes a A) 8-Bit General Purpose Registers i) Accumulator * SBit ii) Register-B ey is Bit iii) Register-C - Bit iv) _ Register-D “i 8 Bit vy) Register-E - 8Bit vi) Register-H SP ait i ii) Register-L = SBit viii) ‘Temporary Register - 8 Bit ix) Flag/Status Register - Bitre E L ace. | [rem Res. conan SP PC INC/DEC. Fig. (1.6) Different Registers 16-Bit Special Registers ; i) ProgramCounter = - —«16 Bit ii) Stack pointer - 16 Bit iii) Incrementer-Decrementer - 16 Bit Here register B,C, D, E, H and L can be used as 16-bit registers in p register pair B-C, register pair D-E register pair H-L. Remember 16-bit register cannot be formed like B-E or D-L. i) Accumulator: It main register in 8085 microprocessor; it is use performing arithmetical and logical operations like addition, subtraction, EX-OR operations. One of the operand is stored in accumulator. It can be both source and destiniation register. The final result of these operations is a in this accumulator. Accumulator also used for /O operations. ii) General purpose registers: There are six 8-bit registers which can be used. bit registers in pairs as B-C, D-E and H-L pair. The higher MSB 8.-bits are stor first register of the pair as B,D,H and lower LSB 8-bits are stored im register of C-E,L. Suppose a number 24CSH is to be stored in D-E registem then 24 number will be stored in register D and number C5 will be register E. program counter, stack below.umulator, It cabal of these oper hese operat ters which can tex 1 MSB 8-bis # SB 8-bits n DE Re be stored in L 7 + C5 will Z : 195 » a 3, ARITHMETICLOGIC uniT (ALU) tis an 8-bit unit where arithmetic and logic i i ‘ a . gical operations are carried out. The ALU oi i ny, a iy oe only binary addition and subtraction by the 2's complement addi ccumulator, YO device, memory ete, supplies data. After performing the operation cording to the “siete resulting answer. If answer is zero th it sets the flags acc Aasis gue ERD fen it sets zero (Z) flag. Detail explanation of as it Fig. (1.8) ALU Circuit < aiGs ig. (1.8) ALU Circuit These are single bit status registers (Flip-flops) operated by ALU. The flags are either set or reset according to the answer produced by ALU. It is important because flags are examined in conditional instructions like "JMP” &"CALL", ‘There are five flags: 1) Sign Flag (S), 2) Zero Flag (Z), 3) Auxiliary Carry Flag (AC), 4) Parity Flag (P), 5) Carry Flag (CY), Bee BB, 6 BBB, s[z]- fac] -Jel[- le ! aay 7 T SIGN AUXILLARY PARITY CARRY ‘CARRY Fig. (1.9) Flag Register |Condition and Code Flag 0 = Reset, 1 = Set INot Zero, (NZ) z=0 Zero @ Z=1 (NC) cy =0 ICY =1 IP=0 iP=1is di Je (1.3) illustrates dif With instruction STC tet erat ae ¢ es cans of ALU el ane operation programs sis Word formed. Iteontains accumulator with flag. 4, PROGRAM COUNTER (TO) ter used to store the address of next Program counter is a Jocation containing the next ins lean points dz tothe memory leaton SOUT be executed, For example an instracfon (9 3085. should give means lond register pair with 2475H. Now £0: : : i counter, Suppose it is stored in memory Ig instruction LXI B in to program counte yteeeeeroccssor ‘call 0200H then program counter will get incremented by microp! 0202H. Let us take a simple program as follows: PC 0200 LXIB2475H (1) 0201 LDAX D Q) 0202 LXID,3794H, G) In this program our instruction is in first line. After completing ins no. (1) program counter contents automatically goes to 0201H which is the add next instruction LDAX D. then it will go to 0202, 0203 .... automatically. Som JUMP instruction is present in the main program then normal sequence is dist JUMP instruction directs some other (X) memory location program counter will contain the address of (X) memory location. So # provides logical continuity to the program. Thus microprocessor incret program counter every time as it fetches the instruction. 5. STACK POINTER (SP) Ttis a 16-bit register used to store an address of current memory called SUBROUTINE AT G PROGRAM COUNTERvemory 10 jcroproce st ‘As explained above, in case of subroutine the program counter is directed to the address of branching memory location. But before that program counter is jocremented by 1, which will be the address of next instruction in the main program, the address is stored in this special group of register or memory area called as stack, of stack is initialized by LXI H instruction. Refer Fig. (1.10) suppose program counters current address is 0032 and a subroutine occurs at this instruction. Therefore before program counter goes to next address of subroutine (as shown 015B) it will be incremented by 1 that is 0032 + I = (0033 this will be the next address, which is saved in stack. Stack is a part of RAM. ‘Address 0033 is stored in stack at memory location of stack 0004 and 0005. This ‘address 0004 where next address of PC 0033 is stored. Stack pointer shows it. Jin practice, stack is operated by PUSH and POP instruction. Let us take example of PUSH and POP instruction. Before PUSH operation program counter is at 0056 and a JUMP instruction appears at this address, similarly stack contents are shown for previous subroutines 0051, 0080 etc. Stack pointer is stored with previous stack address 0007. Now after PUSH instruction, refer fig. (1.11) the contents of PC has incremented, by 1 to 0057. Then the address of stack pointer is also decremented by 2 it becomes 0005 from 0007 and now at this location of stack the contents of PC are stored at 0057 as shown. ‘Afier completion of subroutine program counter should go to main program whose ‘address is stored in stack by 0057. This is done by using instruction "POP". Po ADDRESS —_ STACK PROGRAM COUNTER STACK (0056 ] 2004 0057 ‘0004 0005 0005 7 Co ‘008 0008 ood STACKPOINTER 0007 0 STACKPOINTER 0007 a 0008 0 0008 oo 009 si 0008 a (00 00 008 © ‘BEFORE PUSH AFTER PUSH Fig. (1-11) Stack and Stack Pointer Refer fig. (1.12), when "POP" instruction is given after completing subroutine it automatically stacks contents whose address was stored in stack pointes is 00) transferred to program counter (0057). Similarly after “POP” o n stack po‘STACK P Instruction Fig. (1.12) Idea of PO! CREMENTER - DECREMENTER oarea 16 bit register itis used to add or subtract 1 from the contents of program counter or stack pointer. 7. _ INSTRUCTION DECODER Tnstruction is stored in instruction decoder. It is decoded by this circuit initiate the timing and control signals for the given instructions. These operations carried out by liming and control sections by generating control signals like CLK RD, WR ALE SO, SI, 1O/M, HLDA and RESET OUT. It also accepts input conl signals like READY, HOLD and RESET IN. 1.9 INTERRUPTS Microprocessor is always connected to different iny i fi 3s ut/output (1/0) devi such as displays, printer, keyboard etc., which are called as Espen ce 8085. "interrupt"* microproces: mie will continue its main ‘program. _In microprocessor 8085 an j ist becctton aaa v interrupt is the input si; i Routine" (ISR), he ae ae ee ratte iow re ner illustrates the idea of communication eee Be ogame. of communication between microproce so er ee, ‘ sor and device with help of interrupt.MAIN PORGRAMME sR @ @ RETURN Fig. (1.13) Idea of Interrupt Service Routine Suppose you are referring a telephone directory for finding the phone number of a peson staring with surname X in sequence and if your friend told you that find a Pe number of person starting with sumame Y. ‘Then your friend interrupts yous you will keep in mind the page number of your required person (like storing the Yjdress in Program counter). Then you will go to the page on which your friends phone number is given. You will find out the desired phone number for your friend, aaeeh is similar to “interrupt service routine". After you service your friend again You will go for your page for finding the phone number starting with sumame Xie. continuing main program. Interrupts on 8085 ‘The 8085 has two types of interrupts such as (1) Software Interrupts, and (2) Hardware Interrupts Ithhas cight software interrupts known as RSTO, RST! ~-- RST 7 where RST. is RESTART because when this type of interrupt instruction is given to 8085 it jumps to specific fixed address. The addres is calculated as suppose RST 1. RST 1 =1x 8 =0008 H When RST 1 interrupt is there 8085 goes to location whose address is 0008H for RST 5 itis 5 x 8 = 40 = 0028 H and so on. (40i0 = 28H) '8085 microprocessor has five hardware interrupts as 1) TRAP (G5) Highest priority 2) RST7.5 3) RST6S 4) RSTS.5 5) INTR Lowest priority " “These interrupts are vector interrupts it means when this type of interrupt i given to 8085 it is vectored or directed or transferred to specified fixed memory location, The address of these interrupts is calculated as " saVector to Address 0024 H (Where 44 = In these five interrupts Y similarly TRAP. is called as “nonmaskable inter ed ci disabled microprocessor has. (0 giv bet is_interrupt, saerupts RST 7.5, RST 69 RST 52 INTR are interrupts disabled. Interrupt Procedure ‘ %) An WO device sends an interrupt sigi indicate that data is ready for input. 4 (ii) Microprocessor temporarily stops what it is doing and sends in acknowledge signal. 7 (ii) Microprocessor stores the contents of and address of stack into stack pointer. (iv) Microprocessor inpus the data from the device. (vy) Itretums to the main program. priori program Counter into the 4.10 ADDRESSING MODES IN 8085 ie aoe he oa chapter icin set of 8085’ you will study all y embly level instructions, An instruction is not recognised by microproces understands only binary code. Assembly level trates indirectly 00 into binary code that is known as machine code’. Instruction may be 1, 2 0F8 in length, ne oe byte shows the operation type to be performed e second ad third bytes of instruction indicates ei paca areal operand at 8 which operation is to be TEE a ae ; There are numberof instructions which jassi i addressing the data, They are classified into oa porting oa (1) Direct Addressing (2) Register Addressing (3) Register Indirect Addressing (4) Immediate Addressing (5) Implicit Addressing. Let us see each type of addressing mode with example.DDRESSING sot address Ss ing mode, the address of the operand is specified within the i pi ae LDA,06C2H. This means Load accumulator location 06C2H. Here all i i Ee ctanpotarc concn stAGa a so) INTR has 19,,, . 5 | Store contents of accu: lator At this location Which can no, FEMUPL. But ote, ‘upts" these can ty ACCUMULATOR microprocessor to Fig. (1.14) Direct Addressing and sends interugt DDRESING MODE ‘ : Moore repister name is specified in the instruction. ASSES © not tt ter or accumulator to register transfer This is register to regi byte instructions. For example MOV AB MOV A. punter into the stack of B to A REG ‘Move contents B { study all ope rt rocessor ul ey finicropeny convert ACCUMULATOR or 3 YY . Fig. (1.15) Reaiste! ‘ADD C (Add 0 Register A: D Addressing ntents of register ©Another example of in« It adds the contents of memory whov® “t's, aad the contents of se ator, In actual program suppose We oe sec OFAFH to accumulator then instructions required __Mewory _ ; ing mode is direct addressing mode is 8 [Se ACCUMULATOR or | AF ft {Paes at a eel ‘ADDRESS Fig. (1.17) Register Indirect Addressing i) LXI H OFAFH ; Load H-L pair with OFAFH - i) ADDM ; Add contents of this memory (OFAFH) to accumulato (But MOV A, OFAFH it is not allowed it is wrong instruct 4, IMMEDIATE ADDRESSING When data (operand) is directly transferred to register then it is immediate Addressing. One or two byte instructions are used for this addressing. In this mode operand is specified within the instruction itself. D specified after immediate Mnemonic. Examples: i) MVIB,S5SH (move immediate 55to B) a 5 re register immediate) LXI H 52C5H is .indicates load register H- L pair wi Here is los neuen Bir pair with data S2CSH, operand 52CS is lo ii) ACI 66H Add 66H to Accumulator with carry. 5. IMPLICIT ADDRESSING Implicit addressing instructions i . 1 byte i i i logic ap are instructions many instructio peal BE ss implicit addressing, i Poe Compliment Accumulator ii) ite Accumulator Rij CMC ete. rene——- — QUESTIONS 4, Select the correct alternatives 3), Meroprocessor 8000 is manufactured by — (Mar.95) ™ {) Intel ii) Motorola iii) Zilog iv) ‘Toshiba 122 1) The example of a 32-bit Microprocessor is — (Mar.97) rt 1 }) M68000 _ii}Z80000 ii) Inte's 80286 iv) M68020 or | «) The addressing mode of the Instruction LHLD is... (Oct-98) ADDRES, I j) Register i)Register Indirect ii) Direct iv) Immediate hog 4 LXUH, addr. is byte instruction, (Specimen-Paper) di a2 it)3 ivy FH ¢ The register in the CPU that keeps tack ofthe address of the next instruction to be ry (OFAFH) to {eiched from program memory is called the — (Mar.2002) allowed itis wrong {)Program Counter, i) Instruction Register, iii) ‘Accumulator, iv) Stack Pointer f) In the flag register of 8085 microprocessor ____ number of bits are kept unused. is, i) 3, it)4, ivy? (Oct.03) register then it tbs g)"Theinstretion MOY B, AA of 8085 microprocessor is an example of. tions are used fo ies (oct) pinthe inetrer’oe X ‘pDirect, i) Implicit, ii) Register indirect, iv) Register 1) Ih 8085 microprocessor, serial data from external device i received on pin. {) SID, ii) SOD, iii) HOLD, iv) READY (Mar.2004) 5) — flag bits reset, when flag resister content in D4H. (Mar.2006) a as. wz acy 3) AC F “ 4, Here operand" jy____ bus is one way data path from MPU to all devices. (Mar-2008) a) Data b) Address ©) Control d) None of these })— is a non-maskable interrupt. (Mar.2010) a) TRAP b)RST?.S )RST65 4) RSTS.S 7 vin 8085— pin isthe only ouput terminal of interrupt control block (Mar.2012) oy a) TRAP b)INTR @RST75 @ INTA instr” tion 1m) ALU is. —bit unit in 8085 microprocessor (Mar.2013) 8, iip16, ii) 32, iv) 64 ‘ n) The flag register of 8085 contains — flags. o as b)3 7 as 3. Draw a neat labeled diagram of a generic sé ly: in short. function ste ee of the CPU of a mi 4, Explain the primary : 5, What is Microprocessor ? Write the features 6. Draw internal block diagram of 8085. 7. Write the functions of following Pins , i)ALE. ii)SID iii) CLK [out] : 3 is the purpose of following registers in 8085 proces: i) HL pair ii) Stack pointer iii) Program Counter 9. With the help of suitable examples, explain direct and i modes in 8085. 10. With suitable block diagram, explain the structure of Cl accessible to a user of 8085 processor. ah 11 Explain the term vector interrupt. Why the vector interrupt | named as RST 5.5, RST 6.5, RST 7.5? Which interrupt pin highest priority? Q 12. Explain the-term ‘interrupt’. What is the difference between interrupt and other interrupts available on 8085 chip? Which interrupt of these ca masked? 13. Lis all hardware interrupts of 8085, List them ‘maskable and non-maskable interrupts, 14. Indicate the purpose of following pins on 8085 chip, i) ALE ii)SOD iti) WR 1S. What i the function of following register in 8085 processor? i) Accumulator . ii) Program counter iii) Flags iv) stack pointer (0 16. Explain the following blocks of 8085 microprocessor: microcomputer, 18. Explain in brief how 8085 handles input/output ports. Discuss it with ref Teading and writing ference to the IOM sigmap of a system. Draw a memory map of. (Mar 89) "8085. Show with help of a neat (Mar 89) processor” giving one example of each (Mar 2002,08, Oct.03.Mar-2020) et seal using the facility available on 808: ‘ (Oct 89) on 8085 chip? A (Oct 89, Mar.2004) . significance of each flag bit. ae (tar-2006,2008) rrupt pins on Si pt pin on 8085 bx (Oct 89) (Mar 88,201") 26 (Oct 89,Mar16) veen interrupt pal” (Oct 89) crupt of these = 4 (yar, 2002), « a F their prio ey a in 08st the flag register contains ACH “2006 i : (Specimen Paper) (Mai mediate addressing modes in case of S0SS ‘units in the microprocessor 8085. (Oct.03, Mar.2010,2019,2020) sor? y li § ry i 1/0 control. q of following pins in 8085 microprocessors Fs (OCLOR Marlo