ME6204 Convective Heat Transfer

Thermal Management of Electronic Components

Mujumdar A S and Ravi K January 2006

Slide 1

Outline of Topics
Introduction Basic Thermal Problems in IC Packages and Electronic Systems Heat Transfer path in IC packages Thermal Definitions and JEDEC standards Basic Approaches for IC package Thermal Performance Characterization Analytical Approach Modeling approach* Experimental Approach* Thermal performance - Package level with examples - Heat sink selection with examples Summary

* Covered basic details Slide 2

Introduction
Needs of thermal management for electronic packages and systems Basic concepts, definition and industrial approaches for thermal characterization of electronic packages To understand the package thermal performance with different external cooling arrangements

Slide 3

Major Causes of Electronic Failures

Reynell, M. 1990

Source: U.S. Air Force Avionics Integrity Program

Slide 4

Lifespan Vs Junction Temperature

Control of TJ = Goal of electronic cooling Higher TJ yields shorter device life Higher TJ poor image capture

Life

e c/TJ

Slide 5

Heat Fluxes for Various Elements

Heat Fluxes For Various Events

Chu, Simons, et.al 1999

Slide 6

Trends in Electronic Cooling

Increasing module and device heat fluxes Declining thermal design-margins

Slide 7

What is Packaging?
Packaging Controls Size Weight Performance Reliability Cost

Source: IEEE/CPMT

Slide 8

Why care about Packaging?

Today s electronics product are very complicated systems containing many thin layers, narrow conducting wires, tiny solder joints etc. Because of the fine features and large number of parts involved in each design the probability of system failure is high unless all the design considerations are taken into account. This presentation covers only some aspects of design, production, testing, and packaging of electronic products issues based on package structural considerations.

Slide 9

Thermal Issues in Electronics

To keep the maximum junction temperature within the specified limit (Tj < 125 C) Effective/Economic heat removal out of electronic systems

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Various Electronic Packages

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Source: www.electronics-cooling.com
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Package Thermal Performance

Source: www.electronics-cooling.com

Slide 12

Thermal Trends in Electronic Packages

Package size decrease ---> Hot Die size decrease ---> Hot System complexity increase - Hot Clock speed in crease - Hot Lower power process, lower volatge I/O increase

Slide 13

Thermal Management/Characterization
Both are critical for thermal design of a system and component Thermal characterization Involves the determination of thermal fields and its gradients (spatial and temporal), representative thermal parameters throughout the system and component Thermal management Involves heat removal strategies from the electronic package, PC board and system
Slide 14

Thermal Analysis for Electronics

Methodology levels Package PCB System Analysis and Technical skills Heat transfer Conduction, Convection and Radiation Computational Fluid Dynamics Numerical modelling Experiment

Slide 15

Heat Transfer Mechanism in Electronic packages

Conduction heat transfer occur within the solid Convection - heat transfer by external fluid or gas that surround the surface Natural Convection heat transfer based on the principle that hot air rises Forced Convection heat transfer by forced air blown across the surface Radiation heat transfer calculation based on energy released by radiation.

Slide 16

Heat Transfer in Electronic packages

Major heat paths Package top to Air Package Bottom to board Package leads to board

Source: www.electronics-cooling.com
Slide 17

Heat Transfer in Electronic packages

Source: www.electronics-cooling.com
Slide 18

Packaging Technology Trends

- Moore s law: The number of transistors in an IC doubles every 18 months - Need for new cooling techniques - Driven by increases in power dissipation -A heat flux of 100 W/cm2 at a temperature difference of 50 K - Requires an effective heat transfer coefficient of 20,000 W/m2K

Source: www.electronics-cooling.com

Slide 19

Comparison of Heat Fluxes

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Various Cooling in Electronics

- Need for liquid cooling in the future of thermal management

Source: www.electronics-cooling.com
Slide 21

Conduction and Heat Spreading Cooling

IC package with thermal conduction path to heat sink via TIMs For high-power applications, TIM resistance becomes an important issue Higher thermal conductivities, BLT and CTEs

Source: www.electronics-cooling.com
Slide 22

Heat Spreading Results

- Effect of thickness on heat spreading for various heat source areas, - Material thermal conductivities and - Heat transfer coefficients

Source: www.electronics-cooling.com
Slide 23

- Fan Cooling limits: - Std Fans with accepted noise level max. heat transfer co-efficient: 150 W/m2K - Heat flux of 1 W/cm2 with 60 C temperature difference - Macro jet impingement - HTC: 900 W/m2K - Non std fans/dedicated heat sinks for CPU cooling - Heat flux of 50 W/cm2 - 10x better than 15 years ago - Piezo Fans - Air coooling enhancement - Low power, small and relatively low noise fan used - 100% enhancement over natural convection heat transfer - Research: Perdue, " HeatTransfer Eng., Vol. 25, 2004, pp. 4-14 Synthetic Jet impingement - Synthetic Jet Cooling - Nanolightning
Source: www.electronics-cooling.com
Slide 24

High performance Cooling in Electronics

Synthetic Jet Impingement

Source: www.electronics-cooling.com
Slide 25

Nanolightning

- New approach to increasing the heat transfer coefficient called 'nanolightning , from Purdue . - Based on 'micro-scale ion-driven airflow' using very high electric fields created by nanotubes. - The ionized air molecules are moved by another electric field, thereby inducing secondary airflow [9]. - Cooling a heat flux level of 40 W/cm2 has been reported. - Technology is being commercialized through a start-up company (Thorrn).

Source: www.electronics-cooling.com
Slide 26

Liquid cooling
- Liquid Cooling ( upto 2000 Kw/cm2 is possible), - Experimental value reported upto 200 kw/cm2 - Micro coolers can handle upto 1 kw/cm2 - Direct cooling - Immersion cooling - Jet impingement - Indirect cooling - Heat pipe - Cold plate - Micro channels and Mini channels - Electrodynamic and electrowetting cooling - Liquid metal cooling - Thermo electric cooling - Thermionic and Thermotunneling cooling - Super lattice and Heterestructure cooling - Phase change materials and heat accumaltors

Source: www.electronics-cooling.com
Slide 27

Heat Pipe: High Performance Cooling in Electronics

Indirect passive cooling Effective thermal conductivity range: 50 kw/mK to 200 kW/mK Performance of heat pipe: 10 W/cm2 to 300 W/cm2 Simple water heat pipe heatt transfer capacity is 100 W/cm2 (Average): Picture: Note book applications

Looped heat pipe Separate liquid and vapor flow path Heat flux upto 625 W/cm2

Source: www.electronics-cooling.com
Slide 28

Immersion Cooling

Different Advanced cooling

Spray Cooling

Mutiple Jet impingement Cooling

Source: www.electronics-cooling.com
Slide 29

Thermal Considerations

Slide 30

What are different Thermal numbers?

In general the package therm al perform ance is characterized based on the following five different basic therm al param eters based on heat dissipation requirem ents. Therm al R esistance : JA , Therm al C haracterization param eter :
JC JB

& &

JB JT

Slide 31

Thermal parameter - Notation

RJA or JA or JMA or JX or JR - Thermal Resistance: Junction to ambient (in still air or moving air) RJC or JC - Thermal resistance: Junction to case RJB or JB - Thermal Resistance: Junction to board JT - Thermal characterization parameter: Junction to top center of the package top JB - Thermal characterization parameter: Junction to the board Where, R - Reference point X - Measured location A - Ambient conditions MA - Moving air
Slide 32

What are different thermal numbers?

In general the package therm al perform ance is characterized based on the following five different basic therm al param eters based on heat dissipation requirem ents. Therm al R esistance : JA , Therm al C haracterization param eter :
JC JB

& &

JB JT

Slide 33

JA

- Junction-to-Ambient Thermal Resistance

Definition

R JA
What does it mean? -

TJUNTION TAMBINET POWER

It reflects how well heat flows easily from junction to ambient via all paths. Relevant for packages used without external heat sinks.

Use of Junction to Ambient Thermal Resistance? Used to compare thermal performance of packages for selection of package type, materials and package supplier. If two packages with same JA should perform equally well in an actual application. A package with a lower value of JA should perform better in an application than one with a higher value. Lower is good. Used to calculate package power capability. If package JA is known package power capability can be calculated for a particular application. Used to calculate die temperature when environment is similar to the test environment. (Formula should be used with great caution).

How to measure this value? Mount package on standard JEDEC thermal test board Put package in standard test environment Wind tunnel or JEDEC enclosure Apply known amount of power Measure temperature of chip TJUNCTION and temperature of air TAMBIENT Perform calculation using definition

Slide 34

Junction to Ambient Thermal Resistance Natural Convection

Heat Flow In Still Air JEDEC Still air box

Thermal Measurement Definition

R JA

TJ TA P
Slide 35

Junction to Ambient Thermal Resistance Forced Convection

Heat Flow In Forced Air Wind Tunnel

Thermal Measurement Definition

Package

TA TJ Die

R JA

TJ TA P
Slide 36

JC

Junction-to-Case Thermal Resistance

RJC TJUNTION TCASE POWER

Definition

What it means? It measures ease of heat flow between the die and the surface of the package Relevant for packages used with external heat sinks

Application of Junction to case thermal resistance? It applies only to situations in which all or nearly all of heat is flowing out of top or bottom of package. Low value means that heat will flow easily into external heat sink. It is not a useful thermal characteristics to predict junction temperature

How to measure this value? Mount package on standard JEDEC thermal test board or socket Put package in contact with water-cooled cold plate - Insulate package from air - Force all heat to flow to cold plate though package surface Apply known amount of power Measure temperature of chip T JUNCTION and temperature of package surface (case) T CASE. Perform calculation using definition

Slide 37

Measurement of RJC

Thermal Measurement Heat flow with heat sink

Definition

RJC

TJ TC P
Slide 38

JB

Thermal Resistance: Junction-to-Board

Definition

RJB
What it means? -

TJUNTION TBOARD POWER

It provides overall thermal resistance between die and the PCB. Defined to be the difference in the junction temperature and the PCB temperature closer to the package at center.

How to measure this value? Mount package on standard JEDEC thermal test board Mount thermocouple on board at edge of the package Applies only for 2S2P test board. Measure temperature of die TJUNCTION and temperature of the board near to the package at center location. Perform calculation using definition.

Slide 39

Measurement of RJB

Measurement Fixture Definition

R JB
Thermal Measurement

TJ TB P

Slide 40

Th e rm al C h a ra c teriza tio n JT J u n c tion -to -P a cka g e T o p

Definition
JT

P ara m e te r:

TJUNTION TTOP POWER

What it means? It provides correlation between die temperature and temperature of package at top center. It is not true thermal resistance. Also, is not RJC. Variable with air flow. It is about 5-10X smaller than RJC. of Junction to Package top thermal characterization

Application parameter? -

Used to estimate the junction temperature from a measurement of top of package in actual applications environment.

How to measure this value? Mount package on standard JEDEC thermal test board Mount thermocouple on top center of the package Put package in standard test environment Wind tunnel or JEDEC enclosure Apply known amount of power Measure temperature of die TJUNCTION and temperature at top center of package TTOP Perform calculation using definition
Slide 41

Measurement of
Thermal Measurement

JT

Thermocouple Location

Definition

Relationship with Rja

JT

TJ TTSS P

R JA

JT

JA

Slide 42

T h e rm a l C h a ra c te riz a tio n P a ra m e te r: JB J u n c tio n -to -B o a rd

Definition

JB

TJUNTION TBOARD POWER

What it means? It provides correlation between die temperature and board temperature near to the package. It is not true thermal resistance. Very close to RJB since 80-90% of an die power flows into the PCB. New parameter does not have wide usage yet. It is defined for both natural and forced air coditions.

Application of Junction to Board thermal characterization parameter? Used to estimate the die junction temperature from a measurement of board in actual applications.

How to measure this value? Mount package on standard JEDEC thermal test board Mount thermocouple on board at edge of the package Put package in standard test environment Wind tunnel or JEDEC enclosure Apply known amount of power Measure temperature of die TJUNCTION and temperature of the board near to the package. Perform calculation using definition.

Slide 43

Measurement of
Thermal Measurement

JB
Thermocouple Location

TB

Definition

JB

TJ TB P

Slide 44

Other related equations

JA

JC

CS

SA

Note: Package jc is very important for heat sink selection

JA

JT

JA

Slide 45

Package with Heat Sink

Ta

Interface Material Resistance (Assumed 0.2C/W)

Rsa - Heat sink Rcs - Interface Rjc - Package Silicon Die Rja = Rjc+Rcs+Rsa

Package

Slide 46

How to select a Heat Sink Simulated data of FC package shows case to junction thermal resistance as (Rjc) 0.2C/W. Assume the heat sink interface material thermal resistance to be (Rcs) 0.1C/W Case 1: Required Rja = 1.67C/W (P=15 W, Ta = 85C, Tj = 110C) Case 2: Estimated Rja=4.00C/W (P=15 W, Ta = 50C, Tj = 110C) Required heat sink thermal resistance is, Case 1: Rsa = 1.37C/W Case 2: Rsa = 3.70C/W
Slide 47

Heat Sink

Rsa= 3.7C/W Case 2

Rsa=2.6C/W at 200 LFM

Rsa= 1.37C/W Case 1

Ensure minimum air flow of # next to the package to maintain the temperature below Tj < 110C #Case 1: Required minimum air flow of 100 LFM #Case 2: Required minimum air flow of 440 LFM

Slide 48

How to calculate die junction temperature in an application environment?

Example 1: Use of PSI-jt to estimate the junction temperature in an application environment, Assume that the measured temperature at top center of the package is 95C with customer application then, Use the value of PSI-jt which measured based on JEDEC 4 layer board, at 400 lfpm forced convection cooling is PSI-jt =4.7 C/W, then use equation: Tj = Pd x PSI-jt + Tt At given power of 2.6 watts, Tj =2.6 W x 4.7 C/W + 95C = 12.2C + 95C = 107.2C This is below the die maximum junction temperature specification requirement of 125C.

Slide 49

How to calculate die junction temperature in an application environment?

Example 2: Use of PSI-jb to estimate the junction temperature in an application environment, Assume that the board temperature measured near to the package is 60C with customer application then, Use the value of PSI-jb which measured based on JEDEC 4 layer board, at 400 lfpm forced convection cooling is PSI-jb = 11.0 C/W, then use equation: Tj = Pd x PSI-jb + Tb At given power of 2.6 watts, Tj =2.6 W x 11.0 C/W + 60C = 28.6C + 60C = 88.6C This is below the die maximum junction temperature specification requirement of 125C.

Slide 50

Package Thermal Simulation

Slide 51

FLIP CHIP Package Cross Section

Die Lid Ceramic Substrate Solder Balls
Not drawn to scale

Lid attach epoxy

Underfill + Bumps

Slide 52

Thermal Simulation - Package Thermal characterization of FCCBGA package To study the effect of lid on package thermal performance To understand the package thermal performance using different heat sinks.
Slide 53

Benefits of Lid
Lid - Composite material with a high thermal conductivity value. Thermal conductivity - >150 W/mK The coefficient of thermal expansion (CTE) of the lid is matched - the die and the substrate. Low Density Light weight

Slide 54

Package Thermal Requirement

Input data Heat flux : 5 to 10 W/cm2 Junction temperature : 110C (max) Environment temperature : 70C Required Package Thermal Resistance : < 3.0C/W 3.0 Simulation/Measurement Conditions Ambient temperature : 25C Test boards : High Conductivity as per JEDEC Thermal Predictions Junction Temperature (Tj) in C Thermal Resistance in C/W Thermal Characterization parameter in C/W

Slide 55

Governing Equation
( ) div ( V grad ) S

t
V

Transient + Convection

Diffusion = Source

- Commercial CFD Tool - Finite Volume Method - Grid Size: 135 x 125 x 85 (over 1.4 millions) - Radiation and Turbulence - Included

Slide 56

Thermal Simulation/Measurement
Environmental conditions - Natural convection In still air - Forced Convection Airflow Speed: 1.0 m/s & 2.5 m/s Geometric variations - Lidded Vs Unlidded - Heat Sinks: Passive & Active - Small & Large

Slide 57

Thermal Model - Flip Chip Package

PCB, Package & HS Lidded

Unlidded

Package with HS - 2D View

Slide 58

Thermal Model - Different view

Lid Lid-die-attach Die Substrate C4 & Under fill Lid attach Solder balls

Slide 59

Natural Convection Airflow & Temperature pattern

Airflow Temperature Ta = 25C 2S2P PCB

Slide 60

Natural Convection Junction Temperature (Ta = 25C)

Lidless Lidded

Tj=157.7C Lidless with HS-L

Tj=132.8C Lidded with HS-L

Tj=92.5C

Tj=89.4C

Slide 61

Results Forced Convection Airflow Velocity: 2.5m/s

Slide 62

Forced Convection Typical Airflow Pattern

Without HS Airflow 2.5 m/s

With HS Airflow 2.5 m/s

Slide 63

Forced Convection Temperature Distribution

Ta = 25C 2S2P PCB

Airflow 2.5m/s

Slide 64

Forced Convection Junction Temperature (Ta = 25C)

Lidless Lidded

Tj=106.3C Lidless with HS-L

Tj=85.1C Lidded with HS-L

Tj=46.4C

Tj=45.7C

Slide 65

Package Thermal Resistance Simulated Vs Measurement

Thermal Resistance: FC-CBGA Package
Thermal Resistance in C/W 10 8 6 4 2 0 0 200 400 600 Airflow in LFPM Measured Simulated

Results shows good correlation between measured and simulated data

Slide 66

Package Thermal Budget

Package level Thermal Budget
FC_CBGA Package Top + Side Bottom Top + Side Bottom Lidded and HS-L 57% 43% 79% 21% Lidded and Unlidded and HS-S HS-L 51% 49% 71% 29% 62% 38% 81% 19%

Lidded 22% 78% 35% 65%

Natural Convection Still Air

Forced Convection V = 2.5 m/s

4.5 Infrared thermal analysis

Slide 67

How to calculate die junction temperature in an application environment?

Example 1: Use of jt to estimate the junction temperature in an application environment,

Assume that the measured temperature at top center of the package is 95C with customer application then, Use the value of jt which measured based on JEDEC 4 layer board, at 400 lfpm forced convection cooling is jt =4.7 C/W, then use equation: Tj = Pd x jt + Tt

At given power of 2.6 watts, Tj =2.6 W x 4.7 C/W + 95C = 12.2C + 95C = 107.2C This is below the die maximum junction temperature specification requirement of 125C.

Slide 68

Simulation Outcome
Thermal simulation estimate shows that FC package will meet the required junction to ambient thermal resistance of < 3.0C/W. Require external heat sink with forced air flow for heat flux > 4.0 W/cm2 Lidded Vs Lidless: No heat sink attached: Improved thermal performance by ~23% with lid in still and forced air. Heat sink 1 or 2 attached: Improved thermal performance by ~5% in still air with lid & no significant improvement in forced air. Excellent correlations between numerical and measured data: < 12% error range

Slide 69

References
www. electronics-cooling.com www.coolingzone.com www.jedec.org www.thermengr.com HDI(Magazine High Density Interconnect) Advanced Packaging magazine ASME, Int. Jl. of Electronic Packaging IEEE Trans. on Advanced Packaging IEEE Trans. on Components and Packaging Technologies IEEE Trans. on Electronics Packaging Manufacturing

Slide 70

THANK YOU

Slide 71