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LM89
SNIS128D – AUGUST 2002 – REVISED JUNE 2014

LM89 ±0.75°C Accurate, Remote Diode And Local Digital Temperature Sensor
With Two-Wire Interface
1 Features 3 Description
1• Accurately Senses Die Temperature of Remote The LM89 is an 11-bit digital temperature sensor with
ICs or Diode Junctions a 2-wire System Management Bus (SMBus) serial
interface. The LM89 accurately measures its own
• Offset Register Allows Accurate Sensing of a temperature as well as the temperature of an external
Variety of Thermal Diodes device, such as processor thermal diode or diode-
• On-Board Local Temperature Sensing connected transistor such as the 2N3904. The
• 10-Bit Plus Sign Remote Diode Temperature Data temperature of any ASIC, GPU, FPGA or MCU can
Format, 0.125°C Resolution be accurately determined using the LM89 as long as
a dedicated diode (semiconductor junction) is
• T_CRIT_A Output Useful for System Shutdown available on the target die. The LM89 has an Offset
• ALERT Output Supports SMBus 2.0 Protocol register to allow calibration for different nonideality
• SMBus 2.0 Compatible Interface, Supports factors without requiring software management.
TIMEOUT Activation of the ALERT occurs when any
• 8-Pin VSSOP and SOIC Packages temperature goes outside a preprogrammed window
• Key Specifications: set by the HIGH and LOW limit registers or exceeds
the T_CRIT limit. Activation of the T_CRIT_A occurs
– Supply Voltage: 3.0 V to 3.6 V when any temperature exceeds the T_CRIT
– Local Temp Accuracy (includes quantization programmed limit.
error) The LM89 is pin and register compatible with the
– TA = 25°C to 125°C ±3.0 °C (max) LM86, LM90, LM99, On Semiconductor ADM1032
– Remote Diode Temp Accuracy (includes and Maxim MAX6657/8.
quantization error) The LM89C and the LM89-1C have the same
– TA = 30°C, TD = 80°C ±0.75 °C (max) functions but different SMBus slave addresses,
allowing multiple LM89's on a bus. LM89-1D's default
2 Applications local T_CRIT temperature limit is 105°C; all other
versions are 85°C. (See Device Comparison Table.)
• Processor/Computer System Thermal
Management Device Information(1)
(For Example, Laptop, Desktop, Workstations, PART NUMBER PACKAGE BODY SIZE (NOM)
Server) LM89-1D VSSOP (8) 3.0 mm x 3.0 mm
• Electronic Test Equipment LM89C SOIC (8) 4.9 mm x 3.9 mm
• Office Electronics (1) For all available packages, see the orderable addendum at
the end of the datasheet.

4 Remote Diode Temperature Sensor System Diagram

Main Power Supply
Core Voltage Shutdown Control T_CRIT_A Temperature Response Diagram

3.3V derived
from Aux.
Supply

T_CRIT_A

D+
MCU/
GPU/
LM89 SMBus
2.2nF*
ASIC/ D- SMBData Master
SMBCLK
FPGA ALERT

*Note: 2.2nF capacitor must be placed as close as possible to D+ and D- pins of the LM89.

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains ADVANCE
INFORMATION for pre-production products; subject to change without notice.
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Table of Contents
1 Features .................................................................. 1 9.1 Overview ................................................................... 9
2 Applications ........................................................... 1 9.2 Functional Block Diagram ......................................... 9
3 Description ............................................................. 1 9.3 Feature Description................................................... 9
9.4 Device Functional Modes........................................ 18
4 Remote Diode Temperature Sensor System
Diagram................................................................... 1 9.5 Programming .......................................................... 19
5 Revision History..................................................... 2 9.6 Register Maps ........................................................ 19

6 Device Comparison Table..................................... 3 10 Application and Implementation........................ 24

10.1 Application Information.......................................... 24
7 Pin Configuration And Functions ........................ 3
10.2 Typical Application ............................................... 24
8 Specifications......................................................... 4
10.3 Do's and Don'ts .................................................... 26
8.1 Absolute Maximum Ratings ...................................... 4
11 Power Supply Recommendations ..................... 27
8.2 Handling Ratings....................................................... 5
8.3 Recommended Operating Conditions....................... 5 12 Layout................................................................... 28
8.4 Thermal Information .................................................. 5 12.1 Layout Guidelines ................................................. 28
8.5 Temperature-To-Digital Converter Characteristics ... 5 12.2 Layout Example .................................................... 28
8.6 Digital DC Characteristics ......................................... 6 13 Device and Documentation Support ................. 29
8.7 Timing Requirements ................................................ 6 13.1 Trademarks ........................................................... 29
8.8 SMBus Digital Switching Characteristics .................. 7 13.2 Electrostatic Discharge Caution ............................ 29
8.9 Typical Characteristics .............................................. 8 13.3 Glossary ................................................................ 29
9 Detailed Description .............................................. 9 14 Mechanical, Packaging, and Orderable
Information ........................................................... 29

5 Revision History
Changes from Revision C (March 2013) to Revision D Page

• Changed data sheet flow and layout to conform with new Texas Instruments standards. Added the following
sections: Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation
Support, Mechanical, Packaging, and Orderable Information................................................................................................ 1
• Added information for LM89-1DIMM throughout document. .................................................................................................. 1

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6 Device Comparison Table

Order Number Local T_CRIT Threshold Slave Address [A6:A0]

LM89CIM 85°C 100 1100
LM89CIMM 85°C 100 1100
LM89-1CIMM 85°C 100 1101
LM89-1DIMM 105°C 100 1101

7 Pin Configuration And Functions

8-Pin VSSOP or SOIC

DGK or D Packages
(TOP VIEW)

Pin Functions
PIN DESCRIPTION
NAME DGK or D FUNCTION TYPICAL CONNECTION
NUMBER
VDD 1 Positive Supply Voltage Input DC Voltage from 3.0 V to 3.6 V. VDD should be bypassed with a 0.1µF
capacitor in parallel with 100pF. The 100pF capacitor should be
placed as close as possible to the power supply pin. A bulk
capacitance of approximately 10µF needs to be in the near vicinity to
the LM89 VDD.
D+ 2 Diode Current Source To Diode Anode. Connected to remote discrete diode-connected
transistor junction or to the diode-connected transistor junction on a
remote IC whose die temperature is being sensed. A 2.2 nF diode
bypass capacitor is required to filter high frequency noise. Place the
2.2 nF capacitor between and as close as possible to the LM89's D+
and D− pins. Make sure the traces to the 2.2 nF capacitor are
matched.
D− 3 Diode Return Current Sink To Diode Cathode.
T_CRIT_A 4 T_CRIT Alarm Output, Open-Drain, Pull-Up Resistor, Controller Interrupt or Power Supply Shutdown
Active-Low Control
GND 5 Power Supply Ground Ground
ALERT 6 Interrupt Output, Open-Drain, Pull-Up Resistor, Controller Interrupt or Alert Line
Active-Low
SMBData 7 SMBus Bi-Directional Data Line, From and to Controller, Pull-Up Resistor
Open-Drain Output
SMBCLK 8 SMBus Input From Controller, Pull-Up Resistor

Table 1. ESD Protection (1)

Pin Name PIN D1 D2 D3 D4 D5 D6 D7 R1 SNP ESD
NO. CLAMP
VDD 1 x
D+ 2 x x x x x x
D− 3 x x x x x x
T_CRIT_A 4 x x x

(1) An “x” indicates that the component exists.

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Table 1. ESD Protection(1) (continued)

Pin Name PIN D1 D2 D3 D4 D5 D6 D7 R1 SNP ESD
NO. CLAMP
ALERT 6 x x x
SMBData 7 x x x
SMBCLK 8 x

V+

D1
D3
D4 D6
I/O
D2 ESD R1
SNP Clamp D5 D7

GND

Figure 1. ESD Protection Input Structure

8 Specifications
8.1 Absolute Maximum Ratings (1) (2)
MIN MAX UNIT
Supply Voltage −0.3 6.0 V
Voltage at SMBData, SMBCLK, ALERT, T_CRIT_A −0.5 6.0 V
Voltage at Other Pins −0.3 (VDD + 0.3 V) V
D− Input Current -1 +1 mA
Input Current at All Other Pins (3) -5 +5 mA
Package Input Current (3) 30 mA
SMBData, ALERT, T_CRIT_A Output Sink Current 10 mA
Junction Temperature 150 °C
Soldering Information, Lead Temperature Vapor Phase (60
SOIC or VSSOP Packages (4) seconds) 215 °C
Infrared (15 seconds) 220 °C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not
apply when operating the device beyond its rated operating conditions.
(2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(3) When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5
mA. Parasitic components and or ESD protection circuitry are shown in Table 1 and Figure 1 for the LM89's pins. The nominal
breakdown voltage of D3 is 6.5 V. Care should be taken not to forward bias the parasitic diode, D1, present on pins: D+, D−. Forward
biasing the parasitic diode by more than 50 mV may corrupt a temperature measurements.
(4) Visit www.ti.com/packaging for other recommendations and methods of soldering surface mount devices.

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8.2 Handling Ratings

MIN MAX UNIT
Tstg Storage temperature range -65 150 °C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all -2000 2000
pins (1)
Charged device model (CDM), per JEDEC specification -1000 1000
V(ESD) Electrostatic discharge V
JESD22-C101, all pins; Applies only to LM89-1DiMM (2)
Machine model ESD stress voltage, per JEDEC specification -200 200
JESD22-A115. (3)

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) The machine model is a 200pF capacitor discharged directly into each pin.

8.3 Recommended Operating Conditions

MIN MAX UNIT
Operating Temperature Range 0 125 °C
Electrical Characteristics Temperature Range TMIN ≤ TA ≤ TMAX
LM89 0°C ≤ TA ≤ +85°C
Supply Voltage Range (VDD) 3.0 3.6 V

8.4 Thermal Information

LM89 LM89
(1)
THERMAL METRIC VSSOP SOIC UNIT
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 158 116
RθJC(top) Junction-to-case (top) thermal resistance 52 63
RθJB Junction-to-board thermal resistance 78 57 °C/W
ψJT Junction-to-top characterization parameter 5 11
ψJB Junction-to-board characterization parameter 77 57

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

8.5 Temperature-To-Digital Converter Characteristics

Unless otherwise noted, these specifications apply for VDD= +3.0Vdc to 3.6Vdc. Unless otherwise noted, MIN and MAX limits
apply for TA = TJ = TMIN to TMAX and typical limits TA= TJ= +25°C.
PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) UNIT
(3)
Temperature Error Using Local Diode TA = +25°C to +125°C, -3 ±1 3 °C
Temperature Error Using Remote Diode of 0.13 TA = +30°C TDiode = +80°C -0.75 0.75 °C
micron Pentium 4 or other devices with typical
TA = +30°C TDiode = +60°C to -1 1 °C
nonideality of 1.0021 and series R= 3.64Ω.
to +50°C +100°C
TA = +0°C to TDiode = +25°C to -3 3 °C
+85°C +125°C
Remote Diode Measurement Resolution 11 Bits
0.125 °C
Local Diode Measurement Resolution 8 Bits
1 °C

(1) Limits are ensured to AOQL (Average Outgoing Quality Level).

(2) Typical values are at TA = 25°C and represent most likely parametric norm.
(3) Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the
internal power dissipation of the LM89 and the thermal resistance. See Thermal Information for the thermal resistance to be used in the
self-heating calculation.
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Temperature-To-Digital Converter Characteristics (continued)

Unless otherwise noted, these specifications apply for VDD= +3.0Vdc to 3.6Vdc. Unless otherwise noted, MIN and MAX limits
apply for TA = TJ = TMIN to TMAX and typical limits TA= TJ= +25°C.
PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) UNIT
(4)
Quiescent Current SMBus Inactive, 16Hz conversion 0.8 1.7 mA
rate
Shutdown 315 µA
D− Source Voltage 0.7 V
Diode Source Current (D+ − D−) = +0.65V; high level 110 160 315 µA
Low level 7 13 20 µA
ALERT and T_CRIT_A Output Saturation IOUT = 6.0 mA 0.4 V
Voltage
Power-On Reset Threshold Measure on VDD input, falling 1.8 2.4 V
edge
(5)
Local and Remote HIGH Default Temperature 70 °C
settings
(5)
Local and Remote LOW Default Temperature 0 °C
settings
(5)
Local T_CRIT Default Temperature Setting for 85 °C
LM89-1C and LM89C
(5)
Local T_CRIT Default Temperature Setting for 105 °C
LM89-1D
(5)
Remote T_CRIT Default Temperature Setting 110 °C

(4) Limits are specific to TI's AOQL (Average Outgoing Quality Level).
(5) Default values set at power up.

8.6 Digital DC Characteristics

Unless otherwise noted, these specifications apply for VDD = +3.0Vdc to 3.6Vdc. Unless otherwise noted, MIN and MAX limits
apply for TA = TJ = TMIN to TMAX and typical limits TA= TJ= +25°C.
SYMBOL PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) UNIT
SMBData, SMBCLK INPUTS
VIN(1) Logical “1” Input Voltage 2.1 V
VIN(0) Logical “0”Input Voltage 0.8 V
VIN(HYST) SMBData and SMBCLK Digital Input 400 mV
Hysteresis
IIN(1) Logical “1” Input Current VIN = VDD 0.005 10 µA
IIN(0) Logical “0” Input Current VIN = 0 V -10 −0.005 µA
CIN Input Capacitance 5 pF
ALL DIGITAL OUTPUTS
IOH High Level Output Current VOH = VDD 10 µA
VOL SMBus Low Level Output Voltage IOL = 4mA 0.4 V
IOL = 6mA 0.6

(1) Limits are specific to TI's AOQL (Average Outgoing Quality Level).
(2) Typical values are at TA = 25°C and represent most likely parametric norm.

8.7 Timing Requirements

Unless otherwise noted, these specifications apply for VDD = +3.0Vdc to +3.6Vdc. Unless otherwise noted, MIN and MAX
limits apply for TA = TJ = TMIN to TMAX and typical limits TA= TJ= +25°C.
PARAMETER MIN (1) TYP (2) MAX (1) UNIT
(3)
Conversion Time of All Temperatures at the Fastest Setting 31.25 34.4 ms

(1) Limits are specific to TI's AOQL (Average Outgoing Quality Level).
(2) Typical values are at TA = 25°C and represent most likely parametric norm.
(3) This specification is provided only to indicate how often temperature data is updated. The LM89 can be read at any time without regard
to conversion state (and will yield last conversion result)

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8.8 SMBus Digital Switching Characteristics

Unless otherwise noted, these specifications apply for VDD = +3.0Vdc to +3.6Vdc, CL (load capacitance) on output lines = 80
pF. Unless otherwise noted, MIN and MAX limits apply for TA = TJ = TMIN to TMAX and typical limits TA= TJ= +25°C.
The switching characteristics of the LM89 fully meet or exceed the published specifications of the SMBus version 2.0. The
following parameters are the timing relationships between SMBCLK and SMBData signals related to the LM89. They adhere
to but are not necessarily the SMBus bus specifications.
SYMBOL PARAMETER TEST CONDITIONS MIN (1) TYP (2) MAX (1) Unit
fSMB SMBus Clock Frequency 10 100 kHz
tLOW SMBus Clock Low Time from VIN(0)max to VIN(0)max 4.7 25,000 µs
tHIGH SMBus Clock High Time from VIN(1)min to VIN(1)min 4.0 µs
(3)
tR,SMB SMBus Rise Time 1 µs
(4)
tF,SMB SMBus Fall Time 0.3 µs
tOF Output Fall Time CL = 400pF, 250 ns
IO = 3mA, (4)
tTIMEOUT SMBData and SMBCLK Time Low for Reset 25 35 ms
of Serial Interface (5)
tSU;DAT Data In Setup Time to SMBCLK High 250 ns
tHD;DAT Data Out Stable after SMBCLK Low 300 900 ns
tHD;STA Start Condition SMBData Low to SMBCLK 100 ns
Low (Start condition hold before the first
clock falling edge)
tSU;STO Stop Condition SMBCLK High to SMBData 100 ns
Low (Stop Condition Setup)
tSU;STA SMBus Repeated Start-Condition Setup 0.6 µs
Time, SMBCLK High to SMBData Low
tBUF SMBus Free Time Between Stop and Start 1.3 µs
Conditions

(1) Limits are specific to TI's AOQL (Average Outgoing Quality Level).
(2) Typical values are at TA = 25°C and represent most likely parametric norm.
(3) The output rise time is measured from (VIN(0)max + 0.15V) to (VIN(1)min − 0.15V).
(4) The output fall time is measured from (VIN(1)min - 0.15V) to (VIN(1)min + 0.15V).
(5) Holding the SMBData and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM89's SMBus state machine,
therefore setting SMBData and SMBCLK pins to a high impedance state.

tLOW
tR tF
VIH
SMBCLK
VIL
tHD;STA tHIGH tSU;STA
tBUF tSU;DAT tSU;STO
tHD;DAT
VIH
SMBDAT VI
L
P
S P

Figure 2. SMBus Communication

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8.9 Typical Characteristics

2000

1800

SUPPLY CURRENT (PA

1600
140
0
1200

1000

800

600

400
0.01 0.1 1.0 10 100

CONVERSION RATE (Hz)

Figure 3. Conversion Rate Effect On Power Supply Current

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9 Detailed Description

9.1 Overview
The LM89 temperature sensor incorporates a delta VBE based temperature sensor using a Local or Remote
diode and a 10-bit plus sign ADC (Delta-Sigma Analog-to-Digital Converter). The LM89 is compatible with the
serial SMBus version 2.0 two-wire interface. Digital comparators compare the measured Local Temperature (LT)
to the Local High (LHS), Local Low (LLS) and Local T_CRIT (LCS) user-programmable temperature limit
registers. The measured Remote Temperature (RT) is digitally compared to the Remote High (RHS), Remote
Low (RLS) and Remote T_CRIT (RCS) user-programmable temperature limit registers. Activation of the ALERT
output indicates that a comparison is greater than the limit preset in a T_CRIT or HIGH limit register or less than
the limit preset in a LOW limit register. The T_CRIT_A output responds as a true comparator with built in
hysteresis. The hysteresis is set by the value placed in the Hysteresis register (TH). Activation of T_CRIT_A
occurs when the temperature is above the T_CRIT setpoint. T_CRIT_A remains activated until the temperature
goes below the setpoint calculated by T_CRIT − TH. The hysteresis register impacts both the remote
temperature and local temperature readings.
The LM89 may be placed in a low power consumption (Shutdown) mode by setting the RUN/STOP bit found in
the Configuration register. In the Shutdown mode, the LM89's SMBus interface remains while all circuitry not
required is turned off.
The Local temperature reading and setpoint data registers are 8-bits wide. The format of the 11-bit remote
temperature data is a 16-bit left justified word. Two 8-bit registers, high and low bytes, are provided for each
setpoint as well as the temperature reading. Two offset registers (RTOLB and RTOHB) can be used to
compensate for nonideality error, discussed further in Diode Nonideality. The remote temperature reading
reported is adjusted by subtracting from or adding to the actual temperature reading the value placed in the
offset registers.

9.2 Functional Block Diagram

3.0V-3.6V

S ALERT
Fault Q
Queue
Temperature 10-Bit Plus Sign Programable
Sensor '-6 Level R
Circuitry Converter Filter
Fault
Queue
D+ Local/Remote
D- Diode Selector
Fault T_Crit_A
Queue

Control Logic Local/Remote HIGH LOW T_CRIT Limit Configuration Conversion

One Shot Temperature Limit Limit & Hysteresis and Status Rate
Register Registers Registers Registers Registers Registers Registers
Remote Offset Two-Wire Serial SMBData
Registers Interface SMBClock

9.3 Feature Description

9.3.1 Conversion Sequence
The LM89 takes approximately 31.25 ms to convert the Local Temperature (LT), Remote Temperature (RT), and
to update all of its registers. Only during the conversion process the busy bit (D7) in the Status register (02h) is
high. These conversions are addressed in a round robin sequence. The conversion rate may be modified by the
Conversion Rate Register (04h). When the conversion rate is modified a delay is inserted between conversions,
the actual conversion time remains at 31.25 ms. Different conversion rates will cause the LM89 to draw different
amounts of supply current as shown in Figure 4.

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Feature Description (continued)

2000

1800

SUPPLY CURRENT (PA

1600
140
0
1200

1000

800

600

400
0.01 0.1 1.0 10 100

CONVERSION RATE (Hz)

Figure 4. Conversion Rate Effect On Power Supply Current

9.3.2 The ALERT Output

The LM89's ALERT pin is an active-low open-drain output that is triggered by a temperature conversion that is
outside the limits defined by the temperature setpoint registers. Reset of the ALERT output is dependent upon
the selected method of use. The LM89's ALERT pin is versatile and will accommodate three different methods of
use to best serve the system designer: as a temperature comparator, as a temperature based interrupt flag, and
as part of an SMBus ALERT system. The three methods of use are further described below. The ALERT and
interrupt methods are different only in how the user interacts with the LM89.
Each temperature reading (LT and RT) is associated with a T_CRIT setpoint register (LCS, RCS), a HIGH
setpoint register (LHS and RHS) and a LOW setpoint register (LLS and RLS). At the end of every temperature
reading, a digital comparison determines whether that reading is above its HIGH or T_CRIT setpoint or below its
LOW setpoint. If so, the corresponding bit in the STATUS REGISTER is set. If the ALERT mask bit is not high,
any bit set in the STATUS REGISTER, with the exception of Busy (D7) and OPEN (D2), will cause the ALERT
output to be pulled low. Any temperature conversion that is out of the limits defined by the temperature setpoint
registers will trigger an ALERT. Additionally, the ALERT mask bit in the Configuration register must be cleared to
trigger an ALERT in all modes.

9.3.2.1 ALERT Output As A Temperature Comparator

When the LM89 is implemented in a system in which it is not serviced by an interrupt routine, the ALERT output
could be used as a temperature comparator. Under this method of use, once the condition that triggered the
ALERT to go low is no longer present, the ALERT is de-asserted (Figure 5). For example, if the ALERT output
was activated by the comparison of LT > LHS, when this condition is no longer true the ALERT will return HIGH.
This mode allows operation without software intervention, once all registers are configured during set-up. In order
for the ALERT to be used as a temperature comparator, bit D0 (the ALERT configure bit) in the FILTER and
ALERT CONFIGURE REGISTER (BFh) must be set high. This is not the power-on-default state.

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Feature Description (continued)

Remote High Limit

TEMPERATURE
RDTS Measurement

LM89 ALERT Pin

Status Register: RTDS High

TIME

Figure 5. ALERT Comparator Temperature Response Diagram

9.3.2.2 ALERT Output As An Interrupt

The LM89's ALERT output can be implemented as a simple interrupt signal when it is used to trigger an interrupt
service routine. In such systems it is undesirable for the interrupt flag to repeatedly trigger during or before the
interrupt service routine has been completed. Under this method of operation, during a read of the STATUS
REGISTER the LM89 will set the ALERT mask bit (D7 of the Configuration register) if any bit in the STATUS
REGISTER is set, with the exception of Busy (D7) and OPEN (D2). This prevents further ALERT triggering until
the master has reset the ALERT mask bit, at the end of the interrupt service routine. The STATUS REGISTER
bits are cleared only upon a read command from the master (see Figure 6) and will be re-asserted at the end of
the next conversion if the triggering condition(s) persist(s). In order for the ALERT to be used as a dedicated
interrupt signal, bit D0 (the ALERT configure bit) in the FILTER and ALERT CONFIGURE REGISTER (BFh)
must be set low. This is the power-on-default state.
The following sequence describes the response of a system that uses the ALERT output pin as a interrupt flag:
1. Master Senses ALERT low
2. Master reads the LM89 STATUS REGISTER to determine what caused the ALERT
3. LM89 clears STATUS REGISTER, resets the ALERT HIGH and sets the ALERT mask bit (D7 in the
Configuration register).
4. Master attends to conditions that caused the ALERT to be triggered. The fan is started, setpoint limits are
adjusted, etc.
5. Master resets the ALERT mask (D7 in the Configuration register).

RDTS Measurement
Remote High Limit
TEMPERATURE

LM89 ALERT pin

ALERT mask set in
response to reading of
status register by
master

End of Temperature
conversion
Status Register: RTDS High
TIME

Figure 6. ALERT Output As An Interrupt Temperature Response Diagram

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Feature Description (continued)

9.3.2.3 ALERT Output As An SMBus Alert
When the ALERT output is connected to one or more ALERT outputs of other SMBus compatible devices and to
a master, an SMBus alert line is created. Under this implementation, the LM89's ALERT should be operated
using the ARA (Alert Response Address) protocol. The SMBus 2.0 ARA protocol, defined in the SMBus
specification 2.0, is a procedure designed to assist the master in resolving which part generated an interrupt and
service that interrupt while impeding system operation as little as possible.
The SMBus alert line is connected to the open-drain ports of all devices on the bus thereby AND'ing them
together. The ARA is a method by which with one command the SMBus master may identify which part is pulling
the SMBus alert line LOW and prevent it from pulling it LOW again for the same triggering condition. When an
ARA command is received by all devices on the bus, the devices pulling the SMBus alert line LOW, first, send
their address to the master and second, release the SMBus alert line after recognizing a successful transmission
of their address.
The SMBus 1.1 and 2.0 specification state that in response to an ARA (Alert Response Address) “after
acknowledging the slave address the device must disengage its SMBALERT pulldown”. Furthermore, “if the host
still sees SMBALERT low when the message transfer is complete, it knows to read the ARA again”. This SMBus
“disengaging of SMBALERT” requirement prevents locking up the SMBus alert line. Competitive parts may
address this “disengaging of SMBALERT” requirement differently than the LM89 or not at all. SMBus systems
that implement the ARA protocol as suggested for the LM89 will be fully compatible with all competitive parts.
The LM89 fulfills “disengaging of SMBALERT” by setting the ALERT mask bit (bit D7 in the Configuration
register, at address 09h) after successfully sending out its address in response to an ARA and releasing the
ALERT output pin. Once the ALERT mask bit is activated, the ALERT output pin will be disabled until enabled by
software. In order to enable the ALERT the master must read the STATUS REGISTER, at address 02h, during
the interrupt service routine and then reset the ALERT mask bit in the Configuration register to 0 at the end of
the interrupt service routine.
The following sequence describes the ARA response protocol.
1. Master Senses SMBus alert line low
2. Master sends a START followed by the Alert Response Address (ARA) with a Read Command.
3. Alerting Device(s) send ACK.
4. Alerting Device(s) send their Address. While transmitting their address, alerting devices sense whether their
address has been transmitted correctly. (The LM89 will reset its ALERT output and set the ALERT mask bit
once its complete address has been transmitted successfully.)
5. Master/slave NoACK
6. Master sends STOP
7. Master attends to conditions that caused the ALERT to be triggered. The STATUS REGISTER is read and
fan started, setpoint limits adjusted, etc.
8. Master resets the ALERT mask (D7 in the Configuration register).
The ARA, 000 1100, is a general call address. No device should ever be assigned this address.
Bit D0 (the ALERT configure bit) in the FILTER and ALERT CONFIGURE REGISTER (BFh) must be set low in
order for the LM89 to respond to the ARA command.
The ALERT output can be disabled by setting the ALERT mask bit, D7, of the Configuration register. The power-
on-default is to have the ALERT mask bit and the ALERT configure bit low.

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Feature Description (continued)

Remote High Limit

TEMPERATURE
RDTS Measurement
LM89 ALERT pin

ALERT mask set in

response to ARA
from master

Status Register: RTDS High

TIME

Figure 7. ALERT Output As An Smbus Alert Temperature Response Diagram

9.3.3 T_CRIT_A Output And T_CRIT Limit

T_CRIT_A is activated when any temperature reading is greater than the limit preset in the critical temperature
setpoint register (T_CRIT), as shown in Figure 8. The Status Register can be read to determine which event
caused the alarm. A bit in the Status Register is set high to indicate which temperature reading exceeded the
T_CRIT setpoint temperature and caused the alarm, see Status Register (SR).
Local and remote temperature diodes are sampled in sequence by the A/D converter. The T_CRIT_A output and
the Status Register flags are updated after every Local and Remote temperature conversion. T_CRT_A follows
the state of the comparison, it is reset when the temperature falls below the setpoint RCS-TH. The Status
Register flags are reset only after the Status Register is read and if a temperature conversion(s) is/are below the
T_CRIT setpoint, as shown in Figure 8.

Figure 8. T_CRIT_A Temperature Response Diagram

9.3.4 Smbus Interface

The LM89 operates as a slave on the SMBus, so the SMBCLK line is an input and the SMBData line is bi-
directional. The LM89 never drives the SMBCLK line and it does not support clock stretching. According to
SMBus specifications, the LM89 has a 7-bit slave address. All bits A6 through A0 are internally programmed and
can not be changed by software or hardware. The LM89 and LM89-1 versions have the following SMBus slave
addresses:

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Version A6 A5 A4 A3 A2 A1 A0
LM89CIM, LM89CIMM 1 0 0 1 1 0 0
LM89-1CIMM, LM89- 1 0 0 1 1 0 1
1DIMM

9.3.5 Temperature Data Format

Temperature data can only be read from the Local and Remote Temperature registers; the setpoint registers
(T_CRIT, LOW, HIGH) are read/write.
Remote temperature data is represented by an 11-bit, two's complement word with an LSB (Least Significant Bit)
equal to 0.125°C. The data format is a left justified 16-bit word available in two 8-bit registers:

Temperature Digital Output

Binary Hex
+125°C 0111 1101 0000 0000 7D00h
+25°C 0001 1001 0000 0000 1900h
+1°C 0000 0001 0000 0000 0100h
+0.125°C 0000 0000 0010 0000 0020h
0°C 0000 0000 0000 0000 0000h
−0.125°C 1111 1111 1110 0000 FFE0h
−1°C 1111 1111 0000 0000 FF00h
−25°C 1110 0111 0000 0000 E700h
−55°C 1100 1001 0000 0000 C900h

Local Temperature data is represented by an 8-bit, two's complement byte with an LSB (Least Significant Bit)
equal to 1°C:

Temperature Digital Output

Binary Hex
+125°C 0111 1101 7Dh
+25°C 0001 1001 19h
+1°C 0000 0001 01h
0°C 0000 0000 00h
−1°C 1111 1111 FFh
−25°C 1110 0111 E7h
−55°C 1100 1001 C9h

9.3.6 Open-Drain Outputs

The SMBData, ALERT and T_CRIT_A outputs are open-drain outputs and do not have internal pull-ups. A “high”
level will not be observed on these pins until pull-up current is provided by some external source, typically a pull-
up resistor. Choice of resistor value depends on many system factors but, in general, the pull-up resistor should
be as large as possible. This will minimize any internal temperature reading errors due to internal heating of the
LM89. The maximum resistance of the pull-up to provide a 2.1V high level, based on LM89 specification for High
Level Output Current with the supply voltage at 3.0V, is 82kΩ(5%) or 88.7kΩ(1%).

9.3.7 Diode Fault Detection

The LM89 is equipped with operational circuitry designed to detect fault conditions concerning the remote diode.
In the event that the D+ pin is detected as shorted to VDD or floating, the Remote Temperature High Byte (RTHB)
register is loaded with +127°C, the Remote Temperature Low Byte (RTLB) register is loaded with 0, and the
OPEN bit (D2) in the status register is set. As a result, if the Remote T_CRIT setpoint register (RCS) is set to a
value less than +127°C the ALERT and T_Crit output pins will be pulled low, if the Alert Mask and T_Crit Mask
are disabled. If the Remote HIGH Setpoint High Byte Register (RHSHB) is set to a value less than +127°C then
ALERT will be pulled low, if the Alert Mask is disabled. The OPEN bit itself will not trigger and ALERT.

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In the event that the D+ pin is shorted to ground or D−, the Remote Temperature High Byte (RTHB) register is
loaded with −128°C (1000 0000) and the OPEN bit (D2) in the status register will not be set. Since operating the
LM89 at −128°C is beyond it's operational limits, this temperature reading represents this shorted fault condition.
If the value in the Remote Low Setpoint High Byte Register (RLSHB) is more than −128°C and the Alert Mask is
disabled, ALERT will be pulled low.
Remote diode temperature sensors that have been previously released and are competitive with the LM89 output
a code of 0°C if the external diode is short-circuited. This change is an improvement that allows a reading of 0°C
to be truly interpreted as a genuine 0°C reading and not a fault condition.

9.3.8 Communicating With The LM89

The data registers in the LM89 are selected by the Command Register. At power-up the Command Register is
set to “00”, the location for the Read Local Temperature Register. The Command Register latches the last
location it was set to. Each data register in the LM89 falls into one of four types of user accessibility:
1. Read only
2. Write only
3. Read/Write same address
4. Read/Write different address
A Write to the LM89 will always include the address byte and the command byte. A write to any register requires
one data byte.
Reading the LM89 can take place either of two ways:
1. If the location latched in the Command Register is correct (most of the time it is expected that the Command
Register will point to one of the Read Temperature Registers because that will be the data most frequently
read from the LM89), then the read can simply consist of an address byte, followed by retrieving the data
byte.
2. If the Command Register needs to be set, then an address byte, command byte, repeat start, and another
address byte will accomplish a read.
The data byte has the most significant bit first. At the end of a read, the LM89 can accept either acknowledge or
No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master has
read its last byte). It takes the LM89 31.25 ms to measure the temperature of the remote diode and internal
diode. When retrieving all 11 bits from a previous remote diode temperature measurement, the master must
insure that all 11 bits are from the same temperature conversion. This may be achieved by reading the MSB
(most significant byte first) followed by the LSB (least significant byte). Reading the MSB first will lock the LSB,
thus synchronizing the two bytes. One-shot mode can also be used without any restrictions on the MSB and LSB
reading sequence.

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9.3.8.1 SMBus Timing Diagrams

Figure 9. LM89 Timing Diagram

(A) Serial Bus Write To The Internal Command Register Followed By A The Data Byte

Figure 10. LM89 Timing Diagram

(B) Serial Bus Write To The Internal Command Register

1 9 1 9
SMBCLK
SMBDat
A6 A5 A4 A3 A2 A1 A0 R/W D7 D6 D5 D4 D3 D2 D1 D0
a
Start Ack No Ack Stop
by Address byte. by by by
Master LM89 Master Master

Frame 1 Frame 2
Serial Bus Address Byte Data Byte from the LM89

Figure 11. LM89 Timing Diagram

(C) Serial Bus Read From A Register With The Internal Command Register Preset To Desired Value

9.3.9 Serial Interface Reset

In the event that the SMBus Master is RESET while the LM89 is transmitting on the SMBData line, the LM89
must be returned to a known state in the communication protocol. This may be done in one of two ways:
1. When SMBData is LOW, the LM89 SMBus state machine resets to the SMBus idle state if either SMBData
or SMBCLK are held low for more than 35 ms (tTIMEOUT). Note that according to SMBus specification 2.0 all
devices are to timeout when either the SMBCLK or SMBData lines are held low for 25-35 ms. Therefore, to
insure a timeout of all devices on the bus the SMBCLK or SMBData lines must be held low for at least 35
ms.
2. When SMBData is HIGH, have the master initiate an SMBus start. The LM89 will respond properly to an

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SMBus start condition at any point during the communication. After the start the LM89 will expect an SMBus
address byte.

9.3.10 Digital Filter

In order to suppress erroneous remote temperature readings due to noise, the LM89 incorporates a user-
configured digital filter. The filter is accessed in the FILTER and ALERT CONFIGURE REGISTER at BFh. The
filter can be set according to the following table.

D2 D1 Filter
0 0 No Filter
0 1 Level 1
1 0 Level 1
1 1 Level 2

Level 2 sets maximum filtering.

Figure 13 depicts the filter output in response to a step input and an impulse input. Figure 14 depicts the digital
filter in use in a Pentium 4 processor system. Note that the two curves, with filter and without, have been
purposely offset so that both responses can be clearly seen. Inserting the filter does not induce an offset as
shown.

Figure 12. Filter Output Response To A Step Input Figure 13. Filter Output Response To A Step Input
A) Step Response B) Impulse Response

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45
LM89
43 with
Filter Off
41

TEMPERATURE (oC)
39
37
35 LM89
with
33
Filter On
31
29
27
25
0 50 100 150 200
SAMPLE NUMBER

A. The filter on and off curves were purposely offset to better show noise performance.

Figure 14. Digital Filter Response In A Pentium 4 Processor System

9.3.11 Fault Queue

In order to suppress erroneous ALERT or T_CRIT triggering the LM89 incorporates a Fault Queue. The Fault
Queue acts to insure a remote temperature measurement is genuinely beyond a HIGH, LOW or T_CRIT setpoint
by not triggering until three consecutive out of limit measurements have been made, see Figure 15. The fault
queue defaults off upon power-up and may be activated by setting bit D0 in the Configuration register (09h) to
“1”.
TEMPERATURE

RDTS Measurement

Status Register: RTDS High

n n+1 n+2 n+3 n+4 n+5

SAMPLE NUMBER

Figure 15. Fault Queue Temperature Response Diagram

9.3.12 One-Shot Register

The One-Shot register is used to initiate a single conversion and comparison cycle when the device is in standby
mode, after which the device returns to standby. This is not a data register and it is the write operation that
causes the one-shot conversion. The data written to this address is irrelevant and is not stored. A zero will
always be read from this register.

9.4 Device Functional Modes

9.4.1 Power-On-Default States
LM89 always powers up to these known default states. The LM89 remains in these states until after the first
conversion.
1. Command Register set to 00h

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Device Functional Modes (continued)

2. Local Temperature set to 0°C
3. Remote Diode Temperature set to 0°C until the end of the first conversion.
4. Status Register set to 00h.
5. Configuration register set to 00h; ALERT enabled, Remote T_CRIT alarm enabled and Local T_CRIT alarm
enabled
6. 85°C Local T_CRIT temperature setpoint for LM89C and LM89-1C; 105°C Local T_CRIT temperature
setpoint for LM89-1D
7. 110°C Remote T_CRIT temperature setpoint
8. 70°C Local and Remote HIGH temperature setpoints
9. 0°C Local and Remote LOW temperature setpoints
10. Filter and Alert Configure Register set to 00h; filter disabled, ALERT output set as an SMBus ALERT
11. Conversion Rate Register set to 8h; conversion rate set to 16 conv./sec.

9.5 Programming

9.6 Register Maps

9.6.1 Command Register
Selects which registers will be read from or written to. Data for this register should be transmitted during the
Command Byte of the SMBus write communication.

P7 P6 P5 P4 P3 P2 P1 P0
Command Select

P0-P7: Command Select

Command Select Address Power-On-Default State Register Register Function

Name
Read Address Write Address <D7:D0> binary <D7:D0>
<P7:P0> hex <P7:P0> hex decimal
00h NA 0000 0000 0 LT Local Temperature
01h NA 0000 0000 0 RTHB Remote Temperature High Byte
02h NA 0000 0000 0 SR Status Register
03h 09h 0000 0000 0 C Configuration
04h 0Ah 0000 1000 8 (16 CR Conversion Rate
conv./sec)
05h 0Bh 0100 0110 70 LHS Local HIGH Setpoint
06h 0Ch 0000 0000 0 LLS Local LOW Setpoint
07h 0Dh 0100 0110 70 RHSHB Remote HIGH Setpoint High Byte
08h 0Eh 0000 0000 0 RLSHB Remote LOW Setpoint High Byte
NA 0Fh One Shot Writing to this register will initiate a
one shot conversion
10h NA 0000 0000 0 RTLB Remote Temperature Low Byte
11h 11h 0000 0000 0 RTOHB Remote Temperature Offset High
Byte
12h 12h 0000 0000 0 RTOLB Remote Temperature Offset Low
Byte
13h 13h 0000 0000 0 RHSLB Remote HIGH Setpoint Low Byte
14h 14h 0000 0000 0 RLSLB Remote LOW Setpoint Low Byte
19h 19h 0110 1110 110 RCS Remote T_CRIT Setpoint
20h 20h LM89C 0101 0101 85 LCS Local T_CRIT Setpoint
LM89-1C 0101 0101 85
LM89-1D 0110 1001 105

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Command Select Address Power-On-Default State Register Register Function

Name
Read Address Write Address <D7:D0> binary <D7:D0>
<P7:P0> hex <P7:P0> hex decimal
21h 21h 0000 1010 10 TH T_CRIT Hysteresis
B0h-BEh B0h-BEh Manufacturers Test Registers
BFh BFh 0000 0000 0 RDTF Remote Diode Temperature Filter
FEh NA 0000 0001 1 RMID Read Manufacturer's ID
FFh NA LM89C 0011 0001 49 RDR Read Stepping or Die Revision Code
LM89-1C 0011 0100 52
LM89-1D 0011 0101 53

9.6.2 Local And Remote Temperature Registers (LT, RTHB, RTLB)

Table 2. Local And Remote Temperature Registers (LT, RTHB) (Read Only Address 00h, 01h):
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value SIGN 64 32 16 8 4 2 1

For LT and RTHB D7–D0: Temperature Data. LSB = 1°C. Two's complement format.

Table 3. Local And Remote Temperature Registers (RTLB) (Read Only Address 10h):
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value 0.5 0.25 0.125 0 0 0 0 0

For RTLB D7–D5: Temperature Data. LSB = 0.125°C. Two's complement format.
The maximum value available from the Local Temperature register is 127; the minimum value available from the
Local Temperature register is -128. The maximum value available from the Remote Temperature register is
127.875; the minimum value available from the Remote Temperature registers is −128.875.

9.6.3 Status Register (SR)

Table 4. Status Register (SR) (Read Only Address 02h):

Bit D7 D6 D5 D4 D3 D2 D1 D0
Value Busy LHIGH LLOW RHIGH RLOW OPEN RCRIT LCRIT

Power up default is with all bits “0” (zero).

D7: Busy: When set to “1” ADC is busy converting.
D6: LHIGH: When set to “1” indicates a Local HIGH Temperature alarm.
D5: LLOW: When set to “1” indicates a Local LOW Temperature alarm.
D4: RHIGH: When set to “1” indicates a Remote Diode HIGH Temperature alarm.
D3: RLOW: When set to “1” indicates a Remote Diode LOW Temperature alarm
D2: OPEN: When set to “1” indicates a Remote Diode disconnect.
D1: RCRIT: When set to “1” indicates a Remote Diode Critical Temperature alarm.
D0: LCRIT: When set to “1” indicates a Local Critical Temperature alarm.

9.6.4 Configuration Register

Table 5. Configuration Register (Read Address 03h /Write Address 09h):

Bit D7 D6 D5 D4 D3 D2 D1 D0
Value ALERT mask RUN/STOP 0 Remote 0 Local 0 Fault Queue
T_CRIT_A T_CRIT_A
mask mask

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Power up default is with all bits “0” (zero)

D7: ALERT mask: When set to “1” ALERT interrupts are masked.
D6: RUN/STOP: When set to “1” SHUTDOWN is enabled.
D5: is not defined and defaults to “0”.
D4: Remote T_CRIT mask: When set to “1” a diode temperature reading that exceeds T_CRIT setpoint will not
activate the T_CRIT_A pin.
D3: is not defined and defaults to “0”.
D2: Local T_CRIT mask: When set to “1” a Local temperature reading that exceeds T_CRIT setpoint will not
activate the T_CRIT_A pin.
D1: is not defined and defaults to “0”.
D0: Fault Queue: when set to “1” three consecutive remote temperature measurements outside the HIGH, LOW,
or T_CRIT setpoints will trigger an “Outside Limit” condition resulting in setting of status bits and associated
output pins..

9.6.5 Conversion Rate Register

Table 6. Conversion Rate Register (Read Address 04h

/Write Address 0Ah)
Value Conversion Rate
00 62.5 mHz
01 125 mHz
02 250 mHz
03 500 mHz
04 1 Hz
05 2 Hz
06 4 Hz
07 8 Hz
08 16 Hz
09 32 Hz
10-255 Undefined

9.6.6 Local And Remote High Setpoint Registers (LHS, RHSHB, And RHSLB)

Table 7. Local And Remote High Setpoint Registers (LHS, RHSHB) (Read Address 05h, 07h /Write
Address 0Bh, 0Dh):
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value SIGN 64 32 16 8 4 2 1

For LHS and RHSHB: HIGH setpoint temperature data. Power up default is LHIGH = RHIGH = 70°C. 1 LSB =
1°C. Two's complement format.

Table 8. Local And Remote High Setpoint Registers (RHSLB) (Read/Write Address 13h):
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value 0.5 0.25 0.125 0 0 0 0 0

For RHSLB: Remote HIGH Setpoint Low Byte temperature data. Power up default is 0°C. 1 LSB = 0.125°C.
Two's complement format.

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9.6.7 Local And Remote Low Setpoint Registers (LLS, RLSHB, And RLSLB)

Table 9. Local And Remote Low Setpoint Registers (LLS, RLSHB) (Read Address 06h, 08h, /Write
Address 0Ch, 0Eh):
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value SIGN 64 32 16 8 4 2 1

For LLS and RLSHB: HIGH setpoint temperature data. Power up default is LHIGH = RHIGH = 0°C. 1 LSB = 1°C.
Two's complement format.

Table 10. Local And Remote Low Setpoint Registers (RLSLB) (Read/Write Address 14h):
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value 0.5 0.25 0.125 0 0 0 0 0

For RLSLB: Remote HIGH Setpoint Low Byte temperature data. Power up default is 0°C. 1 LSB = 0.125°C.
Two's complement format.

9.6.8 Remote Temperature Offset Registers (RTOHB And RTOLB)

Table 11. Remote Temperature Offset Registers (RTOHB)(Read/Write Address 11h):

BIT D7 D6 D5 D4 D3 D2 D1 D0
Value SIGN 64 32 16 8 4 2 1

For RTOHB: Remote Temperature Offset High Byte. Power up default is LHIGH = RHIGH = 0°C. 1 LSB = 1°C.
Two's complement format.

Table 12. Remote Temperature Offset Registers (RTOLB) (Read/Write Address 12h):
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value 0.5 0.25 0.125 0 0 0 0 0

For RTOLB: Remote Temperature Offset High Byte. Power up default is 0°C. 1 LSB = 0.125°C. Two's
complement format.
The offset value written to these registers will automatically be added to or subtracted from the remote
temperature measurement that will be reported in the Remote Temperature registers.

9.6.9 Local And Remote T_crit Registers (RCS And LCS)

Table 13. Local And Remote T_CRIT Registers (RCS And LCS) (Read/Write Address 20h, 19h):
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value SIGN 64 32 16 8 4 2 1

D7–D0: T_CRIT setpoint temperature data. Power up default is Local T_CRIT = 85°C (LM89C and LM89-1C) or
105°C (LM89-1D), and Remote T_CRIT=110°C. 1 LSB = 1°C, two's complement format.

9.6.10 T_CRIT Hysteresis Register (TH)

Table 14. T_CRIT Hysteresis Register (TH) (Read And Write Address 21h):
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value 16 8 4 2 1

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D7–D0: T_CRIT Hysteresis temperature. Power up default is TH = 10°C. 1 LSB = 1°C, maximum value = 31.

9.6.11 Filter And Alert Configure Register

Table 15. Filter And Alert Configure Register (Read And Write Address BFh):
BIT D7 D6 D5 D4 D3 D2 D1 D0
Value 0 0 0 0 0 Filter Level ALERT Configure

D7-D3: is not defined defaults to "0".

D2-D1: input filter setting as defined the table below:

D2 D1 Filter Level
0 0 No Filter
0 1 Level 1
1 0 Level 1
1 1 Level 2

Level 2 sets maximum filtering.

D0: when set to "1" comparator mode is enabled.

9.6.12 Manufacturers Id Register

(Read Address FEh) The default value is 01h.

9.6.13 Die Revision Code Register

(Read Address FFh) The LM89C version has a default value of 31h or 49 decimal. The LM89-1C version has a
default value of 34h or 52 decimal. The LM89-1D has a default value of 35h or 53 decimal. This register will
increment by 1 every time there is a revision to the die by Texas Instruments.

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10 Application and Implementation

10.1 Application Information
The LM89 can be applied easily in the same way as other integrated-circuit temperature sensors, and its remote
diode sensing capability allows it to be used in new ways as well. It can be soldered to a printed circuit board,
and because the path of best thermal conductivity is between the die and the pins, its temperature will effectively
be that of the printed circuit board lands and traces soldered to the LM89's pins. This presumes that the ambient
air temperature is almost the same as the surface temperature of the printed circuit board; if the air temperature
is much higher or lower than the surface temperature, the actual temperature of the LM89 die will be at an
intermediate temperature between the surface and air temperatures. Again, the primary thermal conduction path
is through the leads, so the circuit board temperature will contribute to the die temperature much more strongly
than will the air temperature.
To measure temperature external to the LM89's die, use a remote diode. This diode can be located on the die of
a target IC, allowing measurement of the IC's temperature, independent of the LM89's temperature.

10.2 Typical Application

The LM89 has been optimized to measure the remote thermal diode of a 0.13 micron Pentium 4, a Mobile
Pentium 4 Processor-M processor or other embedded thermal diodes that have similar characteristics. A discrete
diode can also be used to sense the temperature of external objects or ambient air. Remember that a discrete
diode's temperature will be affected, and often dominated, by the temperature of its leads. Most silicon diodes do
not lend themselves well to this application. It is recommended that a MMBT3904 transistor base emitter junction
be used with the collector tied to the base (diode-connected).
An LM89 with a diode-connected MMBT3904 will have a typical -1°C offset.
T2N3904 = TLM89 +1°C

Main Power Supply

Core Voltage Shutdown Control

3.3V derived
from Aux.
Supply

T_CRIT_A

D+
MCU/
GPU/
LM89 SMBus
2.2nF*
ASIC/ D- SMBData Master
SMBCLK
FPGA ALERT

*Note: 2.2nF capacitor must be placed as close as possible to D+ and D- pins of the LM89.

10.2.1 Design Requirements

10.2.1.1 Diode Nonideality

10.2.1.1.1 Diode Nonideality Factor Effect On Accuracy

When a transistor is connected as a diode, the following relationship holds for variables VBE, T and If:

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Typical Application (continued)

Vbe
KVt
IF = IS e -1

where (1)
Vt = kqT

where
• q = 1.6×10−19 Coulombs (the electron charge),
• T = Absolute Temperature in Kelvin
• k = 1.38×10−23joules/K (Boltzmann's constant),
• η is the nonideality factor of the process the diode is manufactured on,
• IS = Saturation Current and is process dependent,
• If= Forward Current through the base emitter junction
• VBE = Base Emitter Voltage drop (2)
In the active region, the -1 term is negligible and may be eliminated, yielding the following equation
Vbe
KVt
IF = IS e (3)
In the above equation, η and IS are dependant upon the process that was used in the fabrication of the particular
diode. By forcing two currents with a very controlled ratio (N) and measuring the resulting voltage difference, it is
possible to eliminate the IS term. Solving for the forward voltage difference yields the relationship:
Vbe = K kqT ln (N)
(4)
The voltage seen by the LM89 also includes the IFRS voltage drop of the series resistance. The nonideality
factor, η, is the only other parameter not accounted for and depends on the diode that is used for measurement.
Since ΔVBE is proportional to both η and T, the variations in η cannot be distinguished from variations in
temperature. Since the nonideality factor is not controlled by the temperature sensor, it will directly add to the
inaccuracy of the sensor. For the Pentium 4 and Mobile Pentium Processor-M Intel specifies a ±0.1% variation in
η from part to part. As an example, assume a temperature sensor has an accuracy specification of ±1°C at room
temperature of 25 °C and the process used to manufacture the diode has a nonideality variation of ±0.1%. The
resulting accuracy of the temperature sensor at room temperature will be:
TACC = ± 1°C + (±0.1% of 298 °K) = ±1.4 °C (5)
The additional inaccuracy in the temperature measurement caused by η, can be eliminated if each temperature
sensor is calibrated with the remote diode that it will be paired with.

Processor Family η, nonideality

MIN TYP MAX
Pentium III CPUID 67h 1 1.0065 1.0125
Pentium III CPUID 68h/PGA370Socket/Celeron 1.0057 1.008 1.0125
Pentium 4, 423 pin 0.9933 1.0045 1.0368
Pentium 4, 478 pin 0.9933 1.0045 1.0368
0.13 micron, Pentium 4 1.0011 1.0021 1.0030
MMBT3904 1.003
AMD Athlon MP model 6 1.002 1.008 1.016

Copyright © 2002–2014, Texas Instruments Incorporated Submit Documentation Feedback 25

Product Folder Links: LM89
LM89
SNIS128D – AUGUST 2002 – REVISED JUNE 2014 www.ti.com

10.2.2 Detailed Design Procedure

10.2.2.1 Compensating For Diode Nonideality

In order to compensate for the errors introduced by nonideality, the temperature sensor is calibrated for a
particular processor. The LM89 is calibrated for the nonideality of a 0.13 micron, Mobile Pentium 4, 1.0021.
When a temperature sensor calibrated for a particular processor type is used with a different processor type or a
given processor type has a nonideality that strays from the typical, errors are introduced.
Temperature errors associated with nonideality may be reduced in a specific temperature range of concern
through use of the offset registers (11h and 12h).

10.2.3 Application Curves

LM89 is connected to diode-connected MMBT3904.

2N3904 and LM89 junction temperatures are equivalent during
test.

Figure 16. Local Temperature Accuracy Figure 17. Remote Temperature Accuracy

10.3 Do's and Don'ts

Noise coupling into the digital lines greater than 400mVp-p (typical hysteresis) and undershoot less than 500mV
below GND, may prevent successful SMBus communication with the LM89. SMBus no acknowledge is the most
common symptom, causing unnecessary traffic on the bus. Although the SMBus maximum frequency of
communication is rather low (100kHz max), care still needs to be taken to ensure proper termination within a
system with multiple parts on the bus and long printed circuit board traces. An RC lowpass filter with a 3db
corner frequency of about 40MHz is included on the LM89's SMBCLK input. Additional resistance can be added
in series with the SMBData and SMBCLK lines to further help filter noise and ringing. Minimize noise coupling by
keeping digital traces out of switching power supply areas as well as ensuring that digital lines containing high
speed data communications cross at right angles to the SMBData and SMBCLK lines.

26 Submit Documentation Feedback Copyright © 2002–2014, Texas Instruments Incorporated

Product Folder Links: LM89

 LM89
www.ti.com SNIS128D – AUGUST 2002 – REVISED JUNE 2014

11 Power Supply Recommendations

VDD should be bypassed with a 0.1µF capacitor in parallel with 100pF. The 100pF capacitor should be placed as
close as possible to the power supply pin. A bulk capacitance of approximately 10µF needs to be in the near
vicinity of the LM89. The ideal place to connect the LM89's GND pin is as close as possible to the Processors
GND associated with the sense diode.

Copyright © 2002–2014, Texas Instruments Incorporated Submit Documentation Feedback 27

Product Folder Links: LM89
LM89
SNIS128D – AUGUST 2002 – REVISED JUNE 2014 www.ti.com

12 Layout

12.1 Layout Guidelines

In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced
on traces running between the remote temperature diode sensor and the LM89 can cause temperature
conversion errors. Keep in mind that the signal level the LM89 is trying to measure is in microvolts. The following
guidelines should be followed:
1. VDD should be bypassed with a 0.1µF capacitor in parallel with 100pF. The 100pF capacitor should be placed
as close as possible to the power supply pin. A bulk capacitance of approximately 10µF needs to be in the
near vicinity of the LM89.
2. A 2.2nF diode bypass capacitor is required to filter high frequency noise. Place the 2.2nF capacitor as close
as possible to the LM89's D+ and D− pins. Make sure the traces to the 2.2nF capacitor are matched.
3. Ideally, the LM89 should be placed within 10cm of the Processor diode pins with the traces being as straight,
short and identical as possible. Trace resistance of 1Ω can cause as much as 1°C of error. This error can be
compensated by using the Remote Temperature Offset Registers, since the value placed in these registers
will automatically be subtracted from or added to the remote temperature reading.
4. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This
GND guard should not be between the D+ and D− lines. In the event that noise does couple to the diode
lines it would be ideal if it is coupled common mode. That is equally to the D+ and D− lines.
5. Avoid routing diode traces in close proximity to power supply switching or filtering inductors.
6. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be
kept at least 2cm apart from the high speed digital traces.
7. If it is necessary to cross high speed digital traces, the diode traces and the high speed digital traces should
cross at a 90 degree angle.
8. The ideal place to connect the LM89's GND pin is as close as possible to the Processors GND associated
with the sense diode.
9. Leakage current between D+ and GND should be kept to a minimum. One nanoampere of leakage can
cause as much as 1°C of error in the diode temperature reading. Keeping the printed circuit board as clean
as possible will minimize leakage current.

12.2 Layout Example

Figure 18. Ideal Diode Trace Layout

28 Submit Documentation Feedback Copyright © 2002–2014, Texas Instruments Incorporated

Product Folder Links: LM89

 LM89
www.ti.com SNIS128D – AUGUST 2002 – REVISED JUNE 2014

13 Device and Documentation Support

13.1 Trademarks
All trademarks are the property of their respective owners.
13.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

13.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Copyright © 2002–2014, Texas Instruments Incorporated Submit Documentation Feedback 29

Product Folder Links: LM89
 PACKAGE OPTION ADDENDUM

www.ti.com 30-Jul-2024

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

LM89-1CIMM/NOPB OBSOLETE VSSOP DGK 8 TBD Call TI Call TI 0 to 125 T19C

LM89-1CIMMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 T19C Samples

LM89-1DIMM/NOPB OBSOLETE VSSOP DGK 8 TBD Call TI Call TI 0 to 125 T19D

LM89-1DIMMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 T19D Samples

LM89CIMM/NOPB OBSOLETE VSSOP DGK 8 TBD Call TI Call TI 0 to 125 T15C

LM89CIMMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 T15C Samples

LM89CIMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 LM89 Samples
CIM

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 30-Jul-2024

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 20-Feb-2024

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM89-1CIMMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LM89-1DIMMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LM89CIMMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LM89CIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 20-Feb-2024

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM89-1CIMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LM89-1DIMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LM89CIMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LM89CIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0

Pack Materials-Page 2
 PACKAGE OUTLINE
DGK0008A SCALE 4.000
VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE

C
5.05
TYP
A 4.75
0.1 C
PIN 1 INDEX AREA
SEATING
PLANE
6X 0.65
8
1

2X
3.1
1.95
2.9
NOTE 3

4
5 0.38
8X
0.25
3.1 0.13 C A B
B
2.9
NOTE 4

0.23
0.13

SEE DETAIL A
0.25
GAGE PLANE

1.1 MAX

0.7 0.15
0 -8 0.4 0.05
DETAIL A
A 20

TYPICAL

4214862/A 04/2023
PowerPAD is a trademark of Texas Instruments.
NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-187.

www.ti.com
 EXAMPLE BOARD LAYOUT
TM
DGK0008A VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE

SYMM
8X (1.4) (R0.05) TYP

8X (0.45) 1 8

SYMM

6X (0.65)
5
4

SEE DETAILS

(4.4)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE: 15X

SOLDER MASK METAL UNDER SOLDER MASK

METAL
OPENING SOLDER MASK OPENING

EXPOSED METAL EXPOSED METAL

0.05 MAX 0.05 MIN

ALL AROUND ALL AROUND

NON-SOLDER MASK SOLDER MASK

DEFINED DEFINED
(PREFERRED)
SOLDER MASK DETAILS
15.000

4214862/A 04/2023
NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
9. Size of metal pad may vary due to creepage requirement.

www.ti.com
 EXAMPLE STENCIL DESIGN
TM
DGK0008A VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE

SYMM

8X (1.4) (R0.05) TYP

8X (0.45) 1 8

SYMM

6X (0.65)
5
4

(4.4)

SOLDER PASTE EXAMPLE

SCALE: 15X

4214862/A 04/2023
NOTES: (continued)

11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
12. Board assembly site may have different recommendations for stencil design.

www.ti.com
 PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1

.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]

4X (0 -15 )

4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4

.005-.010 TYP
[0.13-0.25]

4X (0 -15 )

SEE DETAIL A
.010
[0.25]

.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.

www.ti.com
 EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:8X

SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK

EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55] SYMM

1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
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