Course: INTEGRATED ELECTRONICS
4. 555 Timer IC and its Applications
By
Dr. M Faraz
Lecturer
ENCD UET Taxila
Electronic Principles by Albert Malvino
The 555 Timer
• The NE555 (also LM555,CA555, and MC1455) is
widely used IC timer.
• Runs in either of two modes
• Monostable ( one stable state/one shot)
o Can produce accurate time delays from microseconds
to hours.
• Astable (no stable state)
o Can produce rectangular waves with a variable duty
cycle.
Monostable Operation
• Initially 555 timer has low output voltage at which
it can remain indefinitely.
• When it receives a trigger at point A in time, the
output voltage switches from low to high.
• The output returns to the low state after a time
delay of W.
• The output remains at low state until another
trigger arrives.
Monostable Operation
The other pins not shown here
are connected to external
components that determine
pulse width of the output.
Monostable Operation
• A multivibrator is a two state circuit that has zero,
one, or two stable output states.
• When 555 timer is used in the monostable mode it is
sometimes called the monostable multivibrator
because it has only one stable state (low state).
• The high state is not stable because the output
returns to the low state when the pulse (trigger) ends.
• The 555 timer is often referred to as a one-shot
multivibrator because it produces only one output
pulse for each input trigger.
• The duration of this output pulse can be precisely
controlled with an external resistor and capacitor.
Astable Operation
• When used in astable operation, the 555 timer
has no stable states.
• It cannot remain indefinitely in either state.
• It oscillates and produces rectangular output
signal, when operated in astable mode.
• No input trigger is needed to get an output.
• The 555 timer operated in astable mode is
sometimes called a free-running multivibrator.
Astable Operation
Pin-out Diagram and Purpose
https://www.engineersgarage.com/555-timer-ic-introduction-basics-working-with-different-operating-modes/
Pin-out Diagram and Purpose
https://www.electronicshub.org/understanding-555-timer/
Functional Block Diagram Pin2 For monostable
operation.
UTP= 2Vcc/3 Vtrig =1, Timer o/p =0
NPN
Volt from
outside Comparator 1
Vth
SR flip flop
For Vth > UTP, S =1 S = 1, Q = 1
R = 1, 𝑄ത = 1
For Vtrig < LTP
R =1
Comparator 2
Control o/p frequency Output voltage to 0
when operated in
Astable mode. LTP= Vcc/3 Usually connected to Vcc
Monostable Operation Initially Q =1
And capacitor C discharges to 0,
until the trigger arrives
UTP= 2Vcc/3
𝑄ത remains low until
trigger arrives
W=1.1RC
When trigger arrives
Vtrig < LTP 2Vcc/3 = 66.7% of Vcc
R =1 LTP= Vcc/3
Monostable Operation
To prevent noise from
interfering the operation in
monostable mode.
In summary, monostable 555 timer produces a single pulse whose width is
determined by the external R and C.
The pulse begins with the leading edge of the input trigger.
Example 1
Q. In fig above Vcc=12V R= 33KΩ and C=0.47µF.
What is the minimum trigger voltage that produces
the output pulse? What is the maximum capacitor
voltage? What is the width of the output pulse?
Example 1(contd)
Example 2
Q. What is the pulse width in fig. if R = 10 MΩ and
C = 470 µF?
Astable Operation
• In this mode 555 timer requires two external
resistors and one capacitor to set the frequency of
oscillations.
• The trip point are same as for monostable
operation.
UTP= 2Vcc/3 LTP= Vcc/3
• When Q is low the transistor is cutoff and the
capacitor charging through a total resistance of:
R1 + R 2
Charging Time constant = C(R1 + R2)
Discharging Time Constant = R2C
Astable Operation
For Q = 0
When
Vth > 2Vcc/3,
C discharges
Through R2
Discharging
Time constant is
R2C
When Vth < Vcc/3
Charging time constant > discharging time constant
Astable Operation
Capacitor and output waveform for astable operation.
𝑅1+𝑅2
Pulse Width = W = 0.693(R1 + R2)C Duty Cycle = D=
𝑅1+2𝑅2
Time Period of Output = T= 0.693(R1 + 2R2)C 1.44
f=
𝑅1 + 2𝑅2 𝐶
Astable Operation
𝑊
D=
𝑇
Astable Operation
R1<< R2 Duty Cycle approaches 50%
R1>> R2 Duty Cycle approaches 100%
For Duty Cycle to be less than 50%
• Placing a diode in parallel with R2 with anode
connected at pin 7.
• In this case the capacitor will charge through R1
and the diode, but will discharge through R2.
Therefore the duty cycle becomes
𝑅1
D=
𝑅1+𝑅2
Example 3
Q. The 555 timer of figure below has R1 = 75KΩ, R2
= 30KΩ, and C= 47nF. What is the frequency of the
output signal? What is the duty cycle?
Repeat the problem with R1 = R2 =
75KΩ
555 Timer as
Voltage Controlled Oscillator
This circuit is sometimes
called a voltage-to-frequency
converter because an input
voltage can change the
output frequency
Capacitor Voltage
Waveform
555 Timer as
Voltage Controlled Oscillator
• The 555 timer is configured as an astable
multivibrator to be able to serve as an oscillator.
• The difference of this circuit with the basic 555
astable circuit is that its pin 5 is tied to an external
voltage source.
• Pin 5 is the 555's control voltage pin, which allows
the user to directly adjust the threshold voltages
to which the pin 2/pin 6 input voltages are
compared by the 555's internal comparators.
555 Timer as
Voltage Controlled Oscillator
• The outputs of these comparators control the
internal flip-flop that toggles the output of the
555, adjusting the pin 5 control voltage also
adjusts the frequency at which the 555 toggles its
output.
• Increasing the input voltage at pin 5, decreases
the output oscillation frequency (increasing the
capacitor charging time) while decreasing the
input voltage, increases the output oscillation
frequency.
555 Timer as
Voltage Controlled Oscillator
Example 4
Q. The vco of figure has R1 = 75KΩ, R2= 30KΩ and
C=47nF. What are the frequency and duty cycle
when Vcon is 11V? What are the frequency and duty
cycle when Vcon is 1V?
a.) When Vcon = 11V
Example 4
b.) When Vcon = 1V
Repeat Problem with Vcc = 15V and Vcon = 10V
555 Timer Application circuits
Start and Reset UTP= 2Vcc/3
NPN
Volt from
outside Comparator 1
Vth
SR flip flop
For Vth > UTP, S =1 S = 1, Q = 1
R = 1, 𝑄ത = 1
For Vtrig < LTP
R =1
Comparator 2
Output voltage
Control o/p frequency to 0
when operated in
Astable mode. LTP= Vcc/3 Usually connected to Vcc
555 Application circuits
1. Start and Reset circuit
Modification in
Monostable timer
1. Start and Reset Working
• When pin 2 is high (switch is open), the circuit is
inactive.
• When the start switch is pushed (closed), pin 2 is
temporarily pulled down to ground.
• The output goes high and LED turns on.
• Capacitor C1 charges positively as discussed
previously.
• The charging time constant can be varied with R1.
• So we can get time delays of seconds to hours.
1. Start and Reset Working
• When the capacitor voltage is slightly greater
than 2Vcc/3, the circuit resets and the output
goes low, so the LED turns off.
• Notice the RESET switch. It can be used to reset
the circuit at any time during the output pulse.
• Since the switch is normally open, pin 4 is high
and has no effect on the operation of the timer.
• When the RESET switch is closed, however, pin 4
is pulled down to ground and the output is reset
to zero.
1. Start and Reset Working
• The RESET is included because the user may want
to terminate the high output.
• For instance, if the output pulse has been set to 5
min, the user can terminate the pulse prematurely
by pushing the RESET.
• The output signal Vout can be used to drive a rely,
power FET, an IGBT, a buzzer and so on. The LED
serves as an indicator of the high output being
delivered to some other circuits.
2. Siren and Alarms
2. Siren and Alarms
• Figure shows how to use an astable 555 timer as a
siren or alarm.
• Normally, the ALARM switch is closed, which pulls
pin 4 down to ground.
• In this case, the 555 timer is inactive and there is
no output.
• When the ALARM switched is open, however, the
circuit will generate a rectangular output whose
frequency is determined by R1, R2, and C1
2. Siren and Alarms
• The output from pin 3 drives a loudspeaker
through resistance of R4.
• The impedance of the branch with R4 and the
speaker should limit the output current to 200 mA
or less because this is the maximum current a 555
timer source.
• The above circuit can be modified to produce
more output power for the speaker.
• For instance, we can use the output from pin3 to
drive a class B push-pull power amplifier, the
output of which then drives the speaker.
3. Pulse width Modulator
• Figure shows a circuit
for pulse-width
modulation (PWM).
• The 555 timer is
connected in the
monostable mode.
• A low frequency
signal called the
modulating signal is
capacitively coupled
into pin5.
• The values of R, C,
UTP and Vcc
determines the
width of the output
pulse.
3. Pulse width Modulator
• Since pin5 controls the value of UTP, vmod is being
added into the quiescent UTP. Therefore
instantaneous UTP is given as
• For instance if Vcc is 12 V and the modulating
signal has a peak value of 1V, then
3. Pulse width Modulator
• This means that the instantaneous UTP varies
sinusoidally between 7 and 9 V.
• A train of triggers called the clock is the input to
pin2. Each trigger produces an output pulse.
• Since the period of trigger is T, the output will be
a series of rectangular pulses with a period T.
• The modulating signal has no effect on the period
T, but it does change the width of each output
pulse.
• At point A, the positive peak of the modulating
signal, the output pulse is wide as shown.
3. Pulse width Modulator
• At point B, the negative peak of the modulating
signal, the output pulse is narrow.
• PWM is used in communications. It allows a low
frequency modulating signal (voice or data) to
change the pulse width of a high frequency signal
called the carrier signal.
• The modulated signal can be transmitted over
copper wire, over fiber optic cable, or through
space to a receiver.
• The receiver recovers the modulating signal to
drive a speaker (voice) or a computer (data).
Example
A PWM in figure above has Vcc = 12 V, R = 9.1 KΩ and C = 0.01 µF.
The clock has frequency of 2.5 kHz. If the modulating signal has
peak value of 2 V, what is the period of the output pulse? What is
the quiescent pulse width? What are the minimum and maximum
pulse widths? What are the minimum and maximum duty cycles?
3. Pulse-position Modulation
• With PWM, the pulse width changes, but the period is
constant because it is determined by the frequency of
input triggers.
• As the period is fixed, the position of each pulse is the
same, which means that the leading edge of the pulse
always occurs after a fixed interval of time.
• Pulse-position modulation (PPM) is different.
• With this type of modulation, the position (leading
edge) of each pulse changes.
• With PPM, both the width and the periods of pulsed
vary with modulating signal.
3. Pulse-position Modulation
It is similar to VCO discussed earlier
• Figure shows a PPM.
The instantaneous UTP is given as
(a)
(b)
3. Pulse-position Modulation
• When the modulating signal increases, UTP and
the pulse width increases.
• When the modulating signal decreases, UTP and
the pulse width decreases.
• The pulse width and period are:
Space between trailing edge of
one pulse and leading edge of
As Vcon does not appear in above eq. next pulse
the space between pulses is constant
as shown in (b).
3. Pulse-position Modulation
• As the space is constant, the position of the
leading edge of any pulse depends on how wide
the preceding pulse is.
• This is why this type of modulation is called pulse
position modulation.
• Like PWM, PPM is used in communication system
to transfer voice or data.
Example
• A PPM in figure above has Vcc = 12 V, R1 = 3.9 kΩ, R = 3
kΩ, and C = 0.01 µF. What are the quiescent width and
period of pulses. If modulating signal has a peak value of
1.5 V, what are the minimum and maximum pulse widths.
What is the space between pulses?
Solution: with no modulating signal, the quiescent period of the
output pulses is that of a 55 timer used as an astable multivibrator
3. Ramp Generation
• Charging a capacitor through resistor produces an
exponential waveform.
• If we use a constant current source instead of a
resistor to charge a capacitor, the capacitor
voltage is ramp.
• This is the idea behind the circuit in figure (a)
below.
• Here the resistor of monostable circuit is replaced
with a pnp current source that produced a
constant charging current of
3. Ramp Generation
When the trigger starts the monostable
555 timer of figure (a), the pnp current
source forces a constant charging
current into the capacitor.
3. Ramp Generation
• Therefore, the voltage across a capacitor is a ramp,
as shown in figure (b).
• The slope S of the ramp is given by:
• Since the capacitor voltage reaches a maximum
value of 2Vcc/3 before discharge occurs, the peak
value of ramp shown in figure (b) is:
• The duration T of the ramp is:
Example
• The ramp generator of the figure above has a constant
collector current of 1 mA. If Vcc = 15 V and C = 100 nF,
what is the slope of the output ramp? What is the peak
value? What is its duration?
