PROBLEMS

2.1 Current-to-oltage converters

2,1 singtwo opamps, design a circuit that accepts twO Current source
and R and yields vo =(0.1 V/uA)
narallel resistances R, reference directions of
Nardless of }, X}, and RL. The both sources are iror
Try minimizing the number of resistors you use.
in0 VOur CiICUit.
4-mA-to-20-mA input current to a
. i n a ciuit to convert a of the
otage. The reference direction input sOurce is from groundO-V-tol01
an the eircuit is powered from #15-V regulated supplies.
Esnmate the closed-loop parameters if the circuit of Example 2.2 is
a 741 op amp. inpieetie. wt
24 (a) Using an op amp powered from ±15-V regulated supplies, design a
amplifier such that as i, changes from 0to 1 uA, vo changes from -5 phoieT
Vto-1
(0) What is the minimum open-loop gain for a deviation of the transfer
from the ideal of less than 1%? charaesr.
22 Voltage-to-current converters

Show that the floating-load V-I converter of Fig. P2.5 yields io = y/h k
k=1+ Ry/R3. (b) Specify standard 5% resistances for asensitivity of l mAV and
R; = 1ML, where R; is the resistance seen by the input source. (c) If +Vsa==13V.
what is the voltage compliance of your circuit?
R R

4Load
R

FIGURE P2.5

2.6 In the circuit of Fig. P2.5 let R, = 100 kS2, R, = 99 kS2, and R; = 1k2. I1 Ta =
a= 10 V/V, and r, 0, estimate the resistance R, seen by the load.
in the V-]
2.7 Consider the following statements about the resistance RÍ seen by the load
tOwardthe left.
converter of Fig. 2.4b, where the op amp is assumed ideal: (a) Looking = 0:
hence.
the load sees R||ra = R|| OO = R, and looking to the right, it sees ro
virtual-ground node
R, = R+0 = R. (b) Looking toward the left. the load sees a 0+0 .
with zero resistance, and looking to the right, it sees r, = 0: hence, R, =
coTect? How would
(c) R, = o because of negative feedback. Which statement is
you refute the other two?
curents through RË
2.8 Repeat Example 2.4 for the case of a sink, Then find thea$-VZener diode mA?
with
and R, if the load is (a) a 2-k2 1.5-mA
(b) a 6-kS2 resistor: (c) (e), is io sill L.5
the cathode at ground; (d) ashortresistor:
circuit; (e) a 10-ks2 resistor. In
Explain.
 2 SDppose in the Howland circuit of Fig. 2.6a we lift the left terminal of Rg off ground 99
and simultaneously apply an input vË via R3 and an input v, via RË. Show that the Problems
eircuit is a difference V-I converter with io = (1/R|D(V2V) -(1/R,)vL,where Ro
is given by Eq. (2.8).
210 Designa grounded-load V-I converter that converts a 0-Vto 10-V input to a 4-mA to
20-mA output. The circuit is to be powered from ±15-V regulated supplies.
2.11 Design a grounded-load current generator meeting the following specifications: io is to
be variable overtherange -2 mA s io <+2mA by means of a100-k2 pot;the voltage
compliance must be 10V; the circuit is to be powered from #15-V regu!ated supplies.
2.12 (a) Prove Eq. (2.15). (b) Using a 741 op amp powered from t15-V supplies, design an
improved Howland circuit with a sensitivity of 1 mAW for -10 V < v <10 V. The
voltage compliance of the circuit must also be 10 V.

2.13 Design an improved Howland circuit whose sensitivity is variable from 0.1 mA/V to
1mA/V by means of a 10-kS pot.
2.14 Ya) Given that the circuit of Fig. P2.14 yields io = A(V2 -V)-(1/Ro)VL, find expres
sions for A and Ro, as well as the condition among the resistances that yields Ro = 0.
)Discuss the effect of using 1% resistances. 9 A & A, mismaleho
R3 R4

OA,
+ Re

R R,
OA2
p
V

+
Load 'o

FIGURE P2.14

2.13 (à) Given that the circuit of Fig. P2.15 yields io = Avy -(1/Ro)vL, find expressions
= o.
Ro
for A and Ro, as well as the condition among its resistances that yields
Tb) Discuss the effect of using 1% resistances.

R, R4

+/ +
vLoad to
OA, R.
0A

FIGURE P2.15
& yH hhlem 2.1S tor the circuit of Fig. P2.16.
R

R, Ra
R R,

OA,
Vz Loadio
OA, +

FIGUREP2.16

the capac
2.4 drives a 0.1-uF load. (a) Assuming that takes for
of Example Find the time it
2.17 The current source discharged, sketch and label vo(t > 0). (b)
itance is initially saturation region.
the op amp to enter the
increased by 10%.
2.17 with Ra (a) decreased by 10%, and (b)
2.18 Repeat Problem current pump as
find the input resistance R; of a Howland
op amp,
2.19 Assuming an ideal R. . Comment.
afunction of the load

2.3 Current amplifiers

resistances for
(b)Assuming a 741 op amp in Fig. 2.11, specify circuit.
2.20 (a) Prove Eg. (2.18). the gain error as well as the output resistance of the
A= 10 A/A;estimate
output impedance of the current amplifier of Fig. P2.21.
2.21 Find the gain as wellas the

Ry
R..3
Vz Load io

FIGURE P2.21

current amplifier of Fig. 2.12, then Eq. (2.13)

2.22 Show that if R, = oo and a o in the
holds.

implemented by cascading an /-V and a

2.23 A grounded-load current amplifier can be
design a current amplifier withn
V-lconverter. Using resistances no greater than 1MSZ, l5-V
R, = 0, A= 10 A/A, R, = , and afull-scale input of l00 nA. Assuming
supplies, the voltage compliance must be at least 5 V.
2.24 Suitably modify the circuit of Fig. P2.16 so that it becomes a current amplifier with
R, = 0, A = 100 A/A, and R, = oo. Assume ideal op amps.
 6080 41
2.25 InFig. P2.25the odd-nunmbered inputs are fed to A,'% suDIDing junction direcly, and
the cven numbered inputsarc led viu a current reverser, Oblain a relationship bct wecn Problerns
Vo and the various inputs, What huppenw il uny of the inputs is left loating? WilI it
alleet the contibution ronn the otheor inputs? What is n mporlant advantage of this
circuit eompared to that of Poblem 31?

0A,

OA,

FIGURE P2.25

24 Difference amplifiers

2.26/ Derive Eq. (2.23.

227\ (a) Derive Eq. (2.27). (b) Using a 100-kS2 pot, specify suitable resistances such thaf
varying the wiper from end to end varies the gain from 10 V/V to 100 V/V.
2.28 a) Derive Eq. (2.28). (b) Specify suitable component values such that gain can be
vaçied irom | V/ to 100V/V.

2,29 Mi) Adifference amplifier has v = 10cos 2r 601 V- 5cos 2r 10° mV, and v» =
10cos 2T601 V + 5cos 2n 10°1 mV. If vo = 100cos 27 601 mV + 2 cos 2r 10: V,
find Adm Aem, and CMRRdiih) Repeat (a) with vË = 10.01 cos 2r60:cosV- 5 cos 2r
10°1 mV, V, = 10.00cos 2r601 V+ 5 cos 27r 10't mV, and vo = 0.5 2r 601 V +
2.5 cos 2r 10°1 V.
2.30 If the actual resistance values in Fig. 2.13a are found to be R = I.01 kS2, R, = 99.7 kS2,
R3 = 0.995 kS2, and R4 == I02 k, estimate Adms Acm, and CMRRaB.
the difference amplifier of Fig. 2.13a has a differential-mode gain of 60 dB and
CMRRdk = 100 dB, find vo if v=4.001 V and v) = 3.999 V. What is the percentage
error of the output due to finite CMRR?
2.32 If the resistance pairs are perfectly bal:anced and the op amp is ideal in the dilference am
plifier of Fig. 2.I3a, then we have CMRRs =0. But what if the open-loop gain a is
 finite, everything else being ideal? Is the CMRP
102
intuitively. still infinite?
CHAPTER 2
Circuits with
Justify your
Resistive
Feedback
2.5 Instrumentation amplifiers hin g
2.33)In the lA of Fig. 2.20 let R3 = 1 M2. Rc
an ac voltage with a peak amplitude of =2kS2,
10 mV and
and R = R,
node voltages in the circuit. vcM is a dc

r2.34 ^how that if OA, and OA, in Fig. 2.20 have the
voltage oi SN, fnd al
forn a negative-feedback system with input same
open-loop
gain
open-loop gain a, and feedback factor B = V= V- V2, Output a,
RG/(RG +2-2R3). Vo together they
2.35 )Atriple-op-amp 1A is to be implemented with A = Aj x
Assuming matched input-stage op amps, find the A| = 50 x =VO1-on
cach op amp for a 0.1% maximum deviation of A minimum open-loop 20 =1
from the ideal. gain VNof
2.36 Comparedi with the classical
triple-op-amp IA, the IA of Fig.
required
1992, p. 115) uses fewer resistances.
to maximize the CMRR. The P2.36 (see EDN, Oct.
wiper, nominally positioned
Show that
vo=(1+2R2/R;)(V -y). halfway,
is used

OA1 -O Vo
Ry
20 kQ

R R3
1kQ
30 k2

R
20 ks2
+
OA
OA

FIGURE P2.36

bo a) lo investigate the effect of

that R3/ R4 = (Ri/R)(1 - e).mismatched
Show that resistances
vo = Adm VDMin the+IAAçmVCM
of Fg. where
. Amy =
1+ R/R - /2 and Açm =¬. (b) Discuss the implications of using 1% resistors
without trimming for the case A = 10
V/V.
2.38 (a) Derive Eq. (2.35). (b) Specify suitable components such that Acan be varied ove
the range 10
V/V < A < 100 V/V by of a 10-k2 pot.
means (see
4 2.39 The gain of the dual-op-amp lA of Fig. P2.39 EDN, Feb. 20, 1986, pp. 241-242)is
adjustable by means components
(b) Specify suitable of a single resistor
to makeRG.A(a)
variable
Showfrom
=2(1+R/Rç)(' -V
10 V/Vto100 V/V by means
that vo
of a
l0-kS2 pot.
 103
OA, Problems

R¢

R R
W

OA2
FIGURE P2.39

1986) offers
2.40 The dual-op-amp IA of Fig. P2.40(see Signals and Noise, EDN, May 29, achieved
the advantage that by proper adjustment of the pot, a fairly high CMRR can be
and maintained well into the kilohertz range. Show that vo = (1 + R2/R)(v2 - v).

+
OA1 -O Vo

R
R, R

R
OA2

50 pF

FIGURE P2.40

well as perfectly matched op amps in the

2.41 Assuming perfectly matched resistances as finite open-loop op amp gain a
dual-op-amp IA of Fig. 2.23, investigate the effect of
finite gain, both op amps are ideal).
upon the CMRR of the circuit (except for their 10 V/V. Repeat, but if A= 10 V/V,.
Assuming a = 105 V/V, find CMRRaB if A =
and comment on your findings.
2.6 Instrumentation applications
having an overall gain of IV/N, I0 V/N, 100 V/V,
L42 Dsign a digitally programmable IA
add 1000 V/V. Show the final design.
supplies, design a programmable IA with two op
L.43 Assuming t15-V regulated power gain is 100 V/V and he output offset is 0 V; in the
erating modes: in the first mode the
the output offset is -5 V.
second mode the gain is 200 V/V and
current-output IA of Fig. 2.33 specity suitable compo
2.44 (a) Derive Ea. (2.42). (b) In the
Investigate the effectof using 0.1% resistances.
nents ior asensitivity of l mA/V. (C)
Rs = 10ks2, R) = 1 kS2, and R =9 kS2. If
2.43 In the circuit of Fig. 2.33 Jet R = k4 = between he inverting input nodes of the two
an additional resistance RG is connected
of Ri.
op amps, find the gain as a function
 1(04 2.46 (a) Design a current-output IA whose sensitivity can be varied Irom I nA/V to
CHAPTER 2 100 mA/N by means of a 100-kS2 pot. The circuit must bave avoltage complance of
lor CMRR optimization
at least S V with 15-V supplies, and it must have provisioncalibrating
Cireuits with for the trimmer.
Resistive by means of a suitable trinmmer, (b) Outline the proccdure
Feedback of 10 V/mA.
2.47 Design a current-input, voltage-output IA with a gain
2.7 Transducer bridge amplifiers
single-op-amp configuration of Fig. 2.38. Show the
Z.48 Repeat Example 2.12 using the
final circuit.

2.49 (a) Derive Eqs. (2.52) and (2.53). (b) Derive Eq. (2.55).
specify suitable component values for an
2.50 Assuming that VREE = 2.5 V in Fig. 2.39,
output sensitivity of 0.1 VPC with a Pt RTD.
Assuming that VREE = 15 V in Fig. 2.40, specify suitable component values for an
(a) as in
2.51
sensitivity of 0.1 V/C with a PtRTD. (b) Assuming the same tolerances
output
Example 2.13, make provisions for bridge calibration.
Fig. P2.52 yields Vo = -RVREr8/
2.52 Show that the linearized bridge circuit of
(RË + R). Name a disadvantage of this circuit.
R, R(l+S)

+
VREF

R R

FIGURE P2.52

2.53 Using the circuit of Fig. P2.52 with VREF = 2.5 V and an additional gain stage, design
an RTD amplifier circuit with a sensitivity of 0.1 V/°C. The circuit is to have provisions
for bridge calibration. Outline the calibration procedure.
2.54 Show that the linearized bridge circuit of Fig. P2.54 (U.S. Patent 4,229,692) yields
Vo = R2VREr8/R,. Discuss how you would make provisions for calibrating the circuit.

VREF R R

R OA R(I+8) OA;

FIGURE P2.54
 REFERENCES 105
References
Photovoltaic DDetectors and Detector/Amplifier Combinations," Application
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Note D3011C-8, EG&G Electro-Optics, Salem,
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158.
4. R. M. Stitt,
Monolithic Difference Amp Eases the Design of a Variety of Circuits,"
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EDN, March 20, 1986, pp.
EIRRiskin. A User's Guide to IC Instrumentation Amplifiers," Application Note AN
Norwood, MA, 1993.
244, Applications Reference Manual, Analog Devices, Building Block,"
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May 26, 1982, pp. 173-176. Design Satisfies Gain and Balance Criteria,"
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