Instruction Level Parallelism and
Parallel Processing
Department of Computer Science, Wolaita University
March 2025
Table of Contents
1. Introduction to Instruction Level Parallelism (ILP)
2. Pipelining in Processors
3. Types of Hazards in a Pipeline
4. Dynamic Instruction Scheduling
5. Superscalar Processing
6. Speculative Execution
7. Conclusion
8. References
1. Introduction to Instruction Level Parallelism (ILP)
Instruction Level Parallelism (ILP) refers to the ability of a processor to execute multiple
instructions simultaneously. Modern processors achieve ILP through various techniques,
such as pipelining, out-of-order execution, and speculative execution. ILP is crucial for
improving the performance of processors, enabling faster execution of programs.
2. Pipelining in Processors
2.1 Basic Concepts of Pipelining
Pipelining is a technique where multiple instruction phases are overlapped to increase
throughput. A pipeline is divided into stages, with each stage executing a part of an
instruction. This concept is similar to an assembly line in a factory, where different stages of
production occur simultaneously.
2.2 Types of Pipelines
1. Linear Pipeline: Data flows sequentially through all pipeline stages.
2. Non-Linear Pipeline: Some stages have multiple paths for data flow.
3. Types of Hazards in a Pipeline
3.1 Data Hazards
Data hazards occur when an instruction depends on the result of a previous instruction that
has not yet completed. This can lead to incorrect computations if not managed properly.
3.2 Control Hazards
Control hazards occur due to branch instructions, which alter the flow of execution,
requiring the processor to discard or stall pre-fetched instructions.
3.3 Structural Hazards
Structural hazards occur when multiple instructions require the same hardware resource at
the same time, causing a stall in execution.
4. Dynamic Instruction Scheduling
Dynamic scheduling allows the processor to determine the optimal order of execution for
instructions to minimize stalls. This technique improves performance by reducing pipeline
delays.
5. Superscalar Processing
Superscalar processors can issue and execute multiple instructions per cycle by dispatching
them to multiple execution units. This significantly increases throughput and performance.
6. Speculative Execution
Speculative execution is a technique where the processor predicts the outcome of a branch
instruction and executes instructions ahead of time. If the prediction is correct,
performance is improved; otherwise, the processor rolls back incorrect executions.
7. Conclusion
Instruction Level Parallelism (ILP) is a crucial aspect of modern processor design, allowing
multiple instructions to execute simultaneously. Through techniques such as pipelining,
superscalar processing, and speculative execution, ILP enhances computational efficiency
and performance.
References
1. Hennessy, J., & Patterson, D. (2017). Computer Architecture: A Quantitative Approach.
Elsevier.
2. Flynn, M. (1972). Very high-speed computing systems. Proceedings of the IEEE, 60(2),
190-222.
