n Paper Code : 97059
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PGREE EXAMINATION, NOVEMBER/DECEMBER 2014
B.E/B.Tech, D)
‘Third Semester
Electronics and Communication Engineering,
EC 6302 — DIGITAL ELECTRONICS
(Common to Méchatronics Engineering and Robotics and Automation Engineering)
(Regulation 2013)
‘Time : Three hours Maximum : 100 marks
Answer ALL questions.
PART A — (10 x 2= 20 marks)
1, Simplify the following Boolean expression into one literal
WX(Z'+¥Z)+XW+Y7Z). :
2. Draw the CMOS inverter cireuit. :
3. Construct 4-bit parallel adder/subtractor using Full adders and XOR gates.
4. Convert a two-to-four line decoder with enable input to 1 x 4 demultiplexer.
5. Realize JK flip flops.
6. How does ripple counter differ from synchronous counter?
7. Compare and contrast EEPROM and flash memory.
What is a Field Programmable Gate Arrays (FPGA) device?
9. Define ASM chart. List its three basic elements.
10. What is critical race condition in asynchronous sequential circuits? Give an
exampleun
13.
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(@)
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(b)
PART B — (6 x 16 = 80 marks)
(Convert the following function into Product of Max-terms,
F(A,B,C) =(A+ BYBsC) (A+C) “
(i)_Using Quine McClusky method, simplify the given function.
F(A,B,C,D) = 2m, 2,3, 5,7, 9, 11,18, 14). «zy
Or
(Draw the multiple-level two input NAND circuit for the following
expression : F = (AB’+CD')E + BC(A + B) @
Gi) Draw and explain Tristate TTL inverter circuit diagram and
explain its operation. (az)
@) Design a 4-bit decimal adder using 4-bit binary adders, (a0)
(i) Implement the following Boolean functions using Multiplexers
F(A,B,C,D) =5m(,1,3, 4,8, 9,15). ©
Or
@ Design a 4-bit magnitude comparator with three outputs : A > B,
A=BandA