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Physical Design Implementation of RISC V

The document outlines a major project focused on the physical design implementation of RISC-V technology using a 32nm process. It details the project flow, including hard macro creation for an ALU and machine counter, synthesis, and place and route (PnR) implementation using various tools like Design Compiler and ICCII. The document also covers technology setup, floorplanning, power planning, and final reporting aspects of the project.

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Thanushsaran S
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293 views30 pages

Physical Design Implementation of RISC V

The document outlines a major project focused on the physical design implementation of RISC-V technology using a 32nm process. It details the project flow, including hard macro creation for an ALU and machine counter, synthesis, and place and route (PnR) implementation using various tools like Design Compiler and ICCII. The document also covers technology setup, floorplanning, power planning, and final reporting aspects of the project.

Uploaded by

Thanushsaran S
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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MAJOR PROJECT

ON

PHYSICAL DESIGN IMPLEMENTATION OF RISCV

TECHNOLOGY : 32nm PRESENTED BY:

TOOLS: DC, ICCII,LM_SHELL GATLA ABHILASH


PROJECT FLOW
➢ Hard Macro Creation of ALU Using DC + ICCII + LM_SHELL
➢ Hard Macro Creation of Machine Counter Using DC + ICCII + LM_SHELL
➢ TOP Module Synthesis Using Design Compiler (DC)
➢ Top Module PnR Implementation Using ICCII
PHYSICAL DESIGN FLOW
SYNTHESIS OFALU USING DESIGN_COMPILER
READING RTL AND EXTRACTING REPORTS
NETLIST OF ALU
PnR IMPLEMENTATION OF ALU USING ICCII
CREATING MACRO USING LM_SHELL
SYNTHESIS OFMACHINE COUNTER USING DESIGN_COMPILER
READIG RTL AND EXTRACTING REPORTS
NETLIST OF MACHINE COUNTER
PnR IMPLEMENTATION OF MACHINE COUNTER USING ICCII
CREATING MACRO USING LM_SHELL
TOP MODULE SYNTHESIS USING DESIGN COMPILER (DC)
TECHNOLOGY SETUP And CREATING LIBRARY
READING RTL
EXTRACTING REPORTS
NETLIST OF TOP MODULE
TOP MODULE PnR IMPLEMENTATION USING ICCII
➢ Setup.tcl

➢ Run.tcl
TECHNOLOGY SETUP AND MCMM
FLOORPLANNING
POWER PLANNING
PG DRC CHECKING
PLACEMENT
SETUP TIME CHECKING
CLOCK TREE SYNTHESIS(CTS)
➢ Clock_opt
HOLD TIME CHECKING
ROUTING
FINAL REPORTS

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