Mastering Embedded System Diploma Content & Hours
numbers - Learn in depth.
Introduction to embedded System (3H)
C programming
● Git & GitHub (3H)
● C Basics (6H)
● C Conditions & Loops & Array & String (8H)
● C Functions (5H)
● C Structures & Union & Enum (5H)
● C Preprocessor directives (4H)
● C Pointers Lecture (13H)
● 170+ questions tricks solved
● 30+ Assignments C code practice
Embedded C
Embedded C Lesson1 (4H)
•HEADER PROTECTION
•OPTIMIZATION
•TOOLCHAINS
•COMPILATION PROCESS
Embedded C Lesson2 (5H)
•BOOTING SEQUENCE
•EXECUTABLE FILE SECTIONS (.DATA, .BSSAND RODATA)
•LINKER
Embedded C Lesson3 (6H)
•GDB TUTORIAL
•MEMORY ALIGNMENT
•MAKEFILE
•WRITE LINKER SCRIPT
•WRITE STARTUP Code in assembly and C.
•FUNCTIONAL ATTRIBUTE: WEAK AND ALIAS IN EMBEDDED C
Embedded C Lesson4 (4H)
•DEBUGGING MECHANISM
•OPENOCD GDBSERVER
Embedded C Lesson5 (3H)
• JTAG/SWD/ST-LINK/J-LINK
•DYNAMIC ALLOCATION
Data Structure for embedded system (5H)
•INTRODUCTION TO DATA STRUCTURES
•LIFO BUFFER (STACK)
•CIRCULAR BUFFER & FIFOS (QUEUE)
•LINKED LIST
Embedded systems architecting (4H)
•STATE MACHINES IN C
•STATE MACHINE VS FLOWCHART
Embedded systems architecting (5H)
•UML FOR EMBEDDED SYSTEM
•EMBEDDED SYSTEM ARCHITECTING/DESIGN SEQUENCE
•SYSTEM REQUIREMENTS
•DESIGN SPACE EXPLORATION
•SYSTEM ANALYSIS
•UML: ACTIVITY DIAGRAM
•UML: SEQUENCE DIAGRAM
•MISRA-C:2012 RULES
MCU Fundamentals-lesson 1(4H)
● Embedded System Definition
● Deep Dive in “uc, up, SoC, ECU,MMU,FPU,MPU”
● Electronic control unit (ECU)
● Cache Memory / Cache coherence
● Microprocessor units (MPUs)
● OS SW Vs Bare-metal SW
● MCU Memory Types
● Von Neumann, Harvard
● Pipeline
● CISC Vs RISC
MCU Fundamentals-lesson2(4H)
● port-mapped I/0, and memory-mapped I/0.
● MCU Bus Interfaces
● BUS Matrix
MCU Fundamentals-lesson3(3H)
● MCU Clocking
● General Topology of the Clock Architecture
● MCU Clock Sources
● Steps to find out the Clock tree in any MCU
● Understanding Clock Tree
● Peripherals Clocks
MCU Fundamentals - lesson 4 MCU Interrupts (5H)
● Deep Dive in Interrupt Processing
● Interrupt Service Routines (ISR)
● Non-Vectored Priority System
● Vectored Arbitration System
● Interrupt vector Table (IVT)
● Difference Between Polling And Interrupt
● Deep Dive in Interrupt Processing
● interrupt latency / Interrupt Overload
● Sequential interrupt processing VS Nested interrupt processing
● HW Interrupts / Exceptions Interrupt (Traps, Faults, Aborts and
Programmed exceptions )
MCU Essential Peripherals - GPIO (15H)
● GPIO Pins and Alternate Functions
● Driver Development Sequence
● MCU Device Header
● HOW to Create a Driver
● Implement the GPIO Driver based on ARM Cortex M3 STM32F103
● LCD / Keypad
MCU Essential Peripherals - External Interrupt(4H)
● Implement the GPIO Driver based on ARM Cortex M3 STM32F103
MCU Interfacing (40H)
● MCU IO Electrical characteristics
● UART protocol
● SPI protocol
● I2C protocol
● Implement the UART - SPI - I2C Drivers based on ARM Cortex M3
STM32F103
● Timers
● ADC
SW Engineering (Testing & Validation) ( 9H)
● Verification And Validation
● What is Embedded Software Testing?
● Static & Dynamic Testing
● Quality Assurance Vs Quality Control
● Testing Vs Debugging
● System Architecting/Design Sequence
● SDLC & STLC
● Test (Levels, Methods and Types)
● Functional Vs Non Functional Testing
● Waterfall Model - Spiral Model - V Model in SDLC
● ISTQB Automotive Software Tester
Agile Scrum Methodology(3H)
● SCRUM & Agile
● Atlassian JIRA
Test Case design techniques (3H)
● Test Case Design
● Black Box
● Equivalence class partitioning
● Use case testing
● Statement Coverage - Branch Coverage - Decision Coverage -
Condition Coverage - Path Coverage
● Open Source Static Analysis / Code Coverage tools
● Design Test Cases (Practical Case Study)
How Apply on Embedded Systems Jobs
Introduction to Adaptive AUTOSAR ( 3H)
•ADAPTIVE AUTOSAR HISTORY
•ADAPTIVE PLATFORM ARCHITECTURE
•DIFFERENT TYPES OF APPLICATIONS
•EXECUTION MANAGEMENT (EM)
•STATE MANAGEMENT
•UPDATE AND CONFIGURATION MANAGER (UCM)
•ADAPTIVE APP STARTUP SEQUENCE
•MACHINE/FUNCTION GROUP STATES
•ADAPTIVE MANIFEST FILES
•SOFTWARE PACKAGE STRUCTURE
•UCM MASTER/CLIENT
•POSIXAPIS
Getting start with ROSRobot Programming (2H)
● Introduction to ROS
● ROS Main Features
● ROS Multi-Communication
● Components of ROS
● ROS Core Concepts
● Nodes
● Messages and Topics and Services and Parameters.
● ROS Master (ROSCore)
● Stacks and packages
● ROS Distribution Releases / Installation.
● Lab1: Creating a first ROS Project Communication between
HeterogenousDevices ROS for Embedded System
● Lab2: RUN ROS nodes with gazebo
● SLAM (Simultaneous Localization And Mapping)
● How to DeepDiveon It for advanced Projects (Self Driving)
Automotive Ethernet Protocol (2H)
● Network Architecture LayersOS
● Ethernet II Frame
● Virtual Local Area Networks (VLANs)
● Automotive Ethernet (Motivation)
● Time sensitive networking TSN
● Ethernet Media Access Controller (MAC) on SoC
Session Chiplet, UCIe and PCIe
Mastering CAN Protocol
CAN Protocol (Theoretical Part) - Session 1 (3H)
● In vehicle networks (IVN)
● Evolution of in vehicle networks
● classic flat wiring harness architecture
● domain architecture
● zonal architecture
● CANBUS Introduction
● CANBUS Characteristics
● CAN Protocol Specification
● General Characteristics
● Types of CAN Messages
● Types of CAN frames
● CAN bus Characteristics
● CAN Bus Errors
● CAN Bit Monitoring and Stuffing
CAN_SESSION_CASE_Study_1_part1 (4H)
● How to READ CAN Controller from Technical reference Manual TRM for
SoC based on Cortex M3
● CAN Bit Timing and Calculation
● TX & RX Based on Polling Mechanism
● Filtration Mechanisms
● Retransmission Mechanism based on Error
● CAN Test Modes
● Using Simulation Mode for debugging
Session 3 : CASE Study 1 Part 2 (Practical Part)(1H)
● Troubleshooting for CAN BUS single Node
● Running CASE Study 1 on the Physical Board
● Analyze the Physical CAN Bus traffic
Session 4 CASE Study 2 Part 1 (Practical Part) (2H)
● Understanding Interrupt Mechanism from TRM
● Implement TX/RX Functions based on Interrupt Mechanism.
● Two ECUs Communicate together
CAN Case Study 2 part 2 (1H)
● TRY ON PHYSICAL BOARD
● Figure out different issues on physical CAN BUS
CAN_CASE_Study_3 (2H)
● Linux Networking
● SocketCANConcept
● Kernel add can Support
● Can utilities
● CANSocket
Session 7 CASE Study 4 (Practical Part) (3H)
● CAN Bus Wiring Diagram
● CAN interface device called PCAN-USB FD
● CAN Wiring ODB to DB9
● Install CANoe 16 demo version
● Case Study 4: Lab1 (Monitor CAN Frames)
● Case Study 4: Lab2 (replace ECU1 by CAPL Script)
● Case Study 4: Lab3 (Create ACC Pedal & Speed Meter UI)
● Case Study 4: Lab4 (use Env Variable to make Frames Exchange
Continues )
● Case Study 4: Lab5 (Replace ECU2 by CAPL script )
(Mastering ARM CortexM34)
CortexM3/4 Modes/Operations/Registers - ARM Session 1(3H)
● Data Types for ARM Architecture
● Modes of operation and execution
● Cortex-M Registers
● ARM subroutine linkage
● Thumb / ARM / Thumb2 ISA
● ARM LAb1: ARM Modes
ARM_InlineAssembly ARM Session 2 (2H)
● ARM assembly basics
● Most Common instructions
● INLINE CODE
● Using Assembly in the C Source
● Specifying registers for C variables
● LAB 1: no input or output
● LAB 2: using output parameters
● LAB 3: using input parameters
● LAB 4: using input and output parameters
● LAB 5: reserving registers
CortexM Reset Sequence - ARM Session 3
● Reset Sequence of the CortexM3/4
● switch between privileged and user level
● ARM Memory Map
ARM Stack ARM Session 4 (3H)
● CortexM Memory map
● stack memory models
● Stack Banks ( MSP & PSP ) -> SP
● Shadowed stack pointer In OS
● Create a boundaries for MSP and PSP for Task A and Task B
● The scheduler runs on “privileged access level”
● ARM Procedure Call Standard
● Context Saving on Stack (exception/ interrupt)
● Memory protection unit (MPU)
ARM Exceptions and Interrupts Session 5 (3H)
● Exceptions and Interrupts
● CMSIS (Cortex Microcontroller Software Interface Standard)
● Interrupt management
● Definitions of priority
● Cortex-M3/4 peripherals
● CPU’s Exception Processing
● Exiting an Exception Handler / Exception Entry/Exit Sequence with more
details
SVC/PendSV Exceptions Session 6
● Exception Handling: Tail chaining
● Late arrival exception behavior
● Pop preemption
● ARM Cortex-M SVC Exception
● Executing SVC
● SVC instruction / Handler
● Extraction of the SVC service number in assembly “SVC_Handler” is
standardized in CMSIS
● PendSV exception
● Lab1: add ARM CMSIS Codes
● Lab2: SVC for OS Services
● Lab3: PendSV
Unit 15 (Create Your Own RTOS)
Session12 RTOS Concepts (4H)
● RTOS (Motivation)
● Hypervisors in embedded systems
● GPOS Vs RTOS
● Concurrency versus Parallelism
● Task Switching Latency
● Real Time OS (RTOS)
● Soft/Hard real time
● Key Characteristics of an RTOS
● RTOS Scheduling Classification
● Preemptive Fixed/Dynamic Priority Scheduling
● Task States and Scheduling
● Scheduler Concepts
● Shared Data between Tasks
● Mutex/techniques to address mutual exclusion
● Binary/Count Semaphores
● Task Synchronization
● Common Design Problems
● CPU Starvation
● Deadlock
● Priority inversion with solutions techniques
● Priority Inheritance Protocol
● PRIORITY CEILING
Create Your RTOS Scheduler PART1 (4H)
● Prerequisites
● MYRTOS Layers
● Create Main Stack/Stack for each Task
Create Your RTOS Scheduler PART2
● Create TaskControlFrame(Context Switch/Restore)
● Create Tasks Queues/Buffers
Create Your RTOS Scheduler PART3 (1H)
● Create Scheduling Algorithm
● Preemptive Based On Priority
● Round-robin for tasks which have the same priority
Create Your RTOS Scheduler PART4 (2H)
● Case Studies
● Measure the Performance
● Maintain and increase the Performance
● Verified different scenarios
● Implement OS_Wait
Create Your RTOS Scheduler PART5 (1H)
● Implement Mutex
● Create case studies to cover
● Dead Lock
● Priority Inversion
FreeRTOS
How Get Started With Free RTOS - SEC1 (2H)
● From Super Loop To RTOS
● Intro to RTOS
● Free RTOS doc overview
● How download and configure free RTOS with your project
● Hello world RTOS project “Blinking Led”
Inter-Process communication in RTOS - SEC2 (2H)
● Task Synchronization
● Task Inter-Communication
● Overview Inter-Process communication APIs on FreeRTOS
Documentation
Context Switching In RTOS SEC 3 (2H)
● Context Switching In RTOS.
● Application (Code + Debugging + Simulation)
Dive into RTOS Challenges! Session 4 (3H)
● Shared Data Issues.
● Mutual Exclusion.
● Priority Inversion.
● Deadlock.
● Practical Application.
