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Computer Organization and Arch Assignment

This document is an individual assignment for a Computer Organization and Architecture course at Debre Berhan University. It includes tasks related to binary operations, control unit functions, and data transfer modes, as well as a practical exercise involving CPU instruction execution. The assignment requires handwritten submission and is due on 04/08/2015.

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0% found this document useful (0 votes)
25 views2 pages

Computer Organization and Arch Assignment

This document is an individual assignment for a Computer Organization and Architecture course at Debre Berhan University. It includes tasks related to binary operations, control unit functions, and data transfer modes, as well as a practical exercise involving CPU instruction execution. The assignment requires handwritten submission and is due on 04/08/2015.

Uploaded by

Toyba
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Computer Organization and Arch Assignment

Human computer interaction (ደብረ ብርሃን ዩኒቨርሲቲ)

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Debre Berhan University


College of Computing Sciences, Department of Computer Science
Computer organization and Architecture, Individual Assignment
Individual Assignment I (10%)
1. An 8 bit register contain binary value 10101011. What is the register value after following shift
microoperations. (2 points)
1. Circular shift left 4. Logical shift right
2. Circular shift right 5. Arithmetic shift left
3. Logical shift left 6. Arithmetic shift right
2. Register A holds the binary information 11011001. Determine the B operand and the logic
microoperation to be performed between A and B in order to change the value of A to: (2 pts)
1. 01101101 2. 11111101
3. List the main functions of the control unit. What are the advantages and disadvantages of
micro programmed control compared with a hardwired control unit implementation? (2 pts)
4. Discuss the different ways (modes of data transfer) by which data can be sent from the I/O
device to the memory by the CPU? (2pts)
5. Suppose we have a CPU designed like the figure on
The right (the design is the same with what we Clock Input

discussed in the class); given 4 instructions: R1


R2
R3
R4
R5

a. 01000110100010 R6
R7

b. 10111011101000 Load
(7 lines)
SELA MUX MUX SELB

c. 10110010101100
3× 8 A bus B bus

d. 10011001001010 decoder

SELD Arithmetic logic unit


OPR (ALU)

Output
(a) Block diagram

3 3 3 5
SELA SELB SELD OPR
(b) Control word

And the initial value for each registers (4 bits system):


R1 R2 R3 R4 R5 R6 R7
1011 1001 0010 0101 1011 1001 0000
For each instruction, assume we execute each instruction followed by previous instruction (which
means the initial value have been changed after first instruction is carried out), please specify
1. Which register is selected by the decoder?
2. What is the operation and the value going to be stored in the target register?
Notice:
 Last Submission Date: 04/08/2015
 Your assignment should be hand written and readable.

1
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