Memory Subsystems

27 November 2024 15:17

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 Say processor has sent out an address 10
you find it in the block 1 of the Main Memory.

Now the data in block 1 will be copied in Cache

Block.. Konse block mei hoga that will be decided
by a mapping technique.

so the next time the processor will need an

address from 8 to 15 (say 11)
It will fetch it directly from the cache memory
without having to access the Main Memory
decreasing the access time.

If the cache is full, then one of the blocks is

replaced by an incoming block from the Main
Memory using a Replacement Algorithm.

Miss: if the address requested from the processor

is not found in the Cache.

Hit: if the address requested from the processor

is found in the Cache.

In case of Miss, the address is taken from the

Main memory to the cache first and then is
fetched by the Processor.
This is a time taking process.

Load Through/ Early Start : Parallel fetching of

the address directly from the M/M to the
Processor when the data is being copied in the
Cache.

If it’s a hit (address found in cache)

then you first write the updated data on this address in the
Cache block.

Now the cache block has an address with updated data

while M/M still has the old data.

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 Now the cache block has an address with updated data
while M/M still has the old data.

There can be two ways for this.

Write Through Protocol: Whenever a change is done in the

cache , it will be done in the M/M as well at the same time,
drawback is baar baar update krni pad sakti hai M/M tumko
jab jab bhi cache mei koi bhi update ho raha ho.

Write Back Protocol : All the changes will be made in the

cache only.
You update the M/M only when the block in the cache is
replaced by some incoming block, so the block goes back to
the M/M and it is updated at that time.

If the Block in the cache was modified only then it should

If It’s a miss in the Write Request.. be overwritten in the M/M else no need to overwrite.
Write Through: Directly overwrites the M/M with This information that whether the Block has been
the updated data. modified or not is stored in the Dirty Bag/ Modified Bit.

Write Back : First the Block is brought to the cache If Dirty Bag=0 , not modified, so no need to overwrite.
and then it is updated. If Dirty Bag= 1, modified, so the entire block will be
overwritten in the M/M.

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 130 memory accesses becuz
100 memory access to fetch each instruction
and then 30 memory accesses to know the
operation.
Whether LOAD or STORE.

Agar L1 mei nahi mila toh L2 mei milega

Agar L2 mei bhi nahi mila toh we will look for the
data in the Main Memory.

Usi ke hisab se ye formulations kiye hai unhone

just understand it.

Remember that
Avg access time of L2 cache = Miss Penalty of
either of the L1 Catches.

Example

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We have to maintain a counter for each block.
For four blocks , 2 bits can be used for the counter.

Working:
--> Whichever block is referenced the counter for that block will be set to 0.
--> Also the counter of all blocks which are having a value less than or equal to the block currently being
referenced will be incremented by 1.

--> When there is a hit, you do the same thing, jo block reference hua uska counter 0 and then increment
by 1 after looking carefully. Btw Reference vo waala block hoga jaha par tumhe same data mila..

--> When there is a miss, you have to bring the address from the main memory and then replace a block
from the cache.
You use the LRU replacement Algorithm.
The block which has not been referenced recently should be the one to be replaced.
The block with the highest value of the counter will be the block which has been Least recently used.

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Jab tumhara sabse pehla Hit hua (2). Incrementation ka Explanation
toh tumne Block 0 ka counter 0 kar dia.

Ab tumne pichle waale fetch mei dekha (which is 7)… referenced block ka counter was
3… jo agar baakio se bada ho ya barabar ho toh next turn mei unka counter +1 karte
hai… toh isliye +1 hogya.

But next waale Hit mei (1) agar tum check kro..
Block 2 ki value 0 kardoge…
Baaki blocks ke liye pichle waale mei gaye…
Block 2 had counter =2

Block 1 counter =3 (iska ab increment by +1 nahi karenge kyuki ye bada hai referenced
block ke counter se).. So iska count same rahega.

Block 0,3 ka +1 kardenge count.

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The for loop here means
Each element of the array is being read into the processor(so first it has to be
brought into the cache) and then incremented by 99 and this result is written
back into that same memory location which contains this element.

Basically 2 operations : Read and Write.

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 Main Memory : 16 Bit Address
so, Total words = 2^16

each block has 16= 2^4 words

so, No. of blocks in M/M = 2^16 / 2^4 = 4,096

Bits required to write an address of each of 4096 Blocks= 7

Bits required to address 1 out of the 16 Words in each

block =4

Tag Bits=5

Block 4 jab aayega.. Toh 16 bit ka address lekar aayega

vo tum aise (5,7,4) karke divide kroge each component
mei.

Why are these Tag Bits required ??

In Cache , Block 1 can have … Block 1 , 129 and so on from the Main Memory..

How will the processor know that in the cache, which Block from the M/M is
present ..
For this we use Tag Bits.
Tag Bits will be different for Block 1 and Block 129 of the Main Memory.

Address 26 will be found in Block 1 of the Main

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 Address 26 will be found in Block 1 of the Main
Memory.

26/16 krlo

The Processor will have to check the Tag Bits of all the
Cache Blocks
to determine whether the particular block in which the
address is present is there in the cache or not.

The search is done parallely and is termed as associative

Search.

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 Note:
Iss formula se you get the Set jisme ye block
jaayega , not the Block No. in the Cache.

Jaa vo kisi bhi block mei sakta hai uss particular

set mei jo formula se assign hua hai.

64 Sets hai toh

6 Bits will be required to specify address of
each of them.

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 Offset is specifying a specific

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 Offset is specifying a specific
element in that entire block.

Just check ki Set ka jo address

specified hai unn 6 bits se vo same
hai ki nahi.

A2 and A3 are in the same set

A1 and A4 are in the same set

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