MICROPROCESSOR SYSTEM

CHAPTER 1
Architecture &Organization 1
• Architecture is those attributes visible to the Functional View
programmer
o Instruction set, number of bits used
for data representation, I/O
mechanisms, addressing techniques.
o e.g. Is there a multiply instruction?

• Organization is how features are

implemented
o Control signals, interfaces, memory
technology.
o e.g. Is there a hardware multiply unit
or is it done by repeated addition?

Architecture & Organization 2

• All Intel x86 family share the same basic
• The IBM System /370 family share the same
basic architecture
• This gives code compatibility
o At least backwards
• Organization differs between different
versions

Structure & Function

• Structure is the way in which components
relate to each other
• Function is the operation of individual
components as part of the structure

Function • The computer must be able to process data.

• All computer functions are:
The data could be in a variety of forms.
o Data Processing • It is also essential that the computer can store
o Data Storage data
o Data Movement • The computer could also able to move data
o Control between itself and the outside world
• The computer must control the process,
storing data and move data
Operation (a) Data Movement Operation (c) Processing from/to Storage

Operation (b) Storage

Operation (d) Processing from Storage to I/O
 Structure - Top Level Structure – The Control Unit

Structure – The CPU • Major Structural Components:

o Control Unit: controls the operations
of the CPU and hence the computers
o ALU: Performs the computer’s data
processing functions
o Registers: Provides storage internal
to the CPU
o CPU interconnection: probably the
best example is bus system

• Control Processing Unit: control the

operation of the computer and performs its
data processing functions, often simply
referred to a processor
• Main Memory: stores data
• I/O: moves data between the computer and
its external environment
• System Interconnection: There should be a
mechanism for communication among CPU,
main memory, and I/O.
 CHAPTER 2 Structure of von Neumann Machine
COMPUTER EVOLUTION AND
PERFORMANCE

ENIAC – Background
• Electronic Numerical Integrator and
Computer
• Eckert and Mauchly
• University of Pennsylvania
• Trajectory Tables for Weapons
• Started 1943
• Finished 1946 IAS – Details
o Too late for ware effort
• Used until 1955 • 1000 x 40-bit words
o Binary number
o 2x 20-bit instructions
ENIAC – Details • Set of registers (storage in CPU)
o Memory Buffer Register
• Decimal (not binary)
o Memory Address Register
• 20 accumulators of 10 digits
o Instruction Register
• Programmed manually by switches
o Instruction Buffer Register
• 18,000 vacuum tubes o Program Counter
• 30 tons o Accumulator
• 15,000 square feet o Multiplier Quotient
• 140 kW power consumption
• 5,000 additions per second

Von Neumann/Turing Structure of IAS - Detail

• Stored Program concept

• Main memory storing programs and data
• ALU operating on binary data
• Control unit interpreting instructions from
memory and executing
• Input and output equipment operated by
control unit
• Princeton Institute for Advanced Studies
o IAS (Institute for Advanced Study)
• Completed 1952
Commercial Computers Microelectronics
• 1947 - Eckert-Mauchly Computer • Literally - “small electronics”
Corporation • A computer is made up of gates, memory
• UNIVAC I (Universal Automatic Computer) cells and interconnections
• US Bureau of Census 1950 calculations • These can be manufactured on a
• Became part of Sperry-Rand Corporation semiconductor
• Late 1950s - UNIVAC II • e.g. silicon wafer
o Faster
o More memory
Generations of Computer

IBM • Vacuum tube - 1946-1957

• Transistor - 1958-1964
• Punched-card processing equipment • Small scale integration - 1965 on
• 1953 - the 701 o Up to 100 devices on a chip
o IBM's first stored program computer • Medium scale integration - to 1971
o Scientific calculations o 100-3,000 devices on a chip
• Large scale integration - 1971-1977
• 1955 - the 702 o 3,000 - 100,000 devices on a chip
o Business applications • Very large-scale integration - 1978 to date
• Lead to 700/7000 series o 100,000 - 100,000,000 devices on a
chip
• Ultra large-scale integration
Transistors
o Over 100,000,000 devices on a chip
• Replaced vacuum tubes
• Smaller Moore’s Law
• Cheaper
• Less heat dissipation • Increased density of components on chip
• Solid State device • Gordon Moore - cofounder of Intel
• Made from Silicon (Sand) • Number of transistors on a chip will double
• Invented 1947 at Bell Labs every year
• William Shockley et al. • Since 1970’s development has slowed a little
o Number of transistors doubles every
18 months
Transistor Based Computers • Cost of a chip has remained almost
unchanged
• Second generation machines
• Higher packing density means shorter
• NCR & RCA produced small transistor
electrical paths, giving higher performance
machines
• Smaller size gives increased flexibility
• IBM 7000
• Reduced power and cooling requirements
• DEC – 1957
o Produced PDP-1 • Fewer interconnections increases reliability
Growth in CPU Transistor Count DEC PDP-8 Bus Structure

Semiconductor Memory
• 1970
• Fairchild
• Size of a single core
o i.e. 1 bit of magnetic core storage
IBM 360 Series
• Holds 256 bits
• 1964 • Non-destructive read
• Replaced (& not compatible with) 7000 • Much faster than core
series • Capacity approximately doubles each year
• First planned “family” of computers
o Similar or identical instruction sets
INTEL
o Similar or identical O/S
o Increasing speed • 1971 – 4004
o Increasing number of I/O ports (i.e. o First microprocessor
more terminals) o All CPU components on a single chip
o Increased memory size o 4 bits
o Increased cost • Followed in 1972 by 8008
• Multiplexed switch structure o 8 bits
o Both designed for specific
DEC PDP-8 applications
• 1974 – 8080
• 1964 o Intel’s first general purpose
• First minicomputer (after miniskirt!) microprocessor
• Did not need air-conditioned room
• Small enough to sit on a lab bench
Speeding
• $16,000
o $100k+ for IBM 360 • Pipelining
• Embedded applications & OEM • On board cache
• BUS STRUCTURE • On board Li & L2 cache
• Branch prediction
• Data flow analysis
• Speculative execution
Performance Mismatch • Increase interconnection bandwidth
o High speed buses
• Processor speed increased o Hierarchy of buses
• Memory capacity increased
• Memory speed lags behind processor speed
Internet Sources

DRAM and Processor Characteristics • http://www. intel.com/

• Search for the Intel Museum
• http://www.ibm.com
• http://www.dec.com
• Charles Babbage Institute
• PowerPC
• Intel Developer Home

Trends in DRAM use

Solutions
• Increase number of bits retrieved at one time
o Make DRAM “wider” rather than
“deeper”
• Change DRAM interface
o Cache
• Reduce frequency of memory access
o More complex cache and cache on
chip