A Closer Look at
Instruction Set Architectures:
Expanding Opcodes
Lecture Overview
Instruction formats
• Expanding Opcodes
Instruction types
Addressing
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Instruction formats
Expanding Opcodes
We have seen how instruction length is affected
by the number of operands supported by the
ISA.
In any instruction set, not all instructions require
the same number of operands.
Operations that require no operands, such as
HALT, necessarily waste some space when fixed-
length instructions are used.
One way to recover some of this space is to use
expanding opcodes.
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Instruction formats
Expanding Opcodes
The idea of expanding opcodes is to make some
opcodes short, but have a means to provide longer
ones when needed.
When the opcode is short, a lot of bits are left to hold
operands
• So, we could have two or three operands per instruction
If an instruction has no operands (such as Halt), all the
bits can be used for the opcode
• Many unique instructions are hence available
In between, there are longer opcodes with fewer
operands as well as shorter opcodes with more
operands.
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Instruction formats
Expanding Opcodes
Example 1: Consider a machine with 16-bit
instructions and 16 registers.
• The instruction format can have several structures:
- Opcode + Memory address (such as MARIE):
→ If we have 4KB byte addressable memory we need 12 bits to
specify an address location
→ The remaining 4 bits are used for the opcode: 16 instruction are
hence available
- Opcode + Registers Addresses
→ we need 4 bits to select one of the 16 available registers
→ Suppose we have 4 bits opcode, we could encode 16 different
instructions with three operands each (3 x 4 bits = 12 bits).
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Instruction formats
Expanding Opcodes
Example 2: Consider a machine with 16-bit
instructions and 16 registers. And we wish to
encode the following instructions:
- 15 instructions with 3 addresses
- 14 instructions with 2 addresses
- 31 instructions with 1 address
- 16 instructions with 0 addresses
Can we encode this instruction set in 16 bits?
• Answer: Yes if we use expanding opcodes
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Instruction formats
Expanding Opcodes
One possible encoding is as follows:
This is very important, as it is an escape code.
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Instruction formats
Expanding Opcodes
How do we know if the instruction set we
want is possible when using expanding
opcodes?
• We must determine if we have enough bits to
create the desired number of bits patterns
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Instruction formats
Expanding Opcodes
Going back to Example 2 (Slide 6):
• The first 15 instructions account for:
15x24x24x24 = 15 x 212 = 61440 bit patterns
• The next 14 instructions account for:
14 x 24 x 24 = 15 x 28 = 3584 bit patterns
• The next 31 instructions account for:
31 x 24 = 496 bit patterns
• The last 16 instructions account for 16 bit patterns
• In total we need 61440 + 3584 + 496 + 16 = 65536 different
bit patterns
• Having a total of 16 bits we can create 216 = 65536 bit
patterns
• We have an exact match with no wasted patterns.
• So our instruction set is possible.
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Instruction formats
Expanding Opcodes
Example 3: Is it possible to design an
expanding opcode to allow the following to
be encoded with a 12-bit instruction? Assume
a register operand requires 3 bits.
• 4 instructions with 3 registers
• 255 instructions with 1 register
• 16 instructions with 0 register
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Instruction formats
Expanding Opcodes
Solution:
• The first 4 instructions account for:
- 4x23x23x23 = 4 x 29 = 2048 bit patterns
• The next 255 instructions account for:
- 255 x 23= 2040 bit patterns
• The last 16 instructions account for 16 bit patterns
• In total we need 2048 + 2040 + 16 = 4104 bit patterns
• With 12 bit instruction we can only have 212 = 4096
bit patterns
• Required bit patterns (4104) is more than what we
have (4096), so this instruction set is not possible
with only 12 bits.
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Instruction formats
Expanding Opcodes
Example 4: Is it possible to design an
expanding opcode to allow the following to
be encoded with a 12-bit instruction? Assume
a register operand requires 3 bits.
• 7 instructions: 2 15-bit addr and 1 3-bit reg
• 500 instructions: 1 15-bit addr and 1 3-bit reg
• 50 instructions with no addresses or regs
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Instruction formats
Expanding Opcodes
Solution:
• The first 7 instructions account for:
- 7 x 215 x 215 x 23 =7 x 233 = 60,129,542,144 bit patterns
• The next 500 instructions account for:
- 500 x 215 x 23 = 131,072,000 bit patterns
• The next 50 instructions account for:
- 50 bit patterns
• In total we need 6.026 x 1010 bit patterns
• With 36 bit instructions we can have 236 = 6.87 x 1010
bit patterns
• We have enough bit patterns so can create opcodes
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Instruction formats
Expanding Opcodes
One possible encoding is as follows:
• 7 instructions: use 000-110 for opcode
• Use all 1s for escape code
• Use 111 000000000 – 111 111110011 for next
500 instructions
• Use 111 111111111 for last 50 instructions
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Lecture Overview
Instruction formats
Expanding Opcodes
Instruction types
Addressing
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Instruction types
Instruction types
Instructions fall into several broad categories:
• Data movement instructions
- The most frequently used instructions
- Data is moved from memory into registers, from registers to
registers, and from registers to memory
- Examples: Load, Store, Move, Push, Pop, etc.
• Arithmetic instructions
- Include those instructions that use integers and floating point
numbers.
- As with the data movement instructions, there are sometimes
different instructions for providing various combinations of
register and memory accesses in different addressing modes.
- Examples: Add, Subtract, Multiply, Increment, Decrement, etc.
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Instruction types
Instruction types
Instructions fall into several broad categories:
• Boolean Instructions
- Perform Boolean expressions.
- Commonly used to control I/O devices.
- Examples: Not, Or, Xor, Test, compare, etc.
• Bit manipulation instructions
- Used for setting and resetting individual bits (or
sometimes groups of bits) within a given data word.
- Examples: Shift left, shift right, rotate left, rotate right
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Instruction types
Instruction types
Instructions fall into several broad categories:
• I/O instructions
- Used to communicate with input/output devices
- Examples: Input, Output.
• Control transfer Instructions
- Include branches, skips and procedure calls.
- Examples: For MARIE we have Jump, skipcond and JnS.
• Special purpose Instructions
- Include those used for string processing, high-level language
support, protection, flag control, and cache management.
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Instruction types
Instruction types
When designing an instruction set for a given
architecture, we must respect the following:
• Create a complete instruction set.
• Be carful not to add redundant instructions
• We should respect instructions orthogonality
- Each instruction should perform a unique function
without duplicating any other instruction
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Lecture Overview
Instruction formats
Expanding Opcodes
Addressing
• Introduction
• Addressing Modes
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Addressing
Addressing - Introduction
Addressing modes specify where an operand
is located.
They can specify a constant, a register, or a
memory location.
The actual location of an operand is its
effective address.
Certain addressing modes allow us to
determine the address of an operand
dynamically.
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Addressing
Addressing Modes
Immediate addressing
• The data is part of the instruction.
• Example: Load 008
- The numeric value 8 is loaded into the AC
Direct addressing
• The address of the data is given in the instruction.
• Example: Load 008
- The data value found at memory address 008 is loaded into the
AC
Register addressing
• The data is located in a register.
• Example: Load R1.
- The contents of R1 register is used as the operand.
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Addressing
Addressing Modes
Indirect addressing
• Gives the address of the address of the data in
the instruction.
• Example Load 008
- The data value found at memory address 008 is
actually the effective address of the desired operand.
→Suppose we find the value 2A0 stored in location 008.
→2A0 is the “real” address of the value we want.
→The value found at location 2A0 is then loaded into the AC
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Addressing
Addressing Modes
Register indirect addressing
• Uses a register to store the effective address of
the data.
• Works exactly the same way as indirect
addressing mode, except it uses a register instead
of a memory address to point to the data.
• Example: Load R1
- The effective address of the desired operand is found
in R1.
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Addressing
Addressing Modes
Indexed addressing: use X + offset R1
• uses a register (implicitly or explicitly) as an
offset, which is added to the address in the
operand to determine the effective address of the
data.
• Example: Load R1,X where the index register R1
holds the value 1.
- The effective address of the operand in actually X + 1
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Addressing
Addressing Modes
Based addressing: use R1 + offset X
• Similar to indexed addressing except that a base
register is used instead of an index register.
• An index register holds an offset relative to the
address given in the instruction, but a base register
holds a base address where the address field
represents a displacement from this base.
• Example: Load R1,X where the base register holds the
value 3.
- The effective address of the operand is actually X +3
Stack addressing
• The operand is assumed to be on top of the stack.
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Addressing
Addressing Modes
Example: For the instruction shown, what
value is loaded into the accumulator for each
addressing mode?
800
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Addressing
Addressing Modes
Example: For the instruction shown, what
value is loaded into the accumulator for each
addressing mode?
800
900
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Addressing
Addressing Modes
Example: For the instruction shown, what
value is loaded into the accumulator for each
addressing mode?
800
900
1000
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Addressing
Addressing Modes
Example: For the instruction shown, what
value is loaded into the accumulator for each
addressing mode?
800 + 800 = 1600
800
900
1000
700
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