CSE

Computer Architecture
2105

Execution Unit

Moniruzzaman
Lecturer
North Western University, Khulna-9000
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Moniruzzaman | Lecturer, CSE_NWU

 Confession
✿ Most of the materials have been collected from Internet.
✿ Images are taken from Internet.
✿ Various books are used to make these slides.
✿ Various slides are also used.
✿ References & credit:
○ Atanu Shome, Assistant Professor, CSE, KU.
○ Computer Organization and Design: the Hardware/Software Interface - Textbook by David A Patterson and John
L. Hennessy.
○ Computer Organization and Architecture - Book by William Stallings

moniruzzaman
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Moniruzzaman | Lecturer, CSE_NWU
Execution An execution unit (EU) is a component of a computer's
hardware that performs instructions, also known as functional
Unit units. EUs are separate blocks that perform arithmetic, logic,
branching, and other actions. They work in parallel and can work
on a different task at the same time as other parts.

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Multiplexer A multiplexer is a combinational circuit that has many data
inputs and a single output, depending on control or select
inputs.

For N input lines, log2(N) selection lines are required,

or equivalently, for 2n input lines, n selection lines are needed.

Multiplexers are also known as “N-to-1 selectors,”

parallel-to-serial converters, many-to-one circuits, and universal
logic circuits.

They are mainly used to increase the amount of data that can be
sent over a network within a certain amount of time and
bandwidth.

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Moniruzzaman | Lecturer, CSE_NWU
Multiplexer

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Moniruzzaman | Lecturer, CSE_NWU
Registers General-purpose registers (GPRs)- and dedicated registers are
two types of registers in a CPU.

GPRs are special memory cells that can be accessed quickly and
temporarily store data and control information.

They are not dedicated to specific tasks and can be used for a
wide range of instructions.

GPRs can store both data and addresses, and in some

architectures, they can also store floating-point numbers.

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Moniruzzaman | Lecturer, CSE_NWU
Registers Dedicated registers- are reserved for a specific purpose or role
essential to the running of the processor.

Here are some examples of special-purpose registers:

⭓ Program Counter (PC): Keeps track of the next instruction
to be executed

⭓ Instruction Register (IR): Holds the current instruction

being executed

⭓ Stack pointer (SP): Keeps track of program flow and

manages the stack

⭓ Status register (SR/FLAGS): Stores flags indicating the

status of operations

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Moniruzzaman | Lecturer, CSE_NWU
Shift
Operation

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Moniruzzaman | Lecturer, CSE_NWU
General
Purpose
Registers

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Moniruzzaman | Lecturer, CSE_NWU
4 Bit
General
Purpose
Register

s1 s0 Operation

0 0 No operation

0 1 Shift right

1 0 Parallel load

1 1 Shift left
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Moniruzzaman | Lecturer, CSE_NWU

 Adder

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Moniruzzaman | Lecturer, CSE_NWU
One-bit
full
adder

Sum, S = A ′B ′C in +A ′BC ′in +AB ′C ′in +ABC in = A⊕B⊕C in

Carry,C = AB+AC in +BC in

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Moniruzzaman | Lecturer, CSE_NWU
One-bit Sum, S = A ′B ′C in +A ′BC ′in +AB ′C ′in +ABC in = A⊕B⊕C in
full Carry,C = AB+AC in +BC in
adder
Or
Ripple
Carry
Adder

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Moniruzzaman | Lecturer, CSE_NWU
One-bit
full
adder
Or
Ripple
Carry
Adder

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Moniruzzaman | Lecturer, CSE_NWU
4-BIT
Ripple
Carry
Adder

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Moniruzzaman | Lecturer, CSE_NWU
16-BIT
Ripple
Carry
Adder

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Moniruzzaman | Lecturer, CSE_NWU
 Carry Look-Ahead Adder

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Moniruzzaman | Lecturer, CSE_NWU
Carry
Look
Ahead
Adder

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Moniruzzaman | Lecturer, CSE_NWU
Carry Gi and Pi are called the carry generate and carry propagate terms,
respectively. Notice that the generate and propagate terms only depend on
Look the input bits and thus will be valid after one and two gate delay,
respectively. If one uses the above expression to calculate the carry signals,
Ahead one does not need to wait for the carry to ripple through all the previous
stages to find its proper value.
Adder Let’s i = 0, 1, 2, 3 apply this to a -bit adder to make it clear. Putting in
Equation 5, we get

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Moniruzzaman | Lecturer, CSE_NWU
Carry
Look
Ahead
Adder

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Moniruzzaman | Lecturer, CSE_NWU
 ALU Design

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Moniruzzaman | Lecturer, CSE_NWU
4 BIT
Arithmetic
Unit

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Moniruzzaman | Lecturer, CSE_NWU
4 Bit
Logic
Unit

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Moniruzzaman | Lecturer, CSE_NWU
4 BIT
Logic
Unit
Select lines Output

s1 s0

0 0 X+Y

0 1 X +Y+1

1 0 X And Y

1 1 X Ex-OR Y
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 ありがとう Japanese

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Moniruzzaman | Lecturer, CSE_NWU