Here's your assignment completed with more detailed explanations for each point:
1. Effective Address Evaluation (All values are in hexadecimal)
Given:
Instruction at location 700
Address field at location 701 with value 300
Register R1 = 800
Let’s evaluate the Effective Address (EA) for each addressing mode:
a) Direct Addressing Mode
EA = Address field value
EA = 300
� In this mode, the address field directly contains the effective address.
b) Immediate Addressing Mode
The operand is part of the instruction itself.
EA is not used.
Operand = 300
�The value 300 is treated as data, not an address.
c) Relative Addressing Mode
EA = (Address field) + (Program Counter)
Let’s assume PC (Program Counter) is at 702 (next instruction after 701)
EA = 300 + 702 = A02
�The address is computed relative to the current PC.
d) Register-Indirect Addressing Mode
EA = Contents of the register
EA = R1 = 800
�The operand is stored at the memory location pointed to by R1.
e) Auto-Decrement Addressing Mode
Register is decremented first, then used as address
R1 = R1 - 1 = 800 - 1 = 7FF
EA = 7FF
�Useful in stack operations or reverse traversal.
f) Index Addressing Mode (R1 is Index Register)
EA = Address field + Index Register = 300 + 800 = B00
�The operand is found at the computed address by indexing.
2. Difference Between RISC and CISC
RISC (Reduced Instruction Set CISC (Complex Instruction Set
Feature
Computer) Computer)
Instruction Set Few, simple instructions Many complex instructions
Execution
Faster, single clock cycle Slower, multiple cycles
Speed
Hardware Simpler hardware More complex hardware
Memory Use More instructions = more memory Less instructions = less memory
Programming Harder, more lines of code Easier, fewer lines of code
�Summary: RISC focuses on performance and efficiency, while CISC aims for ease of
programming with complex instructions.
3. Cache Mapping Functions
Cache mapping determines how memory blocks are placed in cache. There are 3 types:
a) Associative Mapping
Any block of main memory can go to any line of cache.
Needs a tag to identify the block.
�High flexibility, � Expensive due to complex hardware.
Diagram:
scss
CopyEdit
Main Memory Block → Cache Line (any)
Block address → [Tag | Data]
b) Direct Mapping
Each block of main memory maps to only one cache line.
Line number = (Block number) MOD (Number of lines in cache)
�Simple, fast � May cause conflicts.
Diagram:
scss
CopyEdit
Main Memory Block 5 → Cache Line (5 % N)
c) Set-Associative Mapping
Compromise between the above two.
Cache divided into sets; each set contains several lines.
Block maps to a specific set, but can go to any line in that set.
�Balance of cost and performance.
Diagram:
mathematica
CopyEdit
Main Memory Block 10 → Set (10 % Number of Sets)
Set contains multiple lines → [Tag | Data]
4. Short Notes
➤ Input-Output Controller (IOC)
Acts as an interface between CPU and I/O devices.
Manages data transfer and control signals.
Functions include buffering, error checking, and device control.
Allows asynchronous data transfer without CPU interruption.
➤ Serial Communication
Data is transmitted bit by bit over a single channel.
Used in USB, RS-232, Bluetooth.
Advantages:
o Requires fewer wires.
o Long-distance communication possible.
Disadvantages:
o Slower than parallel communication.
