Module 2: Digital VLSI Circuits

Lecture 3: Pre-requisite (Recapitulation): Knowledge about MOS, MOS-Characteristics

3.1 Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

The MOSFET, which is commonly known as MOS transistor has four terminals. The source
terminal serves as the source of carriers of either electron or hole. The drain terminal collects the
carriers flown from the source terminal. The carriers flow from the source to the drain terminal
through a conducting path called channel. The flow of carriers in the channel is controlled by
applying voltage at a third terminal called gate of the MOSFET. The channel can be created either
physically or electrically. Depending on how the channel is created, MOSFETs are classified into
two types:
(a) Enhancement type and (b) Depletion type.

Enhancement-type MOSFET If the MOSFET is normally OFF, and is turned ON by applying

voltage at the gate terminal, then the MOSFET is known as enhancement-type MOSFET.

Depletion-type MOSFET If the MOSFET is normally ON, and is turned OFF by applying voltage
at the gate terminal, then the MOSFET is known as depletion-type MOSFET.

In the enhancement-type MOSFET, the channel is created electrically by applying voltage at the
gate terminal; in the depletion-type MOSFET, the channel is created physically by introducing a
physical layer between the source and drain at the time of manufacturing. Figure shows the cross-
sectional view of the enhancement-type and depletion-type MOSFETs.

Enhancement Type Depletion type

Symbol of enhancement and Depletion mode transistor

3.2 Structure of Enhancement transistor
A semiconductor, either p-type or n-type, is taken as a substrate. On the substrate, two diffusion
regions are created. If the substrate is p-type, the diffusion regions are n+ type (n+ indicates heavily
doped n-type). If the substrate is n-type, the diffusion regions are p+-type (p+ indicates heavily
doped p-type). The diffusion regions are known as source and drain. Between the source and drain,
an oxide layer is formed on top of the substrate. The oxide layer is known as gate oxide and it
plays a very important role in determining the MOSFET characteristics. On top of the oxide layer
a metal or poly silicon is deposited. Then four metal contacts are taken from the source, gate, drain,
and the bulk to form the electrodes. Essentially, a MOSFET is a four-terminal device with the
terminals drain, gate, source, and bulk/body.

Structure of nMOS Structure of pMOS

Symbol of nMOS Symbol of pMOS

3.3 Operation of nMOS Transistor
The basic structure of the n-channel MOS (nMOS) transistor built on a p-type substrate is shown
in Fig. The MOSFET consists of a MOS capacitor with two p-n junctions placed immediately
adjacent to the channel region that is controlled by the MOS gate. The carriers, i.e., electrons in
an nMOS transistor, enter the structure through the source contact (S), leave through the drain (D),
and are subject to the control of the gate (G).
CASE I: When 0 < VGS < VT, the gated region between the source and the drain is depleted; no
carrier flow can be observed in the channel. So the transistor is in OFF condition.

CASE II: As the gate voltage is increased beyond the threshold voltage (VGS > VT), however, the
mid-gap energy level at the surface is pulled below the Fermi level, causing the surface potential
to turn positive and to invert the surface. Once the inversion layer is established on the surface, an
n-type conducting channel forms between the source and the drain, which is capable of carrying
the drain current. , the influence of drain-to-source bias VDS and different modes of drain current
flow will be examined for an nMOS transistor with VGS > VT.

At VDS = 0, thermal equilibrium exists in the inverted channel region, and the drain current ID=0.
If a small drain voltage VDS > 0 is applied, a drain current proportional to VDS will flow from the
source to the drain through the conducting channel. The inversion layer, i.e., the channel, forms a
continuous current path from the source to the drain. This operation mode is called the linear mode,
or the linear region. Thus, in linear region operation, the channel region acts as a voltage-controlled
resistor. The electron velocity, in the channel for this case is usually much lower than the drift
velocity limit.

As the drain voltage is increased, the inversion layer charge and the channel depth at the drain
end start to decrease. Eventually, for VDS = VDSAT, the inversion charge at the drain is reduced to
zero, which is called the pinch-off point.
Beyond the pinch-off point, i.e., for VDS > VDSAT, a depleted surface region forms adjacent to the
drain, and this depletion region grows toward the source with increasing drain voltages. This
operation mode of the MOSFET is called the saturation mode or the saturation region; For a
MOSFET operating in the saturation region, the effective channel length is reduced as the
inversion layer near the drain vanishes, while the channel-end voltage remains essentially constant
and equal to VDSAT .

Note that the pinched-off (depleted) section of the channel absorbs most of the excess voltage drop
(VDS – VDSAT) and a high-field region forms between the channel-end and the drain boundary.
Electrons arriving from the source to the channel-end are injected into the drain-depletion region
and are accelerated toward the drain in this high electric field, usually reaching the drift velocity
limit. The pinch-off event, or the disruption of the continuous channel under high drain bias,
characterizes the saturation mode operation of the MOSFET.
3.3 MOS I-V Characteristics (Resistive Operation)

Assume now that VGS > VT and that a small voltage, VDS, is applied between drain and source. The
voltage difference causes a current ID to flow from drain to source (Figure). Using a simple
analysis, a first-order expression of the current as a function of VGS and VDS can be obtained.

At a point x along the channel, the voltage is V(x), and the gate-to-channel voltage at that point
equals VGS – V(x). Under the assumption that this voltage exceeds the threshold voltage all along
the channel, the induced channel charge per unit area at point x can be computed.
Qi x = –Cox VGS – Vx– VT 

Cox stands for the capacitance per unit area presented by the gate oxide, and equal
𝜀𝑜𝑥
𝐶𝑜𝑥 =
𝑡𝑜𝑥
with 𝜀𝑜𝑥 = 3.97𝜀𝑜 = 3.5 10-11 F/m the oxide permittivity, and 𝑡𝑜𝑥 is the thickness of the oxide.
The latter which is 10 nm (= 100 Å) or smaller for contemporary processes. For an oxide thickness
of 5 nm, this translates into an oxide capacitance of 7 fF/m2.
The current is given as the product of the drift velocity of the carriers 𝑣𝑛 and the available charge.
Due to charge conservation, it is a constant over the length of the channel. W is the width of the
channel in a direction perpendicular to the current flow.

The electron velocity is related to the electric field through a parameter called the mobility n
(expressed in m2/Vs). The mobility is a complex function of crystal structure, and local electrical
field. In general, an empirical value is used.
Combining Eq. (3.20) Eq. (3.23) yields

Integrating the equation over the length of the channel L yields the voltage-current relation of the
transistor.
1 𝑊 2
𝐼𝐷 = 2 𝜇𝑛 𝐶𝑜𝑥 (2(𝑉𝐺𝑆 − 𝑉𝑇 )𝑉𝐷𝑆 − 𝑉𝐷𝑆 )……..(1)
𝐿

Or
𝑊 2
𝐼𝐷 = 𝑘 ′ 2.𝐿 (2(𝑉𝐺𝑆 − 𝑉𝑇 )𝑉𝐷𝑆 − 𝑉𝐷𝑆 )

Or
𝑘 2
𝐼𝐷 = 2 (2(𝑉𝐺𝑆 − 𝑉𝑇 )𝑉𝐷𝑆 − 𝑉𝐷𝑆 )

The drain current equation is the simplest analytical approximation for the MOSFET current-
voltage relationship. Note that, in addition to the process dependent constants k' and V, the current-
voltage relationship is also affected by the device dimensions, W and L. In fact, we will see that
𝑊
the ratio of 𝐿 is one of the most important design parameters in MOS digital circuit design.
To examine the effect of the gate-to-source voltage and the drain-to-source voltage upon the drain
current, we will plot ID as a function of VDS, for different (constant) values of VGS. It can easily be
seen that the second-order current-voltage equation given above produces a set of inverted
parabolas for each constant VGS value.
The Saturation Region

As the value of the drain-source voltage is further increased, the assumption that the channel
voltage is larger than the threshold all along the channel ceases to hold. This happens when VGS
V(x) < VT. At that point, the induced charge is zero, and the conducting channel disappears or
is pinched off. This is illustrated in Figure which shows (in an exaggerated fashion) how the
channel thickness gradually is reduced from source to drain until pinch-off occurs. No channel
exists in the vicinity of the drain region. Obviously, for this phenomenon to occur, it is essential
that the pinch-off condition be met at the drain region, or

VGSVDS VT.
Under those circumstances, the transistor is in the saturation region, and Eq. 1 no longer holds.
The voltage difference over the induced channel (from the pinch-off point to the source) remains
fixed at VGSVT, and consequently, the current remains constant (or saturates). Replacing VDS
by VGS VT in Eq. 1 yields the drain current for the saturation mode. It is worth observing that, to
a first agree, the current is no longer a function of VDS. Notice also the squared dependency of the
drain current with respect to the control voltage VGS.
So the equation becomes

1 𝑊
𝐼𝐷 = 2 𝜇𝑛 𝐶𝑜𝑥 (𝑉𝐺𝑆 − 𝑉𝑇 )2 ……..(2)
𝐿

Thus, the drain current ID becomes a function only of the gate-to-source voltage VGS, beyond the
saturation boundary. Note that this constant saturation current approximation is not very accurate
in reality, and that the saturation-region drain current continues to have a certain dependence on
the drain voltage.
Channel Length Modulation

The latter equation seems to suggest that the transistor in the saturation mode acts as a perfect
current source — or that the current between drain and source terminal is a constant, independent
of the applied voltage over the terminals. This not entirely correct. The effective length of the
conductive channel is actually modulated by the applied VDS: increasing VDS causes the depletion
region at the drain junction to grow, reducing the length of the effective channel. As can be
observed from Eq., the current increases when the length factor L is decreased.

In saturation region the current equation is given by

1 𝑊
𝐼𝐷 = 2 𝜇𝑛 𝐶𝑜𝑥 (𝑉𝐺𝑆 − 𝑉𝑇 )2
𝐿

Due to channel pinch off as shown in figure we can write the current equation as
1 𝑊
𝐼𝐷 = 2 𝜇𝑛 𝐶𝑜𝑥 𝐿−𝛥𝐿 (𝑉𝐺𝑆 − 𝑉𝑇 )2 (L’=L-ΔL)
1 𝑊 1
 𝐼𝐷 = 2 𝜇𝑛 𝐶𝑜𝑥 (𝑉𝐺𝑆 − 𝑉𝑇 )2
𝐿 (𝐿−𝛥𝐿)1
𝐿
1 𝑊
 𝐼𝐷 = 𝜇 𝐶 (𝑉𝐺𝑆 − 𝑉𝑇 )2 (1+𝑉𝐷𝑆 ) …….(3) [𝑉𝐷𝑆 <<1]
2 𝑛 𝑜𝑥 𝐿

Here,  is an empirical model parameter, and is called the channel length modulation coefficient.
From eq 3 it can be said that current will increase a little in this scenario.
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Summary
 Current-voltage equation for nMOSFET

Current-Voltage equation for pMOSFET

----------------------------------------------------END OF LECTURE-------------------------------------------------

Reference:
1. CMOS Digital Integrated Circuit, S.M.Kang & Y.Leblebici, TMH.
2. VLSI Design, Debaprasad Das, OUP
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Prepared By
Tapas Tewary and Subham Pramanik, ECE Department, Academy of Technology