® TDA7433

BASIC FUNCTION AUDIO PROCESSOR

TWO STEREO AND ONE MONO INPUTS

CONTROLLED
MUTE FUNCTION (SOFTWARE AND HARD-
WARE)
VOLUME CONTROL IN 1dB STEP
FOUR SPEAKER ATTENUATORS:
( s )
– Independent attenuation control
– Independent mute function
u ct
ALL FUNCTIONS PROGRAMMABLE VIA
I2CBUS
o d
P r SO20
DESCRIPTION
The TDA7433 is a volume, tone (bass and treble)
e t e
ORDERING NUMBER: TDA7433D
balance (Left/Right) processor for quality audio
applications in car radio and Hi-Fi systems.
o l
Control is accomplished by serial bus microproc-
b s
essor interface.
The AC signal setting is obtained by resistor net-
- O Thanks to the advanced BIPOLAR/CMOS Tech-
nology, the external components have been re-
works and switches combined with operational
amplifiers.
(s ) duced.

BLOCK DIAGRAM
c t
d u
r o 4.7K
2.7nF

P
100nF 100nF

e t e BINL
10
BOUTL
9
TRL
11

o l 6
SPKR
ATT
16
LEFT FRONT

bs
IN1_L
3
IN2_L SPKR 14
MUX VOL BASS TREBLE ATT LEFT REAR

O 4
18
SCL
MONO IN/MUTE S BUS DECODER + LATCHES 19
SDA

SPKR 15
2 MUX VOL BASS TREBLE RIGHT FRONT
IN2_R ATT
5
IN1_R
SPKR 13
17 RIGHT REAR
VS SUPPLY ATT

20 1 8 7 12
GND CREF BINR BOUTR TRR D95AU354A
2.7nF
100nF 100nF
4.7K

November 1999 1/10

 TDA7433

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
VS Operating Supply Voltage 10.2 V
Tamb Operating Temperature Range -40 to 85 °C
Tstg Storage Temperature Range -55 to +150 °C

QUICK REFERENCE DATA

Symbol Parameter Min. Typ. Max. Unit
VS Supply Voltage 7 9 10.2 V
VCL Max. Input Signal Handling 1.3 1.6 Vrms

(s)
THD Total Harmonic Distortion (V = 1Vrms f = 1kHZ) 0.05 %
S/N
Sc
Signal to Noise Ratio
Channel Separation f = 1kHz
102
100
c t dB
dB

u
od
Volume Control 1dB step -79 +32 dB
Bass Control 2dB step -18 +18 dB
Treble Control 2dB step
Speaker Attenuators P r-14
-37.5
+14
0
dB
dB
e
let
Mute Attenuation 100 dB

s o
PIN CONNECTION (Top View)

O b
) -
t ( s
u
CREF
c 1 20 GND

o d IN2_R 2 19 SDA

Pr
IN2_L 3 18 SCL
MONO IN/MUTE 4 17 VS

e t e IN1_R 5 16 OUT_LF

s ol IN1_L 6 15 OUT_RF

O b BOUT_R
BIN_R
7
8
14
13
OUT_LR
OUT_RR
BOUT_L 9 12 TRR
BIN_L 10 11 TRL
D95AU355A

THERMAL DATA
Symbol Parameter Value Unit
Rth j-pins Thermal Resistance Junction-pins Max. 150 °C/W

2/10
 TDA7433

APPLICATION DIAGRAM

4.7K
2.7nF
100nF 100nF

BINL BOUTL TRL

10 9 11
SPKR 16
100nF LEFT FRONT
IN1_L 6 ATT

IN2_L 3
MUX VOL BASS TREBLE
SPKR
ATT
14

s )
LEFT REAR

(
ct
100nF

du
100nF 18
4 SCL
S BUS DECODER + LATCHES 19

ro
MONO/ SDA
MUTE

100nF
IN2_R 2

e P SPKR 15

IN1_R 5
MUX VOL BASS

l e t
TREBLE
ATT
RIGHT FRONT

VS 9V
100nF VS 17
SUPPLY
s o SPKR
ATT
13
RIGHT REAR

100nF
20 1

O
8b 7 12

)-
GND CREF BINR BOUTR TRR D95AU356A
10µF 2.7nF

s
100nF 100nF

c t ( 4.7K

d u
r o
e P
l e t
s o
O b

3/10
TDA7433

ELECTRICAL CHARACTERISTICS (Tamb = 25°C, VS = 9V, RL = 10kΩ, Rg = 50Ω,

all variable gains = 0dB, f = 1kHz, unless otherwise specified.)
Symbol Parameter Test Condition Min. Typ. Max. Unit
INPUT SELECTOR
RIN Input Resistance 70 100 130 kΩ
VCL Clipping Level d ≤ 0.3% 1.3 1.6 Vrms
SIN Input Separation 70 100 dB
AMUTE Input Mute Attenuation 70 95 dB
VDC Mute DC Step 0.2 10 mV
MUTE AT AM INPUT (*)
VIL Input Low Voltage AM not selected 0.4 V
VOLUME CONTROL

( s )
ct
GMAX Max. Gain Note 2 30.5 32 33.5 dB
AMAX Max Attenuation 75 79 83 dB
Astep Step Resolution 0.5
d u
1 1.5 dB
EA Attenuation Set Error G = +20 to -20dB
r-1.0
o 0 +1.0 dB

ET Tracking Error
G = -20 to -60dB
G = -20 to -60dB
e P -2 2
2
dB
dB

let
VDC DC Steps Adjacent Attenuation Steps, 0.1 4 mV
Range from 0 to -79dB

BASS CONTROL
From 0dB to -79dB

b so 0.5 10 mV

BRANGE Max. Bass boost

O 15.5 18 20 dB

)-
BCUT Max. Bass cut -20 -18 15.5 dB

s
AStep Step Resolution 1 2 3 dB
RB Internal Feedback Resistance
TREBLE CONTROL
c t ( 48 65 82 kΩ

CRANGE Control Range

d u ±13 ±14 ±15 dB
Astep Step Resolution
r o 1 2 3 dB
SPEAKER ATTENUATORS
CRANGE
e P
Control Range 36 37.5 39 dB
Astep
AMUTE
l e tStep Resolution
Output Mute Attenuation
From 0 to -24dB
From 0 to -24dB
0.5
70
1
90
1.5 dB
dB

o
bs
EA Attenuation Set Error 1 dB
VDC DC Steps Adjacent Attenuation Steps 0.1 4 mV

O AUDIO OUTPUTS
VCLIP Clipping Level d = 0.3% 2 2.5 Vrms
GOUT Output Gain (fixed) 4 dB
RL Output Load Resistance AC - connected 3 kΩ
DC connected to GND 5
CL Output Load Capacitance 10 nF
ROUT Output Impedance 30 100 Ω
VDC DC Voltage Level 3.7 4.0 4.3 V
(*) The mute function can be activated without using the I2C bus by grounding the AM input when AM is not selected. This causes the input
multiplexer to select the reference voltage instead of an input signal.

4/10
 TDA7433

ELECTRICAL CHARACTERISTICS (continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit
GENERAL
VS Supply Voltage 6 9 10.2 V
IS Supply Current 5 8 11 mA
PSRR Power Supply Rejection Ratio 65 85 dB
eNO Output Noise 20Hz - 20kHz "A" - weighted 4 µV
BW = 200Hz - 20kHz, flat 7.0 20 µV
output muted 5.5 µV
S/N Signal to Noise Ratio all gains = 0dB; VO = 1Vrms 102 dB
d Distortion VOUT = 1Vrms 0.05 0.15 %
Sc Channel Separation 70 80

( s ) dB

ct
ET Total Tracking Error AV = 0 to -20dB 0 1 dB
AV = -20 to -60dB 0 2 dB
BUS INPUTS
VIL Input Low Voltage
d u 1 V
VIH Input High Voltage
r 3 o V
IIN Input Current VIN = 0.4V

e P -5 +5 µA
VO Output Voltage
SDA Acknowledge
IO = 1.6mA

l e t 0.15 0.4 V

SOFTWARE SPECIFICATION
s o
Interface Protocol
O b
The interface protocol comprises:
– a start condition (S)
) -
– a subaddress byte
c t (s
– a chip address byte (the LSB bit determines read /write transmission)

– a sequence of data (N-bytes + acknowledge)

d u
– a stop condition (P)
r o
P
CHIP ADDRESS

e
SUBADDRESS DATA 1...DATA n

MSB
l e t LSB MSB LSB MSB LSB

s o
O b
S 1 0 0
ACK = Acknowledge
0 1 0 1 R/W ACK X X X I A3 A2 A1 A0 ACK DATA ACK P

S = Start
P = Stop
MAX CLOCK SPEED 500kbits/s

Auto Increment
If bit I in the subaddress byte is set to "1", the autoincrement of the subaddress is enabled.

5/10
TDA7433

SUBADDRESS (receive mode)

MSB LSB
FUNCTION
X X X I A3 A2 A1 A0
0 0 0 0 Input selector
0 0 0 1 Volume
0 0 1 0 Bass, Treble
0 0 1 1 Speaker attenuator LF
0 1 0 0 Speaker attenuator LR
0 1 0 1 Speaker attenuator RF
0 1 1 0 Speaker attenuator RR

I = Auto increment
X = Not used

( s )
ct
DATA BYTE SPECIFICATION
X = not relevant; set to "1" during testing
Input Selector
d u
MSB LSB
r o
D7 D6 D5 D4 D3 D2 D1 D0

e P FUNCTION

0
0
0
0
0
1
0
1
0
IN2
IN1
mono IN
l e t
0 1 1
s o
no input selected

0
1
1 X X

O b mute (low homic)

non-symmetrical bass cut (note 1)
symmetrical bass cut
0
1
) - extended bass range
standard bass range ±14dB

t (s
For example to select the IN2 input the Data Byte is: X X X X X 0 1 0.
c
An additional direct mute function is included in the Speaker Attenuators.

d
Note 1: Bass cut for very low frequencies.u
r o
e P
l e t
MSB
o LSB

bs
VOLUME
D7 D6 D5 D4 D3 D2 D1 D0

O 0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
+32dB
+16dB
0dB
-16dB
0 1 0 0 -32dB
0 1 0 1 -48dB
0 1 1 0 -64dB
0 0 0 0 0 0dB
0 0 0 0 1 -1dB
0 0 0 1 0 -2dB
0
0 1 1 1 1 -15dB

Note 2:
It is not recommended to use a gain more than 20dB for system performance reason. In general, the max. gain should be limited by
software to the maximum value, which is needed for the system.

6/10
 TDA7433

Bass, Treble
MSB LSB
FUNCTION
D7 D6 D5 D4 D3 D2 D1 D0
Treble Steps
0 0 0 0 - 14dB
0 0 0 1 -12dB
0 0 1 0 -10dB
0 0 1 1 -8dB
0 1 0 0 -6dB
0 1 0 1 -4dB
0 1 1 0 -2dB
0 1 1 1 0dB
1 1 1 1 0dB
1
1
1
1
1
0
0
1
+2dB
+4dB
( s )
ct
1 1 0 0 +6dB
1 0 1 1 +8dB
D4 1
1
0
0
1
0
0
1
+10dB
+12dB
d u
Input
Selector 1 0 0 0 +14dB
r o
0 0 0 0 1
Bass Steps
-18dB
e P
0
1
0
0
0
0
0
0
0
0
-16dB
-14dB
l e t
1
1
0
0
0
0
0
1
1
0
s
-12dB
-10dBo
1
1
1
0
0
0
0
1
1
1
0
0
1
0
1
O b -8dB
-6dB
-4dB
1
1
0
0
1
1
1
1
0
1
) - -2dB normal
0dB range
1
1
1
1
1
1
1
1
1
1
1
0
1
0
1
c t (s 0dB ±14dB
+2dB
+4dB
1
1
1
1
1
0
0
1
0

d
1 u +6dB
+8dB
1
1
1
1
0
0
1
0 r o 0
1
+10dB
+12dB
1
0
1
1
0

e
0 P 0
0
0
0
+14dB
+16dB
0

l
1
e t 0 0 1 +18dB

o
For example 12dB Treble and -8dB Bass give the following DATA BYTE: 0 0 1 1 1 0 0

s
O b
Speaker Attenuators
MSB LSB SPEAKER ATTENUATOR
D7 D6 D5 D4 D3 D2 D1 D0 LF,LR,RF,RR
X X 0 0 0 0 0 0 0dB
X X 0 0 0 0 0 1 -1dB
: :
X X 0 1 1 0 0 0 -24dB
X X 0 1 1 0 0 1 -25.5dB
X X 0 1 1 0 1 0 -27dB
X X 0 1 1 0 1 1 -28.5dB
X X 0 1 1 1 0 0 -30dB
X X 0 1 1 1 0 1 -32dB
X X 0 1 1 1 1 0 -34.5dB
X X 0 1 1 1 1 1 -37.5dB

X X 1 X X X X X Speaker Mute

7/10
 TDA7433

Functional Description mined by the external filter components. An ex-

tensive simulation software is available in order to
The input selector is able to select 2 stereo inputs support the design of the bass filter response with
and 1 mono input (AM). The inputs are DC biased different filter configurations.
with 100kΩ resistors to the internal reference volt- The extended bass boost range of +18dB allows
age of 3V. The mono input can be used addition- the implementation of the software loudness func-
ally as hardware mute pin. If this pin is pulled to tion by additional bass and treble boost.
ground by an external transistor and AM is not se-
lected, the input selector mutes the input (refer- The treble control acts in a range of ±14dB in 2dB
ence voltage selected). The AM part is consid- steps. The external capacitor determines with the
ered to be switched OFF. If the output of the AM internal resistor of 50KΩ the corner frequency of
part is not high ohmic in this condition, a series the treble response.
resistor of about 20kΩ has to be foreseen. The four speaker attenuators can be controlled in-
The volume control can be programmed from a dependently from 0 to -37.5dB, which allows the
gain of +32dB to an attenuation of -79dB in 1dB
steps. The maximum gain should be kept as low
( s )
implementation of balance and fader a the four
speaker system. The attenuation steps size is 1

ct
as possible for system performance reason. It has db from 0 to -24dB and increases non linearly up
to the maximum attenuation of 37.5dB. A special
to be limited by software to the absolute neces-
sary system gain, depending on the signal source
mute position.
d u
mute bit forces the speaker attenuator into the
level and the power amplifier gain.
The bass control acts in a range from +18dB to - r o
All 4 outputs are low distortion push pull outputs,
18dB in 2dB steps. The filter response is deter-
e P
able to drive a load of 3kΩ.

l e t
s o
O b
) -
c t (s
d u
r o
e P
l e t
s o
O b

8/10
 TDA7433

mm inch
DIM. OUTLINE AND
MECHANICAL DATA
MIN. TYP. MAX. MIN. TYP. MAX.

A 2.35 2.65 0.093 0.104

A1 0.1 0.3 0.004 0.012

B 0.33 0.51 0.013 0.020

C 0.23 0.32 0.009 0.013

D 12.6 13 0.496 0.512

( s )
E 7.4 7.6 0.291 0.299

uct
e 1.27 0.050

o d
H 10 10.65 0.394 0.419
P r
h 0.25 0.75 0.010 0.030

e te
o l
s
L 0.4 1.27 0.016 0.050

K 0˚ (min.)8˚ (max.)
O b SO20

) -
c t (s
u L

od
h x 45˚

P r A

e t e
o
B
l e K A1 C

bs
H

O D

20 11

1 0
1

SO20MEC

9/10
 TDA7433

( s )
u ct
o d
P r
e t e
o l
b s
- O
(s )
c t
d u
r o
e P
l e t
s o
O b

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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