Register No.
DIGITAL LOGIC DESGN
Model Question Paper - 1
Time - Three hours
(Maximum Marks: 100)
1. Answer all questions, choosing any two sub-divisions from each question
All questions carry equal marks. (5x20=100) (10+10)
1. a. Explain any three number system.
b. Explain how NOR can gate be used as universal gate.
c. Draw the symbol, truth table and logic equation for various logic gates.
d. Explain the significance of digital systems in modern technology.
2. a. Simplify the following Boolean equation using K-map: A BC + A BC+ A BC +ABC.
b. With neat sketch, explain the priority encoder.
c. Design a 2-bit full adder using Boolean algebra.
d. Explain the function of a digital comparator?
3. a. With logic diagram and truth table explain JK flip flop?
b. Explain how read and write operation is performed in a SIPO shift register.
c. Explain the working of decade ripple counter?
d. Explain the operation of SR flip-flops with logic diagram
4. a. Explain the operation of dual slope ADC.
b. With neat sketch, explain the working of weighted resistor DAC.
c. Describe motor interfacing using TTL and CMOS circuits.
d. Explain types of sensors used in digital interfacing.
5. a. Explain the PLA architecture with necessary diagram.
b. Implement the following Boolean expression using PAL, F1= ∑ m (3, 5, 7) and F2 = ∑ m
(4,5,7).
c. Describe memory hierarchy and management principles.
d. Differentiate between (i) fixed logic and programmable logic. (ii) Flash ROM and NVRAM.
Register No.:
DIGITAL LOGIC DESGN
Model Question Paper - 2
Time - Three hours
(Maximum Marks: 100)
1. Answer all questions, choosing any two sub-divisions from each question
All questions carry equal marks. (5x20=100) (10+10)
1. a. Construct AND, OR and NOT gates using only NAND gate.
b. Describe the process of binary number system conversion.
c. Illustrate ASCII, BCD, Gray code, and Unicode standards.
d. Describe binary arithmetic using 1’s and 2’s complements.
2. a. Explain De-Morgan’s Theorem with an example.
b. Simplify the following function using K-map: f=∑ (0, 2, 3, 5).
c. Explain the working of half and full subtractor.
d. Describe the operation of a 4-to-10-line decoder.
3. a. With timing diagram, explain the operation of SISO shift register.
b. Explain the working of 4 bit synchronous up counter with necessary sketch.
c. Explain the methods used for edge triggering flip flop.
d. Explain the design and application of asynchronous down counters
4. a. Describe TTL and CMOS interfacing with switches.
b. With neat sketch, explain the R-2R ladder DAC.
c. Explain the operation of successive approximation ADC.
d. Outline the method to interface LED using CMOS.
5. a. Explain the PAL architecture with diagram.
b. Explain the operation of pen drives and SD cards.
c. Discuss about solid state hard disk.
d. Explain memory access time and memory capacity.
