Block Diagram of IC555 Timer

The 555 timer consists of two voltage comparators, a bistable flip-flop, a discharge transistor, and a resistor divider
network. The voltage comparators, which are nothing but the operational amplifiers without any feedback. Flip-flop is
a digital circuit which has two inputs named set (S) and reset (R). The two outputs of the flip-flop are complementary
to each other, that is, if one output is 1 then the second one is 0, and vice versa. The symbol of a flip-flop is shown in
Fig.1. The output of the flip-flop (Q) is set to high (1) when the set input (S) is high (1) and the output is low when the
reset input (R) is high (1).

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In Fig.2 shows a functional block diagram of IC555.

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There are two comparators: Comparator I and Comparator II. There is a voltage divider in the form of a chain of three equal internal
resistors of 5 k each, connected between the inputs of the two comparators as shown in the figure.
This resistive divider network is used to set the comparator levels. Since all three resistors are of equal value, the threshold comparator
(Comp-I) is referenced internally at 2/3 of supply voltage level and the trigger comparator (Comp-II) is referenced at 1/3 of supply
voltage. The outputs of Comp-I and Comp-II are tied to a flip-flop. The output Q of the flip-flop is used as the
output of the IC (pin 3) while Q , is connected to the base of the discharge transistor T1,which operates in its non-linear mode (i.e. it is
either cut-off or saturated). With base at low voltage (Q = 0), it is cut off while with Q = 1, it is fully ON. When the trigger voltage is
moved below 1/3 of the supply, the trigger comparator changes state and sets the flop-flop driving the output to a high
state. Simultaneously, the transistor T1 is switched OFF and the external timing capacitor starts charging. The threshold pin normally
monitors the capacitor voltage of the timing network made of external resistor-capacitor, as will be described in the next sections. When
the capacitor voltage exceeds 2/3 of the supply, the threshold comparator resets the flip-flop which in turn drives the output to a low
state. When the output is in a low state, the discharge transistor (T1) switches ON, thereby discharging the external timing capacitor.
Once the capacitor is discharged, the timing cycle is completed, and the timer will await for the next trigger pulse.
IC555 is an 8-pin IC with pin-out diagram as shown in Fig. 3.

Pin 1 (Ground): The ground (or common) pin is the most-negative supply potential of the device, which is normally connected to
circuit common (ground) when operated from positive supply voltages.

Pin 2 (Trigger): This pin is the input to the trigger comparator (Comp-II) and is used to set the flip-flop, which in turn causes the
output to go high. This is the beginning of the timing sequence in monostable operation. Triggering is accomplished by taking the
pin from above to below a voltage level of VCC /3. The trigger pulse must be of shorter duration than the time interval determined
by the external R and C. The minimum width of the triggering pulse should be greater than 1 μs.
Pin 3 (Output): The pulsed / rectangular wave output of IC555 is obtained from this pin. The output voltage available at this pin
is approximately equal to the VCC applied to pin 8.
Pin 4 (Reset): This pin is used to externally reset the flip-flop and return the output to a low state. The reset input is an overriding
function; that is, it will force the output of flip-flop to a low state regardless of the state of either of the other inputs. It may thus be
used to terminate an output pulse prematurely. The pin is activated when a voltage level anywhere between 0 and 0.4 V is applied
to the pin. When not used, it is recommended that the reset input be tied to VCC to avoid any possibility of false resetting.

Pin 5 (Control Voltage): This pin allows direct access to the 2VCC / 3 voltage-divider point i.e. the reference level for the threshold
comparator (Comp-I). By applying a voltage to this pin, it is possible to vary the timing of the device independently of the external
timing RC network. When not in use, control-voltage pin is bypassed to ground, with a capacitor of about 0.01 μF (10 nF) for
immunity to noise.

Pin 6 (Threshold): Pin 6 is one input to the upper comparator (the other being pin 5) and is used to reset the flip-flop, which
causes the output to go low. Resetting via this terminal is accomplished by taking the terminal from below to above a voltage
level of 2Vcc/3

Pin 7 (Discharge): This pin is connected to the open collector of discharge transistor the emitter of which is internally connected
to ground. So that when the transistor is turned ON, pin 7 is effectively shorted to ground. Usually the timing capacitor is
connected between pin 7 and ground and is discharged when the transistor turns ON. The conduction state of this transistor is
identical in timing to that of the output stage. It is ON (low resistance to ground) when the output is low and OFF (high resistance
to ground) when the output is high.

Pin 8 (V +): The V+ pin (also referred to asV cc) is the positive supply voltage terminal of the 555 timer IC. Supply voltage
operating range for IC 555 is between +5 volts and + 15 volts
MONOSTABLE MULTIVIBRATOR USING IC555

This configuration requires only two external components for operation as can be seen from Fig.4.

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Applications of 555 Timer Circuit

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