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L 2

The document outlines an experiment for the Digital Integrated Circuit Sessional course at Chittagong University of Engineering Technology. It focuses on the implementation of Design Under Test and Test Bench of Sequential Logic. The experiment is submitted by a student, MD. Emran Hossain Dipu, to their lecturer, Arif Istiaque Rupom.

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MD. EMRAN HOSSAIN DIPU 1908028
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5 views1 page

L 2

The document outlines an experiment for the Digital Integrated Circuit Sessional course at Chittagong University of Engineering Technology. It focuses on the implementation of Design Under Test and Test Bench of Sequential Logic. The experiment is submitted by a student, MD. Emran Hossain Dipu, to their lecturer, Arif Istiaque Rupom.

Uploaded by

MD. EMRAN HOSSAIN DIPU 1908028
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CHITTAGONG UNIVERSITY OF ENGINEERING TECHNOLOGY

Department of Electronics and Telecommunication Engineering

Digital Integrated Circuit Sessional


ETE 462

Experiment Name : Implementation of Design Under Test and Test


Bench of Sequential Logic
Experiment NO : 02

Submitted By Submitted To
MD.Emran Hossain Dipu Arif Istiaque Rupom
ID:1908028 Lecturer
Dept. Of ETE

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