Lecture Outline
Csci136 Computer Architecture II Administrivia – syllabus
– Introduction
Introduction, Technology Trend
Xiuzhen Cheng
[email protected]
Administrivia – syllabus Syllabus (Cont.)
Course Information Lab Sections
3 credits; CRN: 62513 Section 30: Tomp 405, Wed. 4:10PM – 6:00PM
11:10AM – 12:25PM, Tuesday & Thursday; PHIL 110 Section 31: Tomp 405, Wed. 10:00AM – 12:00PM
http://www.seas.gwu.edu/~cheng/136 Discussion on homework problems, projects, lectures, etc.
Must attend one of them.
Instructor Information
Xiuzhen Cheng, Academic Center, Room 716 TA Information
Tel: 202 994 9751 Fax: 202 994 4875 Fanchun Jin:
[email protected] [email protected] Office: Academic Center, Room 730
Office hour: 1:00PM-3:00PM, Tue. & Thur.; or by appointment Office hours: Mon, Thur. 4 – 6PM
Office: Academic Center, Room 710
Office hours: ???
Syllabus (Cont.) Syllabus (Cont.)
Textbook No midterm; 1 final. Final will cover all material.
“Computer Organization & Design: the hardware/software 5 quizes, among which 4 will be counted in your final
interface”, 3rd edition, by D.A. Patterson & J.L. Hennessy, ISBN grades.
1-55860-604-1, required
Open book, open notes
“Introduction to RISC Assembly Language Programming”, by
J. Waldron, 1999, ISBN 0-201-39828-1, optional Graded by Instructors
Prerequisite More than 10 homework assignments. 3 projects.
Csci 135 or equivalent knowledge Will be graded by TA
Programming ability in a higher-level language 1: Merge Sort (7%); 2: Simple Calculator (6%); 3: Single
Precision Floating Point Addition and Subtraction (7%).
Course Plan Method of instruction: lecture and in-class discussion
www.seas.gwu.edu/~cheng/136/agenda.html
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Syllabus (Cont.) Syllabus (Cont.)
Grading Policy Lab plan:
Based on curve. You must pass final to pass the course www.seas.gwu.edu/~cheng/136/labPlan.html
Homework assignments: 20%
Projects: 20%
quizes 30% Announcement Page
Final: 30% Please visit routinely
Make-up policy: NO
Useful link page
SPIM related pages
Questions?
Focus of the Course Course Objective
Objective of the course:
Focuses of this course: Help you become a better programmer!
How computers work Learn tools to solve problems
MIPS instruction set architecture, Assembly Programming Study the interaction between hardware/software
The implementation of MIPS instruction set architecture ( a subset) – Learn the design trade-offs that drive the performance of
MIPS processor design computer systems
Issues affecting modern processors (caches, pipelines)
Pipelining – processor performance improvement. By the end of this semester, you will be able to
Memory system, I/O systems understand…
How is high-level language translated to machine code?
How does the hardware execute the program?
What is the interface between hardware and software?
How does software instruct the hardware to perform the job?
What determines the performance and how to improve it?
…
Course Problems…Cheating What is Computer Organization
What is cheating? Computer Organization: the high-level aspects of a
Studying together in groups is encouraged. computer’s design
Turned-in work must be completely your own.
CPU (datapath and control), memory system, I/O system …
Common examples of cheating: running out of time on a assignment and
then pick up output, take homework from box and copy, person asks to
Datapath: performs arithmetic operation
borrow solution “just to take a look”, copying an exam question, … Control: guides the operation of other components based on the
Both “giver” and “receiver” are equally culpable user instructions
Cheating on homeworks: negative points for that assignment
(e.g., if it’s worth 10 pts, you get -10)
Cheating on projects / exams; At least, negative points for that
project / exam.
In most cases, F in the course.
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Anatomy: 5 components of any Computer What is Computer Architecture
Programmer’s view: a pleasant environment
Personal Computer
Operating system’s view: a set of resources (hw & sw)
System architecture view: a set of components
Computer Keyboard,
Mouse Compiler’s view: an instruction set architecture with OS help
Processor Memory Devices
Disk Microprocessor architecture view: a set of functional units
Control Input (where
(“brain”) (where
programs, programs, VLSI designer’s view: a set of transistors implementing logic
data data
Datapath live when live when
(“brawn”) Output not running) Mechanical engineer’s view: a heater!
running)
Display, For this course, computer architecture mainly refers to
Printer Instruction Set Architecture
Programmer-visible. Serves as the boundary between the software and
hardware.
Example Computer Architectures Why Register Architecture Dominates?
Accumulator architecture Mainly refers to General Purpose Register
1 general purpose register called accumulator. Hold one source Architecture
and the destination. The 2nd source is in memory A general purpose register can hold an address, an integer, an
instruction, a floating point number, an integer, …
Eg. EDSAC (1949), Motorola 6800 (1974)
Why General Purpose Register?
Stack architecture: HP handheld calculator
Registers are faster than memory
Registers are more efficient for a compiler to use than other forms
Load-store register architecture – since 1980 of internal storage
Load data from memory to register, register-register operation Registers can be used to hold variables
MIPS, SPARC, PowerPC, DEC Alpha
How many registers are sufficient?
Others: Compiler requires at least 16
Register-memory architecture: DEC VAX, Motorola 6800, etc The more, the better? No! Why?
Memory-memory architecture: DEC VAX MIPS R3000 has 32 32-bit general purpose register
Overview of Physical Implementations Integrated Circuits (2003 state-of-the-art)
Primarily Crystalline Silicon
The hardware out of which we make systems. Bare Die 1mm - 25mm on a side
2003 - feature size ~ 0.13µm = 0.13 x 10-6 m
100 - 400M transistors
Integrated Circuits (ICs) (25 - 100M “logic gates")
Combinational logic circuits, memory elements, analog interfaces. 3 - 10 conductive layers
Printed Circuits (PC) boards “CMOS” (complementary metal oxide
semiconductor) - most common.
substrate for ICs and interconnection, distribution of CLK, Vdd,
and GND signals, heat dissipation.
Power Supplies Chip in Package
Converts line AC voltage to regulated DC low voltage levels.
Chassis (rack, card case, ...)
holds boards, power supply, provides physical interface to user or Package provides:
spreading of chip-level signal paths to board-level
other systems. heat dissipation.
Connectors and Cables. Ceramic or plastic with gold wires.
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Technology Trends: Memory Capacity
Printed Circuit Boards (Single-Chip DRAM)
size
1000000000
fiberglass or ceramic year size (Mbit)
1-20 conductive layers 100000000 1980 0.0625
1-20in on a side 10000000 1983 0.25
IC packages are soldered 1986 1
down. 1000000
1989 4
100000
1992 16
10000
1996 64
1000
1998 128
1970 1975 1980 1985 1990 1995 2000
Year 2000 256
• Now 1.4X/yr, or 2X every 2 years. 2002 512
• 8000X since 1980!
Technology Trends: Microprocessor Complexity Technology Trends: Processor Performance
Intel P4 2000 MHz
900 (Fall 2001)
Performance measure
800 DEC Alpha
100000000
Itanium 2: 410 Million 1.54X/yr
Athlon (K7): 22 Million
700 21264/600
10000000 Alpha 21264: 15 million 600
DEC Alpha 5/500
Moore’s Law Pentium Pentium Pro: 5.5 million 500
i80486
PowerPC 620: 6.9 million 400
1000000
Alpha 21164: 9.3 million
DEC Alpha 5/300
i80386 Sparc Ultra: 5.2 million 300
100000
i80286
200 DEC Alpha 4/266
i8086
2X transistors/Chip 100 IBM POWER 100
10000 Every 1.5 years 0
i8080
i4004 87 88 89 90 91 92 93 94 95 96 97
1000 Called year
1970 1975 1980 1985 1990 1995 2000
Year
“Moore’s Law” We’ll talk about processor performance later on…
Computer Technology - Dramatic Change! Computer Technology - Dramatic Change!
Memory
DRAM capacity: 2x / 2 years (since ‘96); State-of-the-art PC when you graduate:
64x size improvement in last decade. (at least…)
Processor Processor clock speed: 5000 MegaHertz
Speed 2x / 1.5 years (since ‘85); (5.0 GigaHertz)
100X performance in last decade. Memory capacity: 4000 MegaBytes
Disk (4.0 GigaBytes)
Capacity: 2x / 1 year (since ‘97) Disk capacity: 2000 GigaBytes
250X size in last decade. (2.0 TeraBytes)
New units! Mega => Giga, Giga => Tera
(Kilo, Mega, Giga, Tera, Peta, Exa, Zetta, Yotta = 1024)
Come up with a clever mnemonic, fame!
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Technology in the News So What You Will Learn?
www.lacie.com/products/product.htm?id=10129
www.engadget.com/entry/4463693158281236/
BIG Learn some of the big ideas in CS & engineering:
LaCie the first to offer 5 Classic components of a Computer
consumer-level 1.6 Terabyte Data can be anything (integers, floating point, characters): a program
disk! determines what it is
$2,200 Stored program concept: instructions just data
Weighs 11 pounds! Principle of Locality, exploited via a memory hierarchy (cache)
5 1/4” form-factor Greater performance by exploiting parallelism
SMALL Principle of abstraction, used to build systems as layers
Pretec is soon offering a 12GB Compilation v. interpretation thru system layers
CompactFlash card Principles/Pitfalls of Performance Measurement
Size of a silver dollar Assembly Language Programming
Cost? > New Honda! This is a skill you will pick up
Fast Hardware design
Samsung 256 Mbit XDR DRAM We think of hardware at the abstract level, with only a little bit of physical
http://www.tomshardware.com/hardnews/20050125_170734.html logic to give things perspective
Summary Homework and Questions
Continued rapid improvement in computing Homework #1:
2X every 2.0 years in memory size; Readings: Chapter 1
every 1.5 years in processor speed; Problems:1.1-1.28, 1.29-1.45, 1.46, 1.51-1.52, 1.54-1.55
every 1.0 year in disk capacity;
Moore’s Law enables processor
(2X transistors/chip ~1.5 yrs)
5 classic components of all computers Questions?
Control Datapath Memory Input Output
Processor
