Computer Organization And Architecture Manual

COA Lab Manual

Experiment 1:
Multiplexer and De-Multiplexer
Aim:
STUDY OF MULTIPLEXER AND DE-MULTIPLEXER
Theory:
Multiplexer is a digital switch which allows digital information from several sources to
be routed onto a single output line. The basic multiplexer has several data input lines and a
single output line. The selection of a particular input line is controlled by a set of selection
lines. Normally, there are 2n input lines and n selector lines whose bit combinations determine
which input is selected. Therefore, multiplexer is ‘many into one’ and it provides the digital
equivalent of an analog selector switch.
A De-multiplexer is a circuit that receives information on a single line and transmits this
information on one of 2n possible output lines. The selection of specific output line is controlled
by the values of n selection lines.

LOGIC SYMBOL:

TRUTH TABLE:
SELECTION INPUT OUTPUT
S.No
S1 S2 Y

1. 0 0 I0

2. 0 1 I1

3. 1 0 I2

4. 1 1 I3

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CIRCUIT DIAGRAM:

1X4 DEMULTIPLEXER

LOGIC SYMBOL:

TRUTH TABLE:

INPUT OUTPUT
S.No
S1 S2 Din Y0 Y1 Y2 Y3
1. 0 0 0 0 0 0 0
2. 0 0 1 1 0 0 0
3. 0 1 0 0 0 0 0
4. 0 1 1 0 1 0 0
5. 1 0 0 0 0 0 0
6. 1 0 1 0 0 1 0

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7. 1 1 0 0 0 0 0
8. 1 1 1 0 0 0 1

CIRCUIT DIAGRAM:

RESULT:

The study of the 4x1 Multiplexer and 1x4 Demultiplexer circuits was done and their
truth tables were verified.

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Experiment 2
Half ADDER and Subtractor
Half Adder:
With the help of half adder, we can design circuits that are capable of performing
simple addition with the help of logic gates.
Let us first take a look at the addition of single bits.
0+0 = 0
0+1 = 1
1+0 = 1
1+1 = 10
These are the least possible single-bit combinations. But the result for 1+1 is 10.
Though this problem can be solved with the help of an EXOR Gate, if you do care about the
output, the sum result must be re-written as a 2-bit output.
Thus the above equations can be written as: 0+0 = 00; 0+1 = 01
1+0 = 01
1+1 = 10
Here the output ‘1’of ‘10’ becomes the carry-out. The result is shown in a truth-table
below. ‘SUM’ is the normal output and ‘CARRY’ is the carry-out.

INPUTS OUTPUTS
A B SUM CARRY
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
From the equation it is clear that this 1-bit adder can be easily implemented with the help of
EXOR Gate for the output ‘SUM’ and an AND Gate for the carry. Take a look at the
implementation below

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Circuit Diagram Half Adder

For complex addition, there may be cases when you have to add two 8-bit bytes
together. This can be done only with the help of full-adder logic.

Half Subtractor:
A combinational circuit which performs the subtraction of two bits is called half
subtractor. The input variables designate the minuend and the subtrahend bit, whereas the
output variables produce the difference and borrow bits. Half subtractor
The half-subtractor is a combinational circuit which is used to perform subtraction of
two bits. It has two inputs, X (minuend) and Y (subtrahend) and two outputs D (difference) and
B (borrow).
`INPUTS OUTPUTS
A B Diff Borrow
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0

RESULT:
The study of half adder and subtractor was done and their truth tables were verified.

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Experiment 3
Full ADDER and Subtractor

Full Adder
This type of adder is a little more difficult to implement than a half-adder. The main
difference between a half-adder and a full-adder is that the full-adder has three inputs and two
outputs. The first two inputs are A and B and the third input is an input carry designated as
CIN. When full adder logic is designed we will be able to string eight of them together to create
a byte-wide adder and cascade the carry bit from one adder to the next.
The output carry is designated as COUT and the normal output is designated as S. Take
a look at the truth-table.
INPUTS OUTPUTS
A B CIN COUT S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
From the above truth-table, the full adder logic can be implemented. We can see that the
output S is an EXOR between the input A and the half-adder SUM output with B and CIN
inputs. We must also note that the COUT will only be true if any of the two inputs out of the
three are HIGH.
Thus, we can implement a full adder circuit with the help of two half adder circuits. The
first will half adder will be used to add A and B to produce a partial Sum. The second half
adder logic can be used to add CIN to the Sum produced by the first half adder to get the final
S output. If any of the half adder logic produces a carry, there will be an output carry. Thus,
COUT will be an OR function of the half-adder Carry outputs. Take a look at the
implementation of the full adder circuit shown below.
Though the implementation of larger logic diagrams is possible with the above full adder logic
a simpler symbol is mostly used to represent the operation. Given below is a simpler schematic
representation of a one-bit full adder

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Single Bit full Adder

With this type of symbol, we can add two bits together taking a carry from the next
lower order of magnitude, and sending a carry to the next higher order of magnitude. In a
computer, for a multi-bit operation, each bit must be represented by a full adder and must be
added simultaneously. Thus, to add two 8-bit numbers, you will need 8 full adders which can
be formed by cascading two of the 4-bit blocks. The addition of two 4-bit numbers is shown
below.

Full Subtractor:
A combinational circuit which performs the subtraction of three input bits is called full
subtractor. The three input bits include two significant bits and a previous borrow bit. A full
subtractor circuit can be implemented with two half subtractors and one OR gate. As in the
case of the addition using logic gates, a full subtractor is made by combining two half-
subtractors and an additional OR-gate. A full subtractor has the borrow in capability (denoted
as BIN in the diagram below) and so allows cascading which results in the possibility of multi-
bit subtraction. The circuit diagram for a full subtractor is given below

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Inputs Outputs

Minuend Subtrahend Borrow in Difference Borrow out

X Y Bin D Bout

0 0 0 0 0

0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

RESULT: The study of half adder and full subtractor was done and their truth tables were
verified.

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Experiment 4

Aim:
WAP to add two 8 bit numbers and store the result at memory location 2000
Theory:
The first data is brought to Accumulator A and the second one in any one of the other
registers, say B. The addition is done using ADD. The result is then stored at 2000. The ADD
instruction affects flags depending on result.

Algorithm :
1. First add contents of memory location 2000 and 2001 using “ADD” instruction and
storing at 2000H.
2. The carry generated is recovered using JNC command and is stored at memory
location 2001H.

Source program:

MVI A, 3 // Move immediate the value 3 in accumulator

MVI B, 6 // Move immediate the value 3 in register B
MVI D, 0 // Initialize the value of D (used for carry)
ADD B // Add the content of B with accumulator (A=A+B) and store the result in Accumulator
JNC NEXT // (if carry=0, jump on NEXT)
INR D // if carry=1 then increment the value of D by one
NEXT: STA 2000H //Store the value of Accumulator at memory location 2000
MOV A, D // Move the value of register D in the Accumulator (A)
STA 2001H
HLT //Terminate program execution

RESULT:
Thus the Addition of two 8 bit numbers is stored in the resultant memory RESULT
STORED AT 2000 LOCATION IS 9H

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Experiment 5

Aim:
WAP to multiply two 8 bit numbers stored at memory location 2000 and
2001 and stores the result at memory location 2000 and 2001.

Theory:
Addition is one of the fundamental arithmetic operations in microprocessors. In 8085,
addition is performed using the ADD instruction which adds the content of a register or
memory location to the accumulator. The result is stored back in the accumulator. If the sum
exceeds 8 bits (>255), a carry flag is set.
Multiplication is achieved through repeated addition method. For example, 5 × 3 = 5 +
5 + 5. The multiplicand is added to itself as many times as specified by the multiplier. Since
the result can be up to 16 bits (255 × 255 = 65025), we need two memory locations to store the
result.
ALGORITHM:
1. Load first number from memory location 2000H into register B (multiplicand)
2. Load second number from memory location 2001H into register C (multiplier)
3. Clear HL register pair to store 16-bit result
4. Check if multiplier is zero, if yes go to step 8
5. Add multiplicand to the result in HL
6. Decrement multiplier
7. Repeat from step 4
8. Store lower byte of result at 2000H
9. Store higher byte of result at 2001H
10. Stop

PROGRAM:
LDA 2000H ; Load first number from memory location 2000H
MOV B, A ; Copy first number to register B
LDA 2001H ; Load second number from memory location 2001H
MOV C, A ; Copy second number to register C

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Multiplication by repeated addition

MVI A, 00H ; Clear accumulator
LXI H, 0000H ; Clear HL register pair for result
MULTIPLY_LOOP:
MOV A, C ; Check if multiplier is zero
CMP A ; Compare with itself to check zero flag
JZ STORE_RESULT ; If zero, jump to store result

MOV A, L ; Get lower byte of result

ADD B ; Add multiplicand
MOV L, A ; Store back lower byte
MOV A, H ; Get higher byte of result
ADC A ; Add carry to higher byte
MOV H, A ; Store back higher byte

DCR C ; Decrement multiplier

JMP MULTIPLY_LOOP ; Continue loop

STORE_RESULT:
MOV A, L ; Get lower byte of result
STA 2000H ; Store at 2000H
MOV A, H ; Get higher byte of result
STA 2001H ; Store at 2001H
HLT ; Halt the program
```

RESULT:
- Input: (2000H) = 05H, (2001H) = 03H
- Output: (2000H) = 0FH, (2001H) = 00H
- Verification: 5 × 3 = 15 (05H × 03H = 000FH)

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Experiment 6

Aim:
WAP to add two 16-bit numbers. Store the result at memory address
starting from 2000.
Theory:
16-bit addition requires adding two bytes separately - first the lower bytes, then the
higher bytes with any carry from the lower byte addition. The 8085 has an ADC (Add with
Carry) instruction that adds the carry flag to the sum, which is essential for multi-byte
arithmetic operations.

ALGORITHM:
1. Load first 16-bit number into BC register pair
2. Load second 16-bit number into DE register pair
3. Add lower bytes (C + E) and store at 2000H
4. Add higher bytes (B + D) with carry and store at 2001H
5. Store any remaining carry at 2002H
6. Stop

PROGRAM:
LXI B, 1234H ; Load first 16-bit number (example: 1234H)
LXI D, 5678H ; Load second 16-bit number (example: 5678H)
MOV A, C ; Get lower byte of first number
ADD E ; Add lower byte of second number
STA 2000H ; Store lower byte of result
MOV A, B ; Get higher byte of first number
ADC D ; Add higher byte of second number with carry
STA 2001H ; Store higher byte of result
MVI A, 00H ; Clear accumulator
ADC A ; Add any remaining carry
STA 2002H ; Store carry byte (if any)
HLT ; Halt the program

RESULT:
Thus we have add two 16 bit numbers at locations 2000 and 2001H.
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Experiment 7
Aim:
WAP which tests if any bit is '0' in a data byte specified at an address 2000. If it is so, 00
would be stored at address 2001 and if not so then FF should be stored at the same
address
Theory:
This program tests whether any bit in a data byte is '0'. If all bits are '1' (i.e., the byte
equals FFH), then no bit is '0'. Otherwise, at least one bit is '0'. The CPI (Compare Immediate)
instruction compares the accumulator with an immediate value and sets flags accordingly.
ALGORITHM:
1. Load data byte from memory location 2000H
2. Compare the data with FFH (all bits set)
3. If equal (all bits are 1), store FFH at 2001H
4. If not equal (at least one bit is 0), store 00H at 2001H
5. Stop
PROGRAM:
LDA 2000H ; Load data from memory location 2000H
CPI 0FFH ; Compare with FFH (all bits set)
JZ ALL_BITS_ONE ; Jump if all bits are 1
; If any bit is 0
MVI A, 00H ; Load 00H
STA 2001H ; Store at 2001H
JMP END_PROG7 ; Jump to end
ALL_BITS_ONE:
MVI A, 0FFH ; Load FFH
STA 2001H ; Store at 2001H
END_PROG7:
HLT ; Halt the program
RESULT:
- Input: (2000H) = FEH (11111110 in binary)
- Output: (2001H) = 00H (since bit 0 is zero)
- Input: (2000H) = FFH (11111111 in binary)
- Output: (2001H) = FFH (since all bits are one)

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Experiment 8
Aim:
Assume that 3 bytes of data are stored at consecutive memory addresses of the data
memory starting at 2000. Write a program which loads register C with (2000), i.e. with
data contained at memory address2000, D with (2001), E with (2002) and A with (2001).
Theory:
This program demonstrates data movement between memory and registers. The 8085
uses the LDA (Load Accumulator Direct) instruction to load data from memory to the
accumulator, and MOV instructions to transfer data between registers.
ALGORITHM:
1. Load data from memory location 2000H into accumulator
2. Move accumulator content to register C
3. Load data from memory location 2001H into accumulator
4. Move accumulator content to register D
5. Load data from memory location 2002H into accumulator
6. Move accumulator content to register E
7. Load data from memory location 2001H into accumulator again
8. Stop (A now contains data from 2001H)
PROGRAM:
LDA 2000H ; Load data from 2000H
MOV C, A ; Store in register C
LDA 2001H ; Load data from 2001H
MOV D, A ; Store in register D
LDA 2002H ; Load data from 2002H
MOV E, A ; Store in register E
LDA 2001H ; Load data from 2001H again
; A now contains (2001H) as required
HLT ; Halt the program
RESULT:
- Input: (2000H) = 11H, (2001H) = 22H, (2002H) = 33H
- Output: C = 11H, D = 22H, E = 33H, A = 22H

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Experiment 9
Aim:
Sixteen bytes of data are specified at consecutive data-memory locations starting at
2000. Write a program which increments the value of all sixteen bytes by 01.
Theory:
This program uses indirect addressing through the HL register pair to access consecutive
memory locations. The INR (Increment) instruction increases the value by 1, and the INX H
instruction increments the HL pointer to the next memory location.
ALGORITHM:
1. Load starting address 2000H in HL register pair
2. Load counter with 16 (10H) in register B
3. Load data from memory location pointed by HL
4. Increment the data by 1
5. Store the incremented data back to memory
6. Increment HL to point to next memory location
7. Decrement counter
8. If counter is not zero, repeat from step 3
9. Stop
PROGRAM:
LXI H, 2000H ; Load starting address in HL
MVI B, 10H ; Load counter with 16 (10H)
INCREMENT_LOOP:
MOV A, M ; Load data from memory location pointed by HL
INR A ; Increment by 1
MOV M, A ; Store back to memory
INX H ; Increment memory pointer
DCR B ; Decrement counter
JNZ INCREMENT_LOOP ; Jump if not zero
HLT ; Halt the program
RESULT:
- Input: 16 bytes starting from 2000H: 01H, 02H, 03H, ..., 10H
- Output: 16 bytes starting from 2000H: 02H, 03H, 04H, ..., 11H
- Each byte is incremented by 1
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Experiment 10
Aim:
WAP to add t 10 bytes stored at memory location starting from 3000. Store the result at
memory location 300A
Theory:
This program performs addition of multiple bytes using accumulator. Since the sum can
exceed 8 bits, we need to handle carry properly. The program adds all bytes and keeps track of
carries to ensure accurate results.
ALGORITHM:
1. Load starting address 3000H in HL register pair
2. Load counter with 10 (0AH) in register B
3. Clear accumulator and carry counter
4. Add memory content to accumulator
5. If carry is generated, increment carry counter
6. Increment HL to point to next memory location
7. Decrement counter
8. If counter is not zero, repeat from step 4
9. Store sum at memory location 300AH
10. Store carry count at 300BH (optional)
11. Stop
PROGRAM:
LXI H, 3000H ; Load starting address in HL
MVI B, 0AH ; Load counter with 10 (0AH)
MVI A, 00H ; Clear accumulator for sum
MVI C, 00H ; Clear register C for carry

ADD_LOOP:
ADD M ; Add memory content to accumulator
JNC NO_CARRY ; Jump if no carry
INR C ; Increment carry counter

NO_CARRY:
INX H ; Increment memory pointer

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DCR B ; Decrement counter

JNZ ADD_LOOP ; Jump if not zero

; Store result
STA 300AH ; Store sum at 300AH
MOV A, C ; Get carry count
STA 300BH ; Store carry at 300BH (optional)

HLT ; Halt the program

RESULT:
- Input: 10 bytes at 3000H-3009H: 01H, 02H, 03H, 04H, 05H, 06H, 07H, 08H, 09H, 0AH
- Sum = 1+2+3+4+5+6+7+8+9+10 = 55 decimal = 37H
- Output: (300AH) = 37H, (300BH) = 00H (no carry)

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