Spintronics Neuromorphic Computing
Spintronics Neuromorphic Computing
Debanjan Bhowmik
Spintronics-Based
Neuromorphic
Computing
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Debanjan Bhowmik
Spintronics-Based
Neuromorphic Computing
Debanjan Bhowmik
Department of Electrical Engineering
Indian Institute of Technology Bombay
Mumbai, Maharashtra, India
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Singapore
It won’t be an exaggeration to refer to the current age as the age of artificial intelli-
gence (AI), with AI tools and applications, including search engines, large language
models, virtual assistants, generative AI, and the like, entering and even some-
times controlling different aspects of our lives currently, and applications like self-
driving cars and humanoid robots on the verge of being an everyday reality. Most of
these AI applications are typically implemented on conventional computing hard-
ware like CPUs and GPUs. Neuromorphic computing takes inspiration from not
just the functioning but the underlying hardware of the original source of intelli-
gence, the human brain, and aims to build much more energy-efficient hardware
compared to conventional AI hardware with the final applications being robotics,
edge healthcare, etc.
Along with innovative algorithms, neuromorphic computing relies on different
kinds of emerging devices and circuits for efficient implementation. Spintronic
devices are considered interesting for neuromorphic computing because of various
properties they offer: non-volatility, electrical control and read-out of the non-volatile
states, self-sustaining oscillations, stochastic switching, etc. While books have been
published in the past on various other kinds of neuromorphic devices (like resistive
random access memory (RRAM), phase change memory (PCM), etc.), to the best of
our knowledge, this is the first book that focusses on spintronics-based neuromor-
phic computing. But though our book mainly focusses on spintronic-devices-based
implementation of neuromorphic computing, the discussion on algorithms, circuits,
and even devices presented in the book can be useful for research on other kinds of
neuromorphic devices and circuits as well.
Almost for the past one and a half decade now, I have been carrying out research
in the field of nanomagnetism and spintronics, with the last 7 years completely
dedicated to spintronics-based neuromorphic computing. This book is a product of
that research. As a result, my group’s research results (both simulation-based and
experimental) get a lot of focus in this book. Nonetheless, I have also laid down a
general framework here, which is relevant to any researcher working on spintronics-
based neuromorphic computing or neuromorphic computing in general, and I have
explained my group’s research results in the context of that framework only. Also in
v
vi Preface
that context, I have discussed the recent results from various other research groups
across the world working in this area. I hope the readers find all these discussions
helpful.
Given that this is a heavily interdisciplinary topic lying at the intersection of
physics, materials science, electrical engineering, and computer science, I have tried
to provide sufficient introduction (and also numerical exercises) for each funda-
mental topic in the book (neural network algorithms, neuromorphic crossbar array
architectures, nanomagnetism, and spintronics) to make the book accessible to a
wider audience. Anybody with decent understanding of high-school- and college-
level mathematics and physics should be able to follow the ideas in the book. Thus,
this book is suitable for advanced undergraduate students, graduate and doctoral
students, postdoctoral researchers, and faculty members interested in this area.
I present below a chapter-by-chapter layout of the book:
Part I: Motivation
the second part of Chap. 3, we specifically discuss the spiking neural network (SNN),
which is considered the third generation of neural networks. And in that context, we
discuss various biologically possible models of neurons and synapses in the brain
and connect them through SNN algorithms.
As mentioned in the Preface, and as evident from the references throughout the
book, recent simulation-based and experimental results from my own research group
feature heavily here. I am incredibly thankful to the talented, motivated, and hard-
working students who worked under my supervision in the last 7 years, first while
I was a faculty member at Indian Institute of Technology Delhi and then a faculty
member at Indian Institute of Technology Bombay. Without their research efforts, it
would not have been possible for me to write a book entirely dedicated to spintronics-
based neuromorphic computing.
So in that context, I would first like to thank the doctoral students who have
completed or are about to complete their doctoral theses on this topic under my
supervision: Divya Kaushik, Upasana Sahu, Ram Singh Yadav, and Neha Garg. Many
sections of this book overlap in content with their doctoral dissertations and the papers
I have published with them. I would also like to thank the undergraduate students
who worked under my supervision and co-authored several papers with my doctoral
students: Utkarsh Saxena, Utkarsh Singh, Janak Sharda, Varun Desai, Kushaagra
Goyal, Sri Vasudha Hemadri Bhotla, Tanmay Aggarwal, Aniket Sadashiva, Amod
Holla, Sanyam Singhal, Mudit Bansal, Anand Verma, Apoorv Dankar, Saurabh
Kumar, and Aadit Pandey. I am also thankful to my collaborator, Prof. Pranaba
Kishor Muduli, at Indian Institute of Technology Delhi, for co-supervising some of
these students with me.
I would also like to thank Prof. Sayeef Salahuddin, who was the supervisor for my
doctoral studies conducted at University of California Berkeley, USA, and Prof. Long
You, who was a postdoctoral researcher at the same institute and in the same research
group at the time of my doctoral study, for teaching me the basics of theoretical
and experimental spintronics. I am also indebted to Prof. Kaushik Roy of Purdue
University, USA; his seminal papers on spintronics-based neuromorphic computing,
which I have cited several times in this book, have helped me connect my device-level
spintronics work from doctoral study with system-level neuromorphic applications
when I started my own independent research career as a faculty member. Since
then, I have actively worked on the intersection of spin physics and neuromorphic
computing, which has finally resulted in this book.
ix
x Acknowledgments
At a personal level, I would like to thank my wife Poulomi for providing me with
constant support throughout the time I prepared the manuscript. I would also like to
thank my own parents and my parents-in-law for their support.
Contents
Part I Motivation
1 Why Spintronics-Based Neuromorphic Computing? . . . . . . . . . . . . . . . 3
1.1 Introduction: Why Neuromorphic Computing? . . . . . . . . . . . . . . . . . . 3
1.2 Why Spintronics-Based Neuromorphic Computing? . . . . . . . . . . . . . 6
1.2.1 Non-volatility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2.2 Electrical Access and Control . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2.3 Near-Analog Weight Storage (High Bit Resolution) . . . . . . . 9
1.2.4 Integration Property . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.2.5 Auto-oscillation and Synchronization Properties . . . . . . . . . . 12
1.2.6 Stochastic Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
xi
xii Contents
xv
Part I
Motivation
Chapter 1
Why Spintronics-Based Neuromorphic
Computing?
Neural network algorithms are routinely and widely used now by the Artificial
Intelligence (AI) and Machine Learning (ML) community for various tasks like
data classification, recognition of objects in images, transcribing speech into text,
voice assistance, showing news items and product advertisements on the user’s feed
based on the user’s interests, providing answers to the questions asked through
large language models, etc. All neural network algorithms, from simple multi-layer
perceptrons (MLP) to state-of-the-art convolutional neural networks (CNN) and
long short-term memories (LSTM), involve the use of a large number of weight
parameters which need to be continuously used and updated in the computing unit
of the computer and subsequently stored in the memory unit (LeCun et al. 2015). In
a traditional computer which follows the von Neumann architecture, e.g., the central
processing unit (CPU), the memory and computing units are physically separate,
with a large part of the memory unit off-chip (on a different chip compared to the
computing/processing unit) (Patterson and Hennessey 2017; Sarangi 2017). So, a
large amount of time and energy is spent in shuffling data like the weight parameters
between the computing and off-chip memory units while running neural network
algorithms. This is known as the von Neumann bottleneck in literature (Wulf and
McKee 1996). Though the graphics processing unit (GPU) has a lot more computing
cores than the CPU and has way more parallelism and more frequent memory access,
the von Neumann bottleneck still exists for the GPU since the cores are physically
separated from the memory (Zidan et al. 2018).
The matrix-vector multiplication (MVM) operation and outer product calculation
(during training) are operations fundamental in all neural network algorithms which
use frequent interaction between the memory and computing units and are subject to
the von Neumann bottleneck. In order to overcome this bottleneck, a new comput-
ing paradigm has been proposed and implemented through crossbar arrays of analog
memory devices known as synaptic devices (inspired by synapses in the brain) where
© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 3
D. Bhowmik, Spintronics-Based Neuromorphic Computing, Springer Tracts in Electrical
and Electronics Engineering, https://doi.org/10.1007/978-981-97-4445-9_1
4 1 Why Spintronics-Based Neuromorphic Computing?
Fig. 1.1 Crossbar-array architecture: Schematic of the crossbar-array architecture, popularly used
in neuromorphic computing, is shown here. The memory elements (synapses) are intertwined here
with the computation elements: adding of currents flowing through the synapses connected to
a particular vertical bar of the crossbar array, and operation of a non-linear activation element, or
neuron, on it. a shows the vector-matrix multiplication (VMM) operation, needed both for inference
and on-chip learning, and the outer product calculation needed only for on-chip learning
memory and computing are essentially intertwined (Sadashiva et al. 2024; Tsai et al.
2018; Sebastian et al. 2018; Chakroborty et al. 2020; Burr et al. 2015). Such an ana-
log crossbar array compute at the site of memory itself using a grid of non-volatile
synaptic devices and can implement the MVM operation and outer product calcu-
lation operations much faster than traditional computing units (Chakroborty et al.
2020; Burr et al. 2015; Luo and Yu 2020), as shown in Fig. 1.1a and b, respectively.
In order to implement simple neural networks like MLP, such crossbar arrays
along with peripheral analog circuit for the non-linear activation function and weight-
update calculation has been shown to be sufficient (through circuit-level simulation)
(Bhowmik et al. 2019; Kaushik et al. 2020a, b). So, in the case of MLP imple-
mentation, the full system is analog. But for CNN implementation, given the many
complex operations involved, all the MVM and outer product calculation opera-
tions can be implemented in analog crossbar arrays, and all other operations can
be implemented in traditional digital computing units, with analog-to-digital (ADC)
and digital-to-analog (DAC) converters converting between the analog and digital
units (Chakroborty et al. 2020; Luo and Yu 2020; Ankit et al. 2019, 2020).
The crossbar array is loosely inspired by the brain because, in the brain, neurons
are connected to each other through synapses. Signal propagating through one neuron
gets modulated by the synapse and reaches the next-stage neuron. Signals propagating
from other neurons and similarly modulated by synapses get added to it. Similarly,
in a crossbar array, as shown in Fig. 1.1a, electrical voltage applied at any horizontal
bar results in a current flow in the vertical bar, where the current is the product of the
voltage and the conductance of the synaptic device connecting the horizontal bar with
1.1 Introduction: Why Neuromorphic Computing? 5
the vertical bar. The conductance is proportional to the weight stored in the synapse
(an element in the weight matrix of the MVM operation to be executed by the crossbar
array). Such currents from all the horizontal bars in the crossbar array add up at each
vertical bar. Thus, using Ohm’s law and Kirchoff’s current law, the MVM operation is
completed. A peripheral analog circuit element can be designed to implement a non-
linear activation function like “tanh” or “Relu” on the signal at the vertical bar. Thus,
this crossbar array mimics the flow of signals inside the brain to some degree and
hence can be called “neuromorphic” (Chakroborty et al. 2020; Bhowmik et al. 2019).
However, there are some other designs within this non-von Neumann or memory-
computing-intertwining paradigm which are even closer to the working of the brain
and the term “neuromorphic” better suits them. Much like the brain, these designs
use spikes (in the time domain) for computation and information transfer (Diehl and
Cook 2015; Bi and Poo 1998; Zhang and Linden 2003). So, they are called spiking
neural networks (SNN) (the neural networks discussed previously, which do not use
spikes, are often called artificial neural networks (ANN) in neuromorphic literature
Christensen et al. 2022). It has been shown that spike-based computation consumes
much less power than computation without spikes (Christensen et al. 2022; Maass
1996, 1997, 2015; Davies 2019; Roy et al. 2019). Several spike-based digital chips
and systems like True North, SpiNNAker, and Loihi have also been designed and
shown to be competitive with respect to traditional computers for various AI/ML tasks
(Merolla et al. 2014; Furber et al. 2014; Davies et al. 2018). Analog architectures
which use various emerging non-volatile devices and mimic spike-based computing
in the brain have also been proposed and experimentally demonstrated (Bouvier et al.
2019; Thakur et al. 2018; Indiveri et al. 2011).
In addition, there are also various oscillator-based computing schemes and archi-
tectures which are inspired by evidence of oscillatory behaviour of neurons in the
brain (Fell and Axmacher 2011; Mizrahi et al. 2018a; Mirollo and Strogatz 1990).
Computing schemes have been proposed which use synchronization among oscilla-
tors and carry out data classification/machine learning tasks, while sometimes need-
ing less number of adjustable parameters compared to standard neural networks
(Grollier et al. 2016, 2020). A computing scheme, known as oscillator-based Ising
computing, has also been proposed where sub-harmonic injection locking is applied
on the oscillators, leading to their phases acquiring binary values. Subsequently,
these injection-locked oscillators can be used to solve combinatorial optimization
problems like Max-Cut, Maximum Independent Set, and Traveling Salesman prob-
lems, all very relevant for machine learning (Mohseni et al. 2022; Wang et al. 2021;
Houshang et al. 2022).
Given that most of the aforementioned neuromorphic systems focus on imple-
menting AI/ML tasks while consuming a low amount of energy and time, they are
considered attractive for edge-computing applications (a resource-constrained envi-
ronment) (Nwakanma et al. 2021; Nicholas et al. 2018). In this Internet of Things
(IoT) era, neuromorphic chips can be embedded in the edge devices and can process
information at the edge itself. For example, autonomous drones can include simple
neural network circuits which actively learn and adapt to subtle variations in their
environment. In a wireless sensor network, neural network circuits associated with
6 1 Why Spintronics-Based Neuromorphic Computing?
the sensor nodes can do some basic signal processing on the received information
and then send the most useful information to the hub.
Two approaches can be followed while integrating edge devices with neuromor-
phic technology: inference only and on-chip learning. In the former approach, the
neural network implemented on a neuromorphic chip is pre-trained, i.e., the weights
stored in the synaptic devices are already of desired values corresponding to that of a
pre-trained neural network. The pre-training is carried out on a traditional computer
which follows the von Neumann architecture. The pre-trained neuromorphic chip,
deployed at an edge device, only carries out signal processing/data classification on
the information received at the edge device (testing/inference). In the latter approach,
both the training and inference are carried out on a neuromorphic chip at the edge
device itself.
The inference-only approach is easier to implement because the training process,
which is the harder part of the computation here, doesn’t need to be implemented on
the novel architectures followed in neuromorphic chips. But at the same time, it has
several disadvantages. A neural network for edge devices makes use of information
collected at the edge; sending such information to a central computer for train-
ing involves data privacy concerns. Besides, the central computer follows the von
Neumann architecture, and training a large neural network on such a computer can
consume a lot of time and energy for the aforementioned reasons (Luo and Yu 2020;
Saxena et al. 2018). Also, training a neural network with multiple layers involves
frequent use of VMM and outer product calculation operations, following the back-
propagation algorithm (LeCun et al. 2015). Since crossbar arrays used in a neuromor-
phic architecture not only enable fast VMM but also fast outer product calculation
(Chakroborty et al. 2020), if training/learning is not carried out at the edge, the capa-
bilities of neuromorphic architecture are not fully utilized. All these factors make
on-chip learning in neuromorphic systems highly attractive for practical applications.
This book focuses on how spintronics, an emerging device technology that uses
the physical phenomenon of manipulation of magnetic moments through electri-
cal transport in nanomagnetic systems for information storage and processing, can
be used for neuromorphic computing. We discuss spintronics-based neuromorphic
computing both in the context of inference and on-chip learning in this book while
laying specific emphasis on on-chip learning when discussing spintronic-synapse-
based crossbar arrays. In the next part of this chapter, we provide an overview of
this subject by briefly discussing what salient properties of spintronic devices make
them attractive for neuromorphic computing.
In this sub-section, we outline the various advantages spintronics offers that make
different spintronic devices attractive for neuromorphic computing (including Ising
computing). We discuss the operating physics and design of these spintronic devices,
and how neuromorphic circuits are designed with them, in detail in the subsequent
chapters.
1.2 Why Spintronics-Based Neuromorphic Computing? 7
1.2.1 Non-volatility
In both magnetic hard drives and MRAM devices, the value stored in each memory
unit through the magnetic configuration of the ferromagnetic layer is accessed elec-
trically using the tunneling magneto-resistance (TMR) effect. Because of this effect,
the conductance of a magnetic tunnel junction (MTJ), as shown in Fig. 1.2, is higher
when the magnetic moments of the two ferromagnetic layers (fixed layer, . M2 and
the free layer, . M1 ), separated by the insulating layer (through which electrons tun-
nel), are aligned parallel to each other (.G P ). The conductance is lower when the two
moments . M1 and . M2 are anti-parallel to each other (.G A P ). The ratio of .G P to .G A P
is known as the TMR ratio; higher TMR ratio makes it easier for electrical access of
the information stored in the device (Apalkov et al. 2016; Lee and Lee 2016).
In the traditional MRAM device, information stored in the ferromagnetic layer is
manipulated using an external magnetic field, generated through the Oersted effect
by a current-carrying line close to the device (Apalkov et al. 2016). However, in
the spin-transfer-torque MRAM device (STTMRAM), which is a modification to
the MRAM device (shown in the schematic of Fig. 1.2a), electrical current flowing
through the “fixed” layer in the MTJ (the ferromagnetic layer where it is more difficult
8 1 Why Spintronics-Based Neuromorphic Computing?
Fig. 1.2 STTMRAM and SOTMRAM: a Schematic of the spin-transfer-torque MRAM device
(STTMRAM) is shown here. The paths for the “read” current and the “write” current are the same
here: the vertical magnetic tunnel junction (MTJ) structure. b Schematic of the spin-orbit-torque
MRAM device (SOTMRAM) is shown here. While the path for the “read” current is still the vertical
MTJ structure here, the path for “write” current is horizontal, through the underlying heavy-metal
layer. Solid green arrows indicate magnetic moments for both the schematics: . M1 for the free layer
and . M2 for the fixed layer
to switch the magnetization due to higher thickness of the layer or its moment being
pinned to an anti-ferromagnetic layer) becomes spin-polarized. When that current
flows into the “free” layer (the magnetic moments inside this layer are indicative of
the information stored in the device), magnetic moment in the “free” layer . M1 may
get switched by the current due to spin-transfer torque (Apalkov et al. 2016; Lee and
Lee 2016). Thus information is not just accessed electrically (the “read” process)
but also manipulated electrically (the “write” process). The electrical control here
is much more energy-efficient than in a traditional MRAM devices because for a
given magnitude of current, the strength and efficiency (for magnetic switching) of
spin-transfer torque is much higher than that Oersted field generated by the current.
Based on our description of the working principle of an STTMRAM device, it is
clear that it is a two-terminal device with a shared “read” and “write” path, which
is the MTJ structure. Higher-magnitude “write” current pulses flowing through the
MTJ structure can damage the tunneling layer (typically an oxide layer) and hence
the “read” path. In order to physically separate the “read” and “write” paths, a three-
terminal spintronic device has been proposed and experimentally demonstrated for
memory applications. This is the spin-orbit-torque MRAM device (SOTMRAM)
device, shown in the schematic of Fig. 1.2b (Lee and Lee 2016; Liu et al. 2012a, b;
Miron et al. 2010). Here the “read” process is based on the TMR effect in MTJ,
just like in STTMRAM, but the “write” process involves an in-plane current flow-
ing through the heavy-metal layer underneath the ferromagnetic-metal layer. Spin-
orbit torque generated at the heavy metal-ferromagnet interface causes the magnetic
moment in the ferromagnetic free layer (. M1 ) to switch. Thus spintronic devices
like STTMRAM and SOTMRAM offer non-volatility as well as energy-efficient
electrical read-out and control.
If the aforementioned crossbar array is used only for inference, then the conduc-
tances of the synaptic devices need to be set to appropriate values only a few times.
1.2 Why Spintronics-Based Neuromorphic Computing? 9
But forward computation (MVM operation) needs to be carried out on the crossbar
array often; so accessing the weight stored in the synaptic device frequently (with-
out the need for changing it) through its conductance is imperative for the crossbar
array. Hence, the TMR effect makes any MTJ-based spintronic device attractive for
synaptic application in a crossbar array for inference purpose (Apalkov et al. 2016;
Lee and Lee 2016).
For on-chip learning, along with frequently accessing the weight stored in the
synapse, the weight value needs to be updated frequently. Phenomena like spin-
transfer torque and spin-orbit torque enable manipulation of magnetic configuration
and hence updating of weight values through current pulses in an energy-efficient
way. This makes spintronic devices attractive as synapses in a crossbar array even
for on-chip learning.
Magnetic hard drive, MRAM, STTMRAM, and SOTMRAM are available as com-
mercial products and can be used for conventional digital computing with von Neu-
mann architecture (Fullerton and Childress 2016; Apalkov et al. 2016; Lee and Lee
2016). Hence, information is stored in them as bits: in each device, all the magnetic
moments in the ferromagnetic layer are aligned parallel to each other and can be
thought of as a single, effective magnetization vector (shown as a green arrow in
Fig. 1.2a and b: . M1 and . M2 ). This magnetization vector pointing in one direction
corresponds to bit 0, while it pointing to the opposite direction corresponds to bit
1. Spin-transfer torque or spin-orbit torque from a “write” current pulse is used to
switch the magnetization vector of the “free” layer from one direction to the other
(shown in Fig. 1.2a and b), thereby flipping the bit from 0 to 1 or 1 to 0.
But crossbar arrays that implement neural networks are essentially analog in
nature, with each synapse storing any weight value between a minimum possible
value (.wmin ) and a maximum possible value (.wmax ) in a near-analog fashion (preci-
sion of 5-10 bits) (Chakroborty et al. 2020; Aabrar et al. 2019). So an STTMRAM
or an SOTMRAM cell which stores one bit of information is not suitable for this
purpose, unless a binary neural network is implemented, or several such cells are
used together as a single synapse (Jung et al. 2022; Zhang et al. 2022).
A spin-orbit-torque-driven domain-wall synapse, shown in Fig. 1.3, serves the
purpose of a near-analog/multi-bit synapse really well (Chakroborty et al. 2020;
Sengupta and Roy 2016; Sengupta et al. 2016). Unlike the STTMRAM or the SOTM-
RAM device, all the magnetic moments in the “free” layer are not oriented parallel to
each other here. Instead, in the ferromagnetic “free” layer of the domain-wall synapse,
a domain wall separates a region with all moments pointed vertically upwards from
a region with all moments pointed vertically downward (shown by white arrows in
Fig. 1.3). Given that all the magnetic moments in the “fixed” layer are always pinned
to a specific direction (say upward), a domain wall moving from the left end of the
device to the right end increases the conductance of the MTJ (the “read” path) from
10 1 Why Spintronics-Based Neuromorphic Computing?
Fig. 1.4 Conductance Response of a Domain-wall Synapse: The conductance response of the
heavy-metal/ferromagnet hetero-structure-based, spin-orbit-torque-driven domain-wall synapse (of
Fig. 1.3) is shown here, as obtained from micromagnetic simulation of the device. “Write” current
pulses of constant magnitude (25.µA here) flowing through the heavy-metal layer move the domain
wall in the ferromagnetic layer by fixed amounts. So the conductance goes up from .G A P , when
the domain wall is at the left end of the device, to .G P , when the domain wall is at the right end
of the device, in 50 discrete steps. Thus this simulated device exhibits 50 conductance states, and
so the corresponding weight stored has 5–6 bits of resolution, much higher than that stored in an
STTMRAM or an SOTMRAM cell (which stores 1 bit only). (Reprinted with permission from:
Kaushik D, Singh U, Sahu U, Sreedevi I, Bhowmik D (2020) Comparing domain-wall synapse with
other non-volatile memory devices for on-chip learning in analog hardware neural network. AIP
Adv 10(2):025111 Kaushik et al. 2020a)
In this chapter, thus far, we have highlighted what properties make spintronic devices
interesting for use as synapses in hardware implementations of ANNs. As mentioned
earlier, implementing another class of neural networks known as spiking neural net-
works (SNN) is also of great interest in neuromorphic computing. Here, we explain
briefly what aspect of the aforementioned spin-orbit-torque-driven domain-wall
device makes it interesting for application as a neuron device in an SNN.
In an SNN, neurons and synapses follow biologically plausible models as opposed
to purely mathematical models used in the conventional non-spiking neural net-
work algorithms (Diehl and Cook 2015; Bi and Poo 1998; Zhang and Linden 2003).
The integrate-and-fire (IF) and leaky-integrate-and-fire (LIF) models of the neuron
are popular for modelling spiking neural networks because of their computational
simplicity. The state of the neuron is determined by its potential. As shown in the
schematic for the LIF model of a neuron in Fig. 1.5, the time-derivative of the neuron
potential is proportional to the input current, which gets injected into it from the other
neurons after being modulated by the synapses. So the neuron potential is an integral
12 1 Why Spintronics-Based Neuromorphic Computing?
Fig. 1.5 Leaky-integrate and fire (LIF) model of a neuron: Schematic of the biologically plausible
LIF model of a neuron is shown here. The presence of the capacitive element in the model (.C)
shows that the neuron voltage, given by .V (t), is an integral of the input current . I (t) over time .t.
The resistive element (conductance: .G L ) corresponds to the leaky part of the model
of the input current over time. The plots obtained by solving the LIF model for dif-
ferent values of input current to the neuron show that when the potential reaches
a threshold value, the neuron fires and the potential goes back to its lowest value
(resting potential) (Dayan and Abbott 2005). The firing/spiking rate of the neuron is
proportional to the magnitude of the input current.
The physics of domain-wall motion can be utilized to implement this integral
property in a neuron device (Sengupta et al. 2016; Sengupta and Roy 2017; Hassan
et al. 2018; Akinola et al. 2019; Bennett et al. 2019; Yue et al. 2019). Following
the physics of in-plane-current-driven domain-wall motion discussed above, for a
large range of current magnitude, the domain-wall velocity is proportional to the
current (Sahu et al. 2019). The domain-wall position, being an integral of the velocity
over time, is equivalent to the potential of a neuron here (Sahu et al. 2019; Dayan
and Abbott 2005). As shown in the schematic for a domain-wall neuron device in
Fig. 1.6, once the domain wall reaches the other end of the device, i.e., the domain-
wall position exceeds a threshold value, the associated circuit is designed such that a
spike is generated and the domain wall goes back to its original position (equivalent
to the potential of a neuron going back to its resting potential) (Sahu et al. 2019). In
Chap. 6, we discuss in details the design of such a domain-wall based neuron device
and also show design of an SNN using domain-wall synapses and domain-wall
neurons.
Along with magnetic switching and domain-wall motion, spin transfer torque and
spin-orbit torque are known to trigger magnetic oscillation in MTJs (Chen et al. 2016).
1.2 Why Spintronics-Based Neuromorphic Computing? 13
Fig. 1.6 Domain-wall synapse acting as a LIF neuron: a Frequency of neuron spiking versus
magnitude of current pulse plot, obtained from solving the LIF model of Fig. 1.5, is consistent with
that of the frequency of spiking of a domain-wall-based neuron device as a function of magnitude
of the in-plane current pulse which moves the domain wall b Schematic of the domain-wall-based
neuron device is shown here (Sahu et al. 2019). Once the domain wall reaches the right end of
the device, because of the presence of the MTJ structure, the transistor circuit associated with it
generates a spike. This is equivalent to the neuron voltage reaching a threshold in the LIF model.
Then the circuit also drives a reverse current which drives the domain wall to its original position
at the left end of the device. This is equivalent to the neuron voltage going back to the resting
potential in the LIF model. (Reprinted with permission from: Sahu U, Pandey A, Goyal K, Bhowmik
D (2019) Spike time dependent plasticity (STDP) enabled learning in spiking neural networks using
domain-wall-based synapses and neurons. AIP Adv 9(12) Sahu et al. 2019)
Singh et al. 2021; Zahedinejad et al. 2020; Garg et al. 2021). We discuss this in
details in Chap. 7.
The same model that describes the synchronization among oscillators and helps
develop neuromorphic computing schemes with them also enables them to behave
like an Ising machine. In the Ising computing scheme, all oscillators have roughly the
same natural frequency and they are all subjected to a perturbation of frequency twice
of that natural frequency. All the oscillators are found to synchronize, with the phase
of some being 0 and the rest being .π. This kind of locking to the external perturbation
is known as sub-harmonic injection locking. When such locking happens, if the initial
conditions of the system correspond to the inputs for a particular NP-complete prob-
lem (Max-Cut, Maximum Independent Set, Traveling Salesman etc.), then the final
conditions of the system often correspond to the ground state of the corresponding
Ising Hamiltonian and hence yield the correct solution to the problem (Mohseni et al.
2022; Wang et al. 2021). Given the NP-complete nature of the problem, reaching the
correct solution to the problem may take much longer on a conventional computer.
It has been shown recently experimentally that such sub-harmonic injection locking
can indeed be implemented on spin oscillators, leading to phase binarization, making
them potential candidates for Ising machines (Houshang et al. 2022).
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In an MTJ, if the energy barrier between the two magnetization states in the “free”
layer is low, the magnetization can randomly switch from one direction to the other
due to thermal fluctuations. When such an MTJ is used for memory technology like
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random switching events and maximize the data retention time, the MTJ is engineered
to have a high energy barrier in STTMRAM and SOTMRAM devices. This in turn
increases the energy consumption in the writing/information manipulation process
due to high-magnitude current pulses.
In probabilistic computing, however, such random switching events are utilized
for new functionalities. The energy barrier in a super-paramagnetic tunnel junction
is deliberately kept low and comparable to the thermal energy (Grollier et al. 2020).
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Part II
Background Material
Chapter 2
Introduction to Nanomagnetism and
Spintronics
In the previous chapter, we have briefly discussed the working principle of the
spintronic devices essential for spin-based neuromorphic computing: Spin-Orbit
Torque Magnetic Random Access Memory (SOTMRAM), Spin Orbit-Torque-
Driven Domain-Wall device, and Spin Hall Nano-Oscillator (SHNO). As per the
schematics provided for these devices in that chapter, one can infer that they are all
based on the heavy-metal-ferromagnetic-metal-oxide hetero-structure. As a result,
most of these nanomagnetic and spintronic devices have the following properties in
common which are essential for their operation:
© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 23
D. Bhowmik, Spintronics-Based Neuromorphic Computing, Springer Tracts in Electrical
and Electronics Engineering, https://doi.org/10.1007/978-981-97-4445-9_2
24 2 Introduction to Nanomagnetism and Spintronics
Fig. 2.1 Microscopic effects that contribute to spin-orbit torque (SOT) at a heavy-magnet-
ferromagnetic-metal interface are shown here: a Rashba effect: due to current (. j) flowing in-plane
in .−x direction, and due to symmetry breaking in the out-of-plane (.z) direction, the magnetic
moments inside the ferromagnetic layer experience a Rashba field. H R in the direction:.ẑ × →j b Spin
Hall effect: due to current (. j) flowing in-plane in .−x direction, electrons with spin polarization in
.−y direction (obtained from (.ẑ × → j), can also be .−(.ẑ × →j) depending on the choice of the heavy
metal) accumulate at the heavy-metal-ferromagnetic-metal interface, leading to the application of
SOT on the magnetic moments inside the ferromagnetic layer. (Reprinted with permission from:
Bhowmik D, Lee OJ, You L, Salahuddin S (2016) Magnetization switching and domain-wall motion
due to spin-orbit torque. In: Atulasimha J, Bandyopadhyay S (eds) Nanomagnetic and spintronic
devices for energy-efficient memory and computing. Wiley Bhowmik et al. 2016a)
2.2 Single-Domain Model 25
where i and j correspond to neighbouring atoms (Coey 2010; Blundell 2001). The
motivation for this model as well as calculation of the exchange integral. Jex originates
from the microscopic picture of the system which is again outside the scope of this
book. Also, the band theory of ferromagnetism is a much more valid model for
ferromagnetic metals than Heisenberg model since the electrons are delocalized
in metals and the Heisenberg model is meant for localized electrons (Coey 2010;
Blundell 2001). Nevertheless, the Heisenberg model serves as a good toy model for
understanding the single-domain model and the micromagnetic model, and so we
start from the Heisenberg model here while discussing ferromagnetism in metallic
layers of our devices.
26 2 Introduction to Nanomagnetism and Spintronics
1. The temperature of the system doesn’t change significantly, i.e., the saturation
magnetization of the magnetic layer doesn’t change. Most of the devices discussed
in this book operate at room temperature. Joule heating due to the current (which
causes switching, domain-wall motion, etc.) is also not high enough to cause a
significant change in the temperature.
2. The lateral dimensions of the device are low enough for dipole energy not to
dominate over exchange energy and break the nanomagnet into domains. Once
domains are formed, moments in different domains point in different directions,
and in the boundary region between two domains (a domain wall), the moment
gradually rotates from one direction to the other. So, for domain-wall device
modelling, which forms a significant component of the book (as explained in
Chap. 1), the single-domain model cannot be used; the micromagnetic model
needs to be used instead.
So, in the single-domain model, all moments point in one direction only, given by
→ But what the direction is depends on other energy terms,
the macro-spin vector . M.
which we mention next (all these energy terms need to be added and the net energy
→
needs to minimized to obtain steady-state value of . M):
1. Crystalline anisotropy: Electric fields due to the atoms in the crystal get trans-
formed to magnetic fields in the electrons’ reference frame due to spin-orbit
coupling. Since the atoms have specific arrangements in space, i.e., the crystal
is not isotropic in space, effective magnetic fields seen by the electrons, which
contribute to the magnetic moment, are only in certain directions. So the spins
of the electrons only want to align in specific directions. This is the origin of
crystalline anisotropy in simple terms. The corresponding energy term is given
as . K 1 Mx2 + K 2 M y2 + K 3 Mz2 , where . K 1 , . K 2 , and . K 3 are the anisotropy constants
in x, y, and z directions, and . M → = {Mx , M y , Mz } (we have normalized . M → here,
since the norm of macro-spin vector is always conserved in the single-domain
model). The magnitude and polarities of . K 1 , . K 2 , and . K 3 determine the preferred
direction of the magnetization due to crystalline anisotropy (Arrott 2005).
2. Interfacial anisotropy: In the case of thin films, often the symmetry breaking
of the crystal structure at the interface leads to an extra term in the energy. Let
that interface anisotropy constant be given by . K i , the bulk anisotropy be . K b , and
,
the thickness of the thin film be .th. Then the average anisotropy . K int is given
,
{ th
by . K int = th 0 (K b + K int δ(x))d x = K b + th . This term shows that for thin
1 K int
2.2 Single-Domain Model 27
films (.th value very low), interfacial anisotropy can dominate over bulk anisotropy.
The corresponding energy term is . K int Mz2 , with z being the out-of-plane direction
(along which the symmetry of the system is broken) (Ikeda et al. 2010).
3. Demagnetizing field: In a thin film, purely from a magneto-statics standpoint,
the energy of the system is much lower when the moments are all in the plane
compared to when moments are out of the plane. This is because in the latter case,
the dipole-coupling field from a much higher number of neighbouring moments
opposes a particular moment than in the former case. This leads to an additional
term .μ0 Ms2 Mz2 where . Ms is saturation magnetization of the ferromagnetic layer
and .μ0 is the magnetic permeability of free space.
. → H→
E = −K Mz2 − μ0 Ms M. (2.2)
. E = −K Mz2 − μ0 Ms H Mz (2.3)
dE
. = 0 ⇒ sinθ(2K cosθ + μ0 Ms H ) = 0 (2.5)
dθ
has three roots:
2
θ = 0 for which . ddθE2 > 0 (minima) when .μ0 H > − 2K
.
Ms
2
θ = π for which . ddθE2 > 0 (minima) when .μ0 H <
.
2K
Ms
θ = cos −1 (− μ02K
2
.
Ms H
) for which . ddθE2 > 0 (minima) when .|μ0 H | > | 2KMs
|, but .|cos(θ)|
cannot be greater than 1. So this root doesn’t yield a valid solution.
Hence the two possible solutions are .θ = 0 and .θ = π. When .μ0 H > 2K Ms
, .θ = 0,
i.e., . Mz = 1 (Fig. 2.2a). When .μ0 H < − Ms .θ = π, i.e., . Mz = −1 (Fig. 2.2b). But in
2K
the range .− 2K
Ms
< μ0 H < 2K Ms
, there are two solutions for .θ: 0 and .π (Fig. 2.2a). The
28 2 Introduction to Nanomagnetism and Spintronics
solution that will physically occur depends on the history of the system, i.e., if the
magnetization . M → is in z direction initially due to applied field . H→ (.θ = 0) then it will
continue to be so until.mu 0 H→ is in negative direction and its magnitude is greater than
.
2K
Ms
. Once the magnetic field crosses .− 2K Ms
(the switching field), the magnetization
switches to .−z direction (.θ = π) (Fig. 2.2c). The same thing happens we start from
magnetization in .−z direction (.θ = π) and magnetic field is swept from .−z direction
to .+z direction: the magnetization switches to .+z direction once the magnetic field
crosses .− 2K
Ms
(Fig. 2.2c). The out-of-plane axis (z) is known as the easy axis of the
magnet.
This history-dependent switching behaviour in ferromagnets when the magnetic
field is applied along the easy axis results in retention of the magnetic state and
leads to its non-volatility. This hysteresis behaviour can also be explained intuitively
from the energy landscape of the magnetization, shown in Fig. 2.2b. When . Mz = 1
(.θ = 0 in Fig. 2.2b), the magnet is at an energy minimum, and unless a sufficiently
high magnetic field is applied in the .−z direction, it will stay along .+z. The same is
true when . Mz = 1, or .θ = π (Fig. 2.2b): unless a sufficiently high magnetic field is
applied in the .+z direction, the magnet will stay along .−z.
2.2 Single-Domain Model 29
Let us now consider what happens when the magnetic field is applied in-plane
(say x direction). Energy of the system (E) is given by
. E = −K Mz2 − μ0 Ms H Mx (2.6)
dE
. = 0 ⇒ cosθ(2K sinθ − μ0 Ms H ) = 0 (2.8)
dθ
Following the same procedure as before we get that when .μ0 H > 2K Ms
, .θ = π2 is the
π
solution (. Mx = 1) (Fig. 2.3a). When .μ0 H < − Ms , .θ = − 2 is the solution (. Mx =
2K
|φi, j | ≈ |m→i − m→ j |
. (2.9)
Next, a very important assumption is made which forms the very core of the
micromagnetics formalism. Instead of considering that the magnetization arises out
of individual atoms (which is the actual physical case), the magnetization is assumed
2.3 Micromagnetic Model 31
→i
.m− m→ j = (m i,x x̂ + m i,y ŷ + m i,z ẑ) − (m j,x x̂ + m j,y ŷ + m j,z ẑ)
( ) ( )
∂m x ∂m x ∂m x ∂m y ∂m y ∂m y
≈ Δx + Δy + Δz x̂ + Δx + Δy + Δz ŷ
∂x ∂y ∂z ∂x ∂y ∂z
( )
∂m z ∂m z ∂m z
+ Δx + Δy + Δz ẑ
∂x ∂y ∂z
( )( )
∂ ∂ ∂
= Δx + Δy + Δz m x x̂ + m y ŷ + m z ẑ
∂x ∂y ∂z
( ( ))
∂ ∂ ∂ → m
= (Δx x̂ + Δy ŷ + Δz ẑ). x̂ + ŷ + ẑ (m x x̂ + m y ŷ + m z ẑ) = (ri,→ j .∇) →
∂x ∂y ∂z
(2.10)
Fig. 2.4 Transition from model of atomic spins. S→1 ,. S→2 ,…(Heisenberg Hamiltonian) to the analytical
micromagnetic model (magnetization .m → treated as a continuous field, to be solved analytically),
and then to the numerical micromagnetic model (the continuous field is now discretized to apply
numerical methods), is shown here
again we have to go discrete, and a numerical grid needs to be chosen (Fig. 2.4). But
the mesh size (distance between two adjacent grid points) can be much larger than
the lattice constant. For example, to model domain walls in ferromagnetic films with
perpendicular anisotropy, a mesh size of about 1–2 nm is good enough, which is
one order higher than atomistic distances which are in Angstroms (Fig. 2.4). Thus
moving from the atomistic picture to a continuous picture and subsequently dis-
cretizing it helps in modelling the system at a scale which is fine enough but is not
as computationally resource intense as the atomic scale.
Formation of a Domain Wall: Domains are formed in the ferromagnetic layer
to minimize the magneto-static energy . E di pole . But they come at a cost: two domains
with moments anti-parallel to each other cannot be right next to each other without
a transition region. If there’s no transition region, two adjacent moments will have
opposite orientations, and then their contribution to exchange energy . E exchange will
be infinite, following Eq. 2.11. So minimizing . E exchange requires the formation of a
wide transition region between two adjacent domains, with the magnetization vector
rotating smoothly from one orientation (. Mz = 1 for PMA) to the opposite orientation
(. Mz = −1 for PMA) (Fig. 2.5). Higher the value of the exchange correlation (. A),
wider is the associated domain wall.
At the same time, minimizing the anisotropy energy . E ani requires reduction in the
size of the domain wall since inside the domain wall, the moments are not oriented
along the easy axis (out-of-plane or .z-axis for PMA) leading to higher anisotropy
energy, following Eq. 2.12 (Fig. 2.5). Thus the width of the domain wall (.δ) depends
on a trade-off between the . E exchange and . E ani and is given as follows (for thin films
exhibiting PMA) (Aharoni 2000; Blundell 2001):
/
A
.δ = π (2.15)
KPMA
Based on the aforementioned values of. A (.10−10 J/m) and. K P M A (.0.5 × 106 J/m.3 ),
the domain-wall width turns out to be .≈45 nm. Thus, when the lateral dimensions of
a nanomagnet exhibiting PMA are below .≈45 nm each, the single-domain/macro-
spin model can be applied to the nanomagnet; else, a micromagnetic model needs to
be used.
In ferromagnetic layers exhibiting PMA, a domain wall can either be a Neel wall or
a Bloch wall (Emori et al. 2013; Ryu et al. 2013; Bhowmik et al. 2015). The directions
of magnetic moments inside a Neel wall are shown in Fig. 2.5. The magnetization
→ as a function of position (.x, y, z) (.x − y-plane being
inside the Neel domain wall .m,
the film plane), can also be written as follows:
( ) ( )
πx πx
.m z = cos , m x = sin , my = 0 (2.16)
W W
If the domain wall is of Bloch type instead, the magnetization inside the wall is
given as follows:
( ) ( )
πx πx
.m z = cos , m y = sin , mx = 0 (2.17)
W W
For both the above magnetization profiles, the domain wall extends from position
. x = 0 to position.x = W (.W is the domain-wall width), with the moments for position
. x < 0 being vertically up (.+z) uniformly and moments for position . x > 0 being
vertically down (.−z) uniformly, since the ferromagnetic layer exhibits PMA. But in
the Neel wall, the magnetization rotates in the .x − z-plane (.m y = 0), as shown in
Fig. 2.5. In the Bloch wall, the magnetization rotates in the . y − z-plane (.m z = 0).
Whether a Neel wall is formed or a Bloch wall depends on various factors including
the width of the ferromagnetic nanowire/nanobar in which the domain wall is formed,
whether the domain wall is longitudinal or transverse, and also on the magnitude
of an asymmetric exchange interaction, called Dzyaloshinskii-Moriya Interaction
(DMI), at the heavy-metal-ferromagnetic-metal interface (Emori et al. 2013; Ryu
et al. 2013; Bhowmik et al. 2015). Both Neel walls and Bloch walls have been reported
experimentally in heavy-metal-ferromagnetic-metal hetero-structures, which are of
our interest in this book (Emori et al. 2013; Ryu et al. 2013; Bhowmik et al. 2015).
Micromagnetic simulations have shown that a high value of DMI supports Neel wall
formation (Emori et al. 2013, 2014; Ryu et al. 2013), while a low value of DMI
supports Bloch wall formation (Bhowmik et al. 2015).
The effective magnetic field . H→e f f (t) can be obtained from the net energy term in
Eq. 2.2 (now a function of time .t since the magnetization is also a function of time)
as follows:
∂E
. H→e f f (t) = − (2.18)
→
∂ M(t)
→
The dynamics of . M(t) as a function of time .t, in the presence of . H→e f f (t), is given
by Arrott (2005):
→ ( ( → ))
d M(t) → α d M(t)
. = −γ M(t) × H→e f f (t) − (2.19)
dt γ Ms dt
where .γ is the gyromagnetic ratio and .α is the damping factor. Here, . M(t) → × H→e f f (t)
corresponds to the magnetic precession term, but only having that term will mean that
the magnetization keeps rotating/precessing with the axis being along the direction
of the effective magnetic field . H→e f f . But we know from the single-domain model
discussed before that in the end, at equilibrium, the magnetization is such that the
net energy term in Eq. 2.2 is minimized and . M → aligns along . H→e f f . To enable this
→
in the dynamics equation, the .α dt term has been added to the effective magnetic
dM
→
field. Considering that the norm of the macro-spin vector (.| M(t)|) is conserved in
the single-domain model, Eq. 2.19 reduces to the Landau–Lifschitz–Gilbert (LLG)
equation given below Arrott (2005):
→
d M(t) γ αγ
. =− →
( M(t) × H→e f f ((t)) − →
( M(t) →
× ( M(t) × H→e f f (t)))
dt 1 + α2 Ms (1 + α2 )
(2.20)
For the single-domain magnet exhibiting PMA, for which we have solved the
energy minimization equation earlier, we now solve the LLG equation numerically
over time as the applied magnetic field is varied from a high positive value to a high
negative value and back to the high positive value, while being applied first in the
out-of-plane direction (.z). The hysteresis plot we thus obtain (shown in Fig. 2.6) is
similar to what we obtained earlier from energy minimization (Fig. 2.2c), but in this
case, we do see that as we increase the temporal rate at which the field is varied (ramp
rate), the switching field goes down (Fig. 2.6). This is an effect which can only be
captured if the dynamics of the system is modelled as we have done here. Writing
the numerical code to solve LLG equations and obtain these hysteresis/easy-axis-
switching plots has been left as an exercise at the end of this chapter. The parameters
in the same code can be changed to obtain hard-axis plots like in Fig. 2.3b.
As another example of magnetization dynamics, obtained by solving the LLG
equations, we show in Fig. 2.7 how fast the magnetization aligns with a constant
applied magnetic field (0.1 T applied along .z-axis from time .t = 0, no anisotropy
field has been considered here), as a function of the damping constant .α (in Eq. 2.20).
36 2 Introduction to Nanomagnetism and Spintronics
Fig. 2.6 Out-of-plane magnetization (. Mz ) versus out-of-plane magnetic field plot, obtained by
solving the LLG equation numerically at every value of applied magnetic field. The magnetic field
has been swept uniformly from 8 T to .−8 T, and back to 8 T, at a ramp rate of 7 T/ns (in (a)) and
0.07 T/ns (in (b))
At .t = 0, the magnetization is along the .x-axis. We observe that for a low value of
α, the magnetization precesses for a long time around the axis of the applied field
.
(sinusoidal behaviour of . Mx and . M y with time) and slowly aligns along the z-axis
(. Mz increases to 1) (Fig. 2.7a) (Arrott 2005). But when .α is high, the precession
decays very fast and the magnetization aligns with the applied field (its equilibrium
direction) (Fig. 2.7c). The period of the oscillation is.≈0.37 ns, and the corresponding
frequency is .≈2.7 GHz. With the gyromagnetic ratio (in Hz/T) being 28 GHz/T and
0.1 T being applied, the frequency value obtained makes intuitive sense. Writing the
numerical code to solve LLG equations and obtain these magnetic precession plots
has been left as an exercise at the end of this chapter.
Fig. 2.7 An external magnetic field is applied in the .z direction starting from time .t = 0. The
magnet has no anisotropy. Three different values of damping constant (.α) are considered: a 0.01,
b 0.05, c 0.1
magnetic-field-driven switching (Apalkov et al. 2016; Lee and Lee 2016). This use
of the flow of spin-polarized electrons (spin current) to switch the magnetization
marks the transition from nanomagnetism to spintronics.
Spin transfer torque (STT) was the first popular mechanism used in magnetic
memory devices to generate spin current and switch the magnetization. In a spin valve
or a magnetic tunnel junction, as electrons pass through the ferromagnetic pinned
layer, they become spin polarized. When these electrons enter the ferromagnetic free
layer, they transfer spin angular momentum to the free layer and thus manipulate
the magnetization of the free layer. This mechanism is the working principle of Spin
Transfer Torque Magnetic Random Access Memory (STTMRAM), the schematic
of which has been shown in Chap. 1 (Apalkov et al. 2016; Lee and Lee 2016).
38 2 Introduction to Nanomagnetism and Spintronics
STT has also been used to drive ferromagnetic-domain-wall motion using very
low current pulses and has been used for the operation of magnetic racetrack mem-
ories (Parkin et al. 2008). When spin-polarized electrons coming from a uniformly
magnetized region impinge on a domain wall, they try to align the moments of the
domain wall in the direction of their own spin, resulting in domain-wall motion.
In heavy-metal/ferromagnetic-metal hetero-structures, an alternative to STT for
magnetic switching and domain-wall motion is spin-orbit torque (SOT), the origin of
which can be Rashba effect or spin Hall effect as mentioned before. We first present
here a brief overview of seminal experimental reports on SOT-driven magnetic
switching. We then discuss how the LLG equation presented above (Eq. 2.20) can
be modified to incorporate SOT and model this experimentally observed SOT-driven
switching.
In Miron et al. (2010), reported the measurement of SOT in a heavy
metal/ferromagnet/oxide tri-layer structure: a 0.6-nm-thick Co layer was used as
the ferromagnetic layer, sandwiched between a 3-nm-thick Pt layer (heavy metal)
and a 1.6 nm AlOx (oxide) layer. Due to the Rashba effect, Co magnetic moments
experience an effective magnetic field when an in-plane current flows through the
Co layer (Fig. 2.1a). 0.5 .µm wide and 5 .µm long nanowires are fabricated from this
Pt/Co/AlOx stack, which also exhibits PMA. Starting from a saturated state of the
magnet in the out-of-plane (.+z) direction, application of a current pulse at a zero
magnetic field was found experimentally to nucleate reverse polarized domains in
the magnet.
In Miron et al. (2011), deterministic switching between vertically up (.+z) and
vertically down (.−z) states of the magnet in a 500 nm by 500 nm square Co dot made
from the same stack by applying current pulses parallel to an externally applied in-
plane magnetic field was demonstrated. When the applied in-plane magnetic field
is positive (along .+x), a negative current pulse (red colour) of magnitude 2.6 mA
switches the magnet up (. Mz = 1), while a positive current pulse (black colour) of the
same magnitude switches the magnet down (. Mz = −1). When the applied field is
negative (along .−x), a negative current pulse switches the magnet down (. Mz = −1)
and a positive pulse switches the magnet up (. Mz = 1) (Table 2.1).
Liu et al. also reported the same deterministic switching on micron-wide Hall bars
fabricated from the Pt (2 nm)/Co (0.6 nm)/AlO.x stack, exhibiting PMA (Table 2.1), in
Liu et al. (2012b). But they ascribed the origin of SOT to spin Hall effect (SHE) in the
heavy metal (Pt) and resultant accumulation of spin-polarized electrons at the heavy-
metal-ferromagnetic-metal interface (Fig. 2.1b), as opposed to Rashba effect at the
same interface. Similar to the experiment by Miron et al., here also, in the presence of
an externally applied in-plane magnetic field, current pulses flowing along the axis of
the field generate hysteric magnetic switching between up (. Mz > 0) and down states
(. Mz < 0). Switching the direction of the applied field changes the sense/handedness
of the switching curve (Table 2.1).
Liu et al. carried out similar switching experiments on micron-wide Hall bars
fabricated from Ta (4 nm)/CoFeB (1 nm)/MgO (1.6 nm)/Ta (1 nm) stack, which
also exhibits PMA, and reported the results in Liu et al. (2012a). Here, Ta is the
heavy metal instead of Pt, CoFeB is the ferromagnet instead of Co, and MgO is the
2.5 Spin-Orbit-Torque-Driven Switching … 39
oxide layer instead of AlO.x . Similar deterministic switching is also observed for
Ta/CoFeB/MgO, but the handedness of the current-induced hysteresis is opposite
to that of Pt/Co/AlO.x (Table 2.1), and the switching current density is also lower
compared to that for Co/Pt/AlO.x . Since Liu et al. ascribed the origin of SOT to spin
Hall effect (SHE), they concluded that the spin Hall angle (.θ S H E ), or the ratio of the
spin current to the charge current, for Ta is larger in magnitude and opposite in sign
compared to that for Pt.
We next show how the LLG equation discussed in the previous section, which
models the dynamic of a single-domain magnet under the application of magnetic
fields, can be modified to include SOT-driven magnetization dynamics. The modified
LLG equation, known as Landau–Lifschitz–Gilbert–Slonczewski (LLGS) equation,
which represents the magnetization dynamics inside the ferromagnetic layer, is as
follows:
→
d M(t) γ α
. =− →
( M(t) × H→e f f (t)) − γ →
( M(t) →
× ( M(t) × H→e f f (t))) − γ τ→S L
dt 1 + α2 1 + α2
(2.21)
where .τ→SL accounts for SOT due to the in-plane current flowing through the heavy-
metal layer below the ferromagnetic layer. .τ→SL is given as follows:
β → →
τ→
. SL = ( M(t) × ( M(t) × σ→ )) (2.22)
1 + α2
40 2 Introduction to Nanomagnetism and Spintronics
where . Jc is the charge current density flowing through the heavy metal, .θ S H E = spin
Hall angle of the heavy metal, .d = thickness of the ferromagnetic layer, and .e =
charge of an electron.
Next, we numerically simulate the LLGS equation (Eq. 2.21) and obtain magne-
tization trajectories, as shown in Fig. 2.8, for different polarities of applied charge
current and magnetic field (writing the numeric code and obtaining these results is
left as an exercise at the end of this chapter). In all cases, charge current. Jc flows along
the same axis in which the external magnetic field is applied. This makes the spin
polarization (due to the current) .σ→ orthogonal to the direction of the magnetic field.
The magnitude of the current density (. Jc ) is always 10.6 A/cm.2 , while the magnitude
of the magnetic field is always 50 mT. Only their polarities are reversed, one at a
time, to obtain four possible cases as shown in Fig. 2.8. We observe from our numer-
ical LLGS solution that when both the current and the field have the same polarity,
starting from . Mz = 1, the magnet switches to .−z (. Mz = −1), i.e., . Mz = −1 is the
stable state of the magnet. But when the current and the field have opposite polarities,
starting from . Mz = 1, the magnet stays at that state, i.e., . Mz = 1 is now the stable
state of the magnet. This switching is consistent with that experimentally obtained
for Pt/Co/AlOx, as shown in Table 2.1.
For the case of Ta/CoFeB/MgO, the sign of .θ S H E in Eq. 2.23 changes. So now, for
a given polarity of current density, the direction of spin accumulation (.σ→ ) is opposite
of that in Fig. 2.8. So now, when current and magnetic field have the same polarity,
. M z = 1 is the stable state, and when current and magnetic field have the opposite
Fig. 2.8 Time dynamics of the magnetization, as obtained from solving the LLGS equation numer-
ically for a nanomagnet exhibiting PMA, under the application of a constant external magnetic field
in .+/−y direction and charge current in .+/−y direction, which leads to accumulation of electrons
with spin polarization in .+/−x direction. Different cases are shown here: a current in .+y, field in
.+y b current in .−y, field in .+y c current in .+y, field in .−y d current in .−y, field in .−y
with experimental results qualitatively. For example, as mentioned above, the differ-
ent switching directions predicted for different polarities of in-plane field and in-plane
SOT-causing current, which this single-domain model predicts, match with the exper-
imental results shown in Table 2.1. But for a quantitative match of required switch-
ing current, required in-plane magnetic field, etc., SOT-driven nucleation of reverse
domains and SOT-driven domain-wall motion (where the single-domain assumption
doesn’t hold) need to be modelled. This has been discussed in detail in Lee et al.
(2014) and Bhowmik et al. (2016b). Also, thermal field needs to be incorporated in
the LLGS equation which will make the switching stochastic. In fact, because of the
thermal field, the magnet can switch below the critical current density predicted by
LLGS-equation-based modelling which doesn’t include the thermal field. This has
been discussed in detail in Apalkov et al. (2016) and Lee and Lee (2016).
42 2 Introduction to Nanomagnetism and Spintronics
SOT-driven domain-wall motion has also been considered for synaptic devices
in neuromorphic computing, and we discuss that in detail later in the book. There
we show that we can use a micromagnetic package called “mumax3” (Vansteenkiste
et al. 2014) and numerically solve the LLGS equation (Eq. 2.21) for several magnetic
moments in a micromagnetic framework, as opposed to just for one macro-spin that
we have shown here. This will help us model the SOT-driven domain-wall dynamics
and calibrate it with experiments (Emori et al. 2013, 2014; Ryu et al. 2013; Bhowmik
et al. 2015). Also later in the book, we discuss SOT-driven magnetic oscillation in spin
Hall nano-oscillators (SHNO) and the application of SHNOs in neuromorphic and
Ising computing. To model SHNOs, we again numerically solve the LLGS equation
(Eq. 2.21), both in the single-domain and the micromagnetic frameworks.
Suggested Exercises
equations here), i.e., if the magnetization of the free layer is towards .+z initially,
that of the pinned layer is towards .−z. Vary the magnitude of current and note
down the magnitude at which switching starts happening. Also record the trajectory
of the magnet during this magnetic-field-driven switching. Now, vary the damping
parameter, repeat the same exercise, and plot the influence of damping parameter on
switching current. Compare your results with that you obtained for magnetic-field-
driven switching above.
(c) In the case of spin-orbit torque (SOT), electrons with spin polarized in-plane get
injected into the ferromagnet. Its influence on magnetization can be easily simulated
by changing the direction of magnetization of pinned layer, in the model you used for
part (b) above, from vertically up/down (.+/−z) to some direction in-plane. Please
do that and repeat the exercise pf part (b) above. You will see that the magnet does
not switch from .+z to .−z anymore; it goes in-plane and stays there as long as the
spin torque is present. What happens when the spin torque is removed?
(d) In order to make the magnet switch fully from .+z to .−z, an in-plane exter-
nal magnetic field needs to be applied in addition, orthogonal to direction of spin
polarization (direction of magnetization of the pinned layer). Please add that in the
simulation and see how the switching occurs. Change the polarity of the current and
the polarity of the external field and study how the nature of the switching changes.
You will obtain signature SOT-driven switching plots, like that shown in Fig. 2.8.
References
Emori S, Bauer U, Ahn SM, Martinez E, Beach GSD (2013) Current-driven dynamics of chiral
ferromagnetic domain walls. Nat Mater 12(7):611–616
Ikeda S et al (2010) A perpendicular-anisotropy CoFeB-MgO magnetic tunnel junction. Nat Mater
9:721–724
Kaushik D, Singh U, Sahu U, Sreedevi I, Bhowmik D (2020) Comparing domain wall synapse with
other non volatile memory devices for on-chip learning in analog hardware neural network. AIP
Adv 10(2):025111
Lee OJ, Liu LQ, Pai CF, Li Y, Tseng HW, Gowtham PG, Park JP, Ralph DC, Buhrman RA (2014)
Central role of domain wall depinning for perpendicular magnetization switching driven by spin
torque from the spin Hall effect. Phys Rev B 89:024418
Lee S-W, Lee K-J (2016) Emerging three-terminal magnetic memory devices. Proc IEEE
104(10):1831–1843
Liu L, Pai CF, Li Y, Tseng HW, Ralph DC, Buhrman RA (2012a) Spin-torque switching with the
giant spin Hall effect of tantalum. Science 336(6081):555–558
Liu L, Lee OJ, Gudmundsen TJ, Ralph DC, Buhrman RA (2012b) Current-induced switching of
perpendicularly magnetized magnetic layers using spin torque from the spin Hall effect. Phys
Rev Lett 109(9):096602
Maekawa S, Valenzuela SO, Saitoh E, Kimura T (2017) Spin current. Oxford University Press
Miron IM et al (2010) Current-driven spin torque induced by the Rashba effect in a ferromagnetic
metal layer. Nature Mater 9:230–234
Miron IM et al (2011) Perpendicular switching of a single ferromagnetic layer induced by in-plane
current injection. Nature 476:189–193
Parkin S et al (2008) Magnetic domain-wall racetrack memory. Science 320:5873
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Nanotechnol 8(7):527–533
Vansteenkiste A, Leliaert J, Dvornik M, Helsen M, Garcia-Sanchez F, Waeyenberge BV (2014) The
design and verification of MuMax3. AIP Adv 4:107133
Chapter 3
Introduction to Artificial Neural
Networks (ANN) and Spiking Neural
Networks (SNN)
stated above), we still need to classify the training data with reasonable accuracy,
which doesn’t happen in the case of under-fitting. Possible reasons for under-fitting
are that the ML model (NN say) is not complex enough, the hyper-parameters (like
learning ratio, as we will see later) of the model aren’t set at correct values, or the
training hasn’t been carried out for sufficient number of iterations or epochs.
– Over-fitting: Over-fitting happens when the model yields very high classification
accuracy on training data but much lower accuracy on test data. This is basically
what has been referred to earlier here as fitting the model on training data without
grasping the inherent process/true world picture which generates the data. Possible
reason for over-fitting is making the model too complex (e.g., a very large NN with
too many synaptic weights, more details below).
We discuss a single-layer perceptron here (as shown in Fig. 3.1), i.e., there is no
hidden layer present. It can also be called fully connected neural network (FCNN),
without a hidden layer. We discuss this network here in the context of classifying
hand-written digits from the MNIST database (Deng 2012), but this method can be
extended to classifying other kinds of data, like that in other simple ML data sets
like Fisher’s Iris (Fisher 1936), Wisconsin Breast Cancer (WBC) data set (Agarap
2017), etc.
For the case of MNIST, number of nodes in input layer .= number of pixels of
each input image of a digit .= 28 .× 28 .= 784. Input to the nodes of the input layer
.{x 1 , x 2 , x 3 . . . . . .x 784 } corresponds to the intensities of the pixels. Number of nodes
in output layer .= number of digits .= 10. The desired output when input image is
of digit 0 is given by .{Y1 , Y2 , Y3 , . . . Y10 } = {1, −1, −1, . . . − 1}, for digit 1 is given
by .{Y1 , Y2 , Y3 , . . . Y10 } = {−1, 1, −1, . . . − 1}, and so on. The target of training the
network is such that for a given input, the output .{y1 , y2 , y3 , . . . y10 } at the output
layer of the network matches the desired output.
Following the standard FCNN training algorithm, output at any node n is given by
2
y = f (z n ) =
. n − 1;
1 + e−λzn
z n = wn,1 x1 +wn,2 x2 + · · · · · · wn,784 x784 + wn,0
= (∑m=1
m=784
wn,m xm ) + wn,0 , (3.1)
3.2 ANN: Fully Connected Neural Network (FCNN) ... 47
Fig. 3.1 Schematic of a fully connected neural network (FCNN) without a hidden layer
where . f is the non-linear activation function (tanh function in this case), and
wn,1 , wn,2 . . . . . . wn,784 , wn,0 -s are the synaptic weights, .wn,0 being the bias weight.
.
Multiplication between the input vector and the synaptic-weight matrix is called
a vector matrix multiplication (VMM) operation. This is the forward computation
process for this network.
We next describe how the weights of the FCNN are updated to train the net-
work. We use the very popular Stochastic Gradient Descent (SGD) algorithm, which
attempts to reach the global minimum of the error landscape (the weight parameters
are the axes here in this hyper-dimensional space) by travelling along the gradient
of the landscape. Error at output node .n is calculated as follows:
1
∈ =
. n (Yn − yn )2 (3.2)
2
The weight of the synapse connecting input node .m with output node .n is updated
between iteration .i and .i + 1 as follows:
∂∈n
wn,m
.
i+1
= wn,m
i
− Δwn,m = wn,m
i
−η
∂wn,m
ηλ
= wn,m
i
− (Yn − yn )(1 − yn2 )xm , (3.3)
2
and weight of the bias synapse for output node .n is updated as follows:
48 3 Introduction to Artificial Neural Networks …
∂∈n
wn,0
.
i+1
= wn,0
i
− Δwn,0 = wn,0
i
−η
∂wn,0
ηλ
= wn,0
i
− (Yn − yn )(1 − yn2 ), (3.4)
2
where .η is the learning rate (hyper-parameter in the model, taken to be 0.1 here). The
training sample is changed at every iteration to exhaust all examples in the training
set. Then this process is repeated several times, each repetition being called an epoch.
Thus, total number of iterations .= number of epochs .× number of training samples.
In Fig. 3.3a, we show our results for training this SLP/FCNN without a hidden
layer on the MNIST data set of handwritten digits. 10,000 samples, almost uniformly
distributed between the ten output classes (ten digits), are used for training, while
1,000 samples, distinct from the training samples, are used for testing. Training
accuracy versus epoch and test accuracy versus epoch are plotted in Fig. 3.3. While
the final training accuracy is high (.>90%), test accuracy saturates at around 70.%.
Without adding any hidden layer to the neural network, it is not possible to increase
the test accuracy considerably above this value. We discuss addition of a hidden layer
to FCNN next.
In a FCNN, the input vector (.x1 ,.x2 ,….xm ….x M ) corresponds to the data sample which
needs to be classified, as mentioned before. During forward computation for an
FCNN with one hidden layer (also called Multi-Layer Perceptron, or MLP), it is first
multiplied with the synaptic-weight matrix (VMM operation), and then a non-linear
activation function (“tanh” in our case again) is applied on the outcome of the MVM
operation. This generates the input for the next/hidden layer: (.z 1 , .z 2 ,…….z p ….z P ).
This is shown in the equations below and in Fig. 3.2:
2
z p = f (z¯p ) = −1
1 + (e−λz¯p )
(3.5)
As shown in Fig. 3.2, the inputs to the hidden layer are then multiplied with the
next synaptic-weight matrix as follows, and then “tanh” function is applied to yield
the final output: . y1 , . y2 ,……. y p …. y N .
2
yn = f ( y¯n ) = − 1 (3.6)
1 + (e−λ y¯n )
3.3 ANN: Fully Connected Neural Network (FCNN) with Hidden … 49
Fig. 3.2 Schematic of a fully connected neural network (FCNN) with one hidden layer. (Reprinted
with permission from: Sahu U, Sisodia N, Muduli PK, Bhowmik D (2022) Ferrimagnetic synapse
devices for fast and energy-efficient on-chip learning on crossbar-array-based neural networks (a
device-circuit-system co-study). IEEE Trans Electr Dev 69(4):0018–9383 .© 2022 Sahu et al. 2022)
During the learning process, the final output . y1 , . y2 ,……. y p …. y P is then compared
with the desired output.Y1 ,.Y2 ,…….Y p ….Y P to generate the error, as shown in Fig. 3.2a.
The synaptic weights in Eqs. 3.5 and 3.6 are updated based on the error.
Update of the synaptic-weight matrix in Eq. 3.6 is given by
ηλ
Δvn, p =
. (Yn − yn )(1 − yn2 ))z p = Δvn z p (3.7)
2
where .Δvn = the common part of weight update generated at each node .n of the
output layer: (. ηλ
2
(Yn − yn )(1 − yn2 )). Learning rate (.η) is again taken to be 0.1.
Update of the synaptic-weight matrix in Eq. 3.5 is given by
λ
Δw p,m = (∑n=1
.
n=N
Δvn vn, p ) (1 − z 2p ))xm (3.8)
2
As evident from Eq. 3.8, weight updates for the synaptic weights between the first
layer and the hidden layer depend not only the common part of weight update at that
stage . λ2 (1 − z 2p )) but also on the synaptic weights, at the next stage, which connect
the hidden layer with the output layer (.(∑n=1 n=N
Δvn vn, p )). This is what is known as
back-propagation in machine learning literature (Fig. 3.2).
In Fig. 3.3b, we show our results for training this MLP/FCNN with one hidden
layer on the same MNIST data set. 10,000 samples, almost uniformly distributed
between the ten output classes (ten digits), are used for training, while 1,000 samples,
50 3 Introduction to Artificial Neural Networks …
Fig. 3.3 a Training and test accuracy of an FCNN with no hidden layer versus epoch number during
training. b Training and test accuracy of an FCNN with one hidden layer (with 250 nodes) versus
epoch number during training. Learning rate (hyper-parameter) is taken to be 0.1 in both cases
distinct from the training samples, are used for testing. Number of nodes in the hidden
layer in our design is 250. Training accuracy versus epoch and test accuracy versus
epoch are plotted in Fig. 3.3. While the final training accuracy is high (.>90%), test
accuracy saturates at around 70.%.
The FCNNs discussed in the previous sections involve multiplying different synaptic
weights with different input features, which can be different pixels of an input image.
However, this is not found to be a very efficient way of image classification because
there are too many synaptic weights involved, and everything is left up to the updates
of these weights, which can go in any trajectory hampering the whole training. In
CNNs, which have been found to be much more efficient for image classification
(once the images become much more complex compared to MNIST), instead of sev-
eral layers of VMM operation like in the FCNNs before, several layers of convolution
operation are first carried out on each image, as shown in Fig. 3.4. For each CNN
Fig. 3.4 Schematic of a convolutional neural network (CNN) showing the convolution operations
between a particular segment of the input image and convolutional weight kernels. (Reprinted
with permission from: Desai VB, Kaushik D, Sharda J, Bhowmik D (2022) On-chip learning of a
domain-wall-synapse-crossbar-array-based convolutional neural network. Neuromorphic Comput
Eng 2(2):024006 Desai et al. 2022)
3.5 Implementation of ANNs Through Crossbar Arrays … 51
operation, weight kernels corresponding to different features are first convolved with
different segments of the image as described below through the example in Fig. 3.4.
64 convolutional weight kernels, corresponding to 64 features (which need
to be extracted), are used. Each kernel is of .(3 × 3 × 3) size. The RGB com-
ponents of the first .(3 × 3 × 3) segment of the input image are denoted by
.(x 1 , . . . , x 9 , y1 , . . . , y9 , z 1 , . . . , z 9 ) say. The synaptic weights of the convolutional
kernels are represented by .u ik , vki , wki , where .i indicates the kernel number (from 1
to 64) and .k indicates the position in the kernel matrix (from 1 to 9), and .u, .v, and .w
correspond to R, G, and B, respectively. The output .oi , where .i indicates the kernel
number (from 1 to 64) and .βi denotes the bias term (one for each kernel) is given by
∑
9 ∑
9 ∑
9
o =
. i xk u ik + yk vki + z k wki + βi (3.9)
k=1 k=1 k=1
This way, the convolutional weight kernel (while keeping the weights unchanged)
is moved over various segments whose pixel indices differ from the first segment by
.(X, Y ) say. In that case, the above operation turns out to be
∑
9 ∑
9 ∑
9
o X,Y =
. i xk+X u ik + yk+Y vki + z k wki + βi (3.10)
k=1 k=1 k=1
Thus, a set of .oi values is created which is transferred to the next convolutional
layer, where some other convolutional kernels are used. Between the two convolution
operations, operations like max pooling and drop-out are often performed. In max
pooling, the highest among four adjacent .oi values is often chosen. This helps in
reducing the size of the image in the subsequent convolution operations. The purpose
of drop-out operation is to randomly drop some.oi values. This helps in reducing over-
fitting (mentioned in Sect. 3.1). Finally, the matrix is flattened into a single column
vector, which is applied on the FCNN (like in previous sections) to generate a 10-
dimensional column vector for output like before. The weights of the FCNN layer
and the weights of the convolutional kernels are all updated through gradient descent
method (following back-propagation) as before. More details on CNN training can
be found in (Desai et al. 2022).
We next briefly discuss how the ANNs shown in the previous sections can be imple-
mented through crossbar arrays of non-volatile memory (NVM) synapse devices
(Christensen et al. 2022; Tsai et al. 2018; Sebastian et al. 2018; Chakraborty et al.
2020). The spintronic domain-wall synapse mentioned in Chap. 1 and to be covered
in more details later in the book is one such NVM synapse. A crossbar array stores
52 3 Introduction to Artificial Neural Networks …
Fig. 3.5 Instantaneous vector matrix multiplication (VMM) (shown by blue arrows) makes forward
computation on a crossbar array very fast; hence it speeds up both on-chip inference (a) and on-
chip learning (b). Instantaneous outer product calculation (shown by red arrows) enables parallel
weight-update operation in crossbar arrays; hence it speeds up on-chip learning (b) (more details
in Sadashiva et al. 2024)
the weights of the ANN in its synaptic devices (Fig. 3.5) and executes Vector Matrix
Multiplication (VMM) between the input vector and the corresponding weights in
a parallel fashion using Ohm’s law. This makes forward computation, needed both
for inference with trained networks or training of networks, very fast and energy
efficient. To train the networks in the crossbar arrays, the equations mentioned above
for training of ANNs need to be implemented on the crossbar array itself. As can be
seen from Eq. (3.3), the weight update at any synapse connecting input node .m with
output node .n is a product of a common part of weight update which depends on the
output node .n (. ηλ
2
(Yn − yn )(1 − yn2 )) and the input at node .m (.xm ). Such multiplica-
tion can happen simultaneously on all the synapses of a crossbar array (outer product
calculation), making crossbar arrays suitable for on-chip learning (training in custom
hardware instead of conventional computer) as well. While implementing the back-
propagation algorithm, crossbar arrays can provide further acceleration by imple-
menting Eqs. 3.6 and 3.7 very fast, as discussed in detail in Chap. 5 where we look
into spintronic domain-wall synapse-based crossbar array implementations of ANN.
The ANN training algorithms discussed in this chapter may need to be
suitably modified to simplify the peripheral circuitry needed to apply weight-
update/programming pulses on the NVM synapses and train the crossbar array. One
such modification is applying thresholding functions on the weight-update equations
mentioned above (Eqs. 3.7 and 3.8). This limits the weight update of any synapse
device at any iteration to .+1 bit (long-term potentiation, or LTP), .−1 bit (long-term
depression, or LTD), or no update. We discuss the thresholding algorithm in detail
in Chap. 5.
3.6 Spiking Neural Network (SNN) 53
Fig. 3.6 a LTP and LTD characteristics of an ideal NVM synapse, showing complete linearity and
symmetry b LTD and LTD characteristics of a non-ideal NVM synapse for different non-linearity
factors of LTP (.α P ) and LTD (.α D ) (more details in Sadashiva et al. 2024)
Another important thing that needs to be taken into consideration is the non-
ideality of weight-update characteristics of the NVM synapse: long-term potentiation
or LTP (positive weight update) and long-term depression or LTD (negative weight
update). For an ideal NVM synapse, LTP and LTD are perfectly linear and symmetric
(as shown in Fig. 3.6a), which leads to the highest possible accuracy of the crossbar
array. But for practical NVM synapses, including the domain-wall synapse discussed
in the book, asymmetry and non-linearity of LTP and LTD are non-zero as shown
in Fig. 3.6b. This leads to significant drop in accuracy as discussed in Chap. 5. Ways
to improve the non-linearity and symmetry of the domain-wall synapse, through
incorporation of notches or defects at the edges of the device, are discussed in Chap. 4.
Thus far, we have discussed non-spiking version of neural networks, popularly known
as artificial neural networks (ANNs) as mentioned above. ANNs are much more
commonly used in conventional machine learning (ML), compared to their spike-
based counterparts (SNNs). But the inspiration that ANN derives from the brain is
rather loose: in the brain, neurons are connected to each other through synapses, and
in ANNs also, one layer of non-linear activation functions (called neurons) feeds to
the next layer of non-linear activation functions modulated by weights which can be
thought of as synapses (Fig. 3.1). But apart from this, there’s not much resemblance
between ANN and the brain. For example, ANNs deal with floating point numbers
while the brain processes in the form of temporal spikes. Weights of synapses in
ANNs are updated by minimizing the global error through gradient descent (back-
propagation algorithm, as discussed above). There is very little evidence to suggest
that such a thing happens in the brain; instead, the synaptic strengths in the brain
get modified through local spike-based rules as discussed next. As a result, in order
54 3 Introduction to Artificial Neural Networks …
Depending upon how closely we want the neurons in SNN to represent biological
neurons, different mathematical models like Hodgkin-Huxley (HH) model, Integrate-
and-Fire (IF) model, Leaky-Integrate-and-Fire (LIF) model, Izhikevich model, etc.
can be chosen (Dayan and Abbott 2005; Trappenberg 2010). Among these, the HH
model very closely models the actual behaviour of the neuron (including how the
neuron spikes, as a result of the opening of channels which selectively allow sodium
and potassium ions between inside and outside of the neuron) but is computationally
complex. For the purpose of modelling of SNNs on a conventional computer or
implementation of SNNs on neuromorphic hardware, a much simpler model like
LIF is a better fit. Unlike the HH model, the LIF model doesn’t include the spike-
generation mechanism and cannot predict the shape of the spike (over time). But the
LIF model can predict the precise time at which a spike will be generated, and in
most cases, that is all that is needed from a neuron model in SNNs.
Following the LIF model, the membrane potential .v(t) of each neuron is governed
by the following equation:
dv(t)
C
. = −G L (v(t) − E L ) + I (t) (3.11)
dt
I0
. + E L ≥ Vth ⇒ I0 ≥ G L (Vth − E L )
GL
Thus the neuron spikes only when the input current is higher than the threshold
current .G L (Vth − E L ). Under the application of a fixed input current . I (t) = I0 ,
when . I0 is higher than a threshold .G L (Vth − E L ), the neuron spikes at a frequency
proportional to the magnitude of the current (. I0 ).
where .Γ1 , .Γ2 , .τ1 , and .τ2 are constants related to STDP (Diehl and Cook 2015; Dayan
and Abbott 2005; Trappenberg 2010).
The weight update following the above STDP equation is plotted in Fig. 3.8.
As per this weight-update rule, when the post-neuron spikes after the pre-neuron,
synaptic weight goes up (LTP) and when the post-neuron spikes before the pre-
neuron, synaptic weight goes down (LTP). Shorter the duration between the pre-
neuron spike and the post-neuron spike, larger is the magnitude of LTP or LTD.
While the models of neurons and synapses described above are based on concrete
biological evidence, the design of SNNs composed on such neurons and synapses
(such SNN is meant to be implemented on neuromorphic hardware) is less based
on biological evidence (perhaps because of lack of biological data due to difficulty
in precisely mapping the brain at the neuronal level) and more based on the final
application/learning task at hand. Much like ANN, here also there are multiple layers
of neurons (spiking neurons in this case) connected by synapses. But the synaptic
weights are updated following the local STDP rule as mentioned above.
Diehl and Cook’s seminal paper on STDP-enabled training of SNN for classifica-
tion of MNIST data set (Diehl and Cook 2015) has provided the standard template for
designing such STDP-enabled SNN for subsequent neuromorphic research. Various
kinds of neuromorphic hardware, using different kinds of emerging devices, have
been proposed which implement this SNN algorithm. We show this SNN structure
briefly here and discuss further details of the SNN-training algorithm in Chap. 6
while discussing a spintronics-based implementation of this algorithm.
A schematic of the SNN structure used by Diehl and Cook (2015) is shown in
Fig. 3.9. The SNN has two layers: the input layer and the processing layer. Each node
of the processing layer contains an excitatory neuron as well as an inhibitory neuron.
All the neurons are modelled by LIF. When the input is applied on the input layer,
the signal propagated to the excitatory neurons of the processing layer is in the form
of a spikes, the frequency of which is directly proportional to the intensity of input.
Each excitatory neuron is connected to an inhibitory neuron in a one-to-one fashion,
whereas the inhibitory neuron is connected to all the excitatory neurons except for
the one it receives the input signal from (as shown in Fig. 3.9). The synapses which
connect input-layer neurons to the excitatory neurons of the processing layer store
weights which are updated through the STDP rule. The SNN learns patterns by
forming impressions of these patterns on the synaptic weights, i.e., if the SNN learns
to identify the digit “0” say, the synaptic weights are adjusted such that the intensity
map of the synapse array actually shows a “0.”
While neuromorphic hardware using various kinds of emerging devices has been
proposed using this SNN algorithm (Sengupta et al. 2016; Wang et al. 2018; Sahu
et al. 2019), the algorithm is not known to scale very well. Once hidden layers are
added, STDP-based training doesn’t work very well, and so STDP-enabled SNN is
not known to train well on complex data sets like CIFAR-10, CIFAR-100, etc. Hence,
other methods which don’t use STDP have been used to achieve high classification
3.6 Spiking Neural Network (SNN) 57
accuracy for SNN on complex data sets. One such method is training an ANN first
and then converting the ANN with final weight values to SNN (Sengupta et al. 2019;
Roy et al. 2020). The other method is training the SNN directly by using a modified
version of gradient descent/back-propagation algorithm which handles spikes by
converting them to smooth functions (without that, spikes can’t be differentiated and
back-propagation algorithm can’t be used) (Eshraghian et al. 2023). This technique
is known as surrogate gradient descent. The interested reader can go through recent
reports by Sengupta et al. (2019), Roy et al. (2020), and Eshraghian et al. (2023) to
know more about these techniques. In Chap. 6 of this book, we nonetheless focus
on STDP-enabled training of SNN because STDP being a local rule, it’s easier to
implement STDP in spintronic neuromorphic hardware compared to these other
techniques.
Suggested Exercises
Now, assume that you will implement the same FCNN/MLP using a crossbar array
of synaptic devices with the following synaptic property for long-term potentiation
(LTP) or positive weight update:
G max − G min − An
,
. GP = −n ,
(1 − e P ) + G min , (3.13)
− Amax
1−e P
and the following for long-term depression (LTD) or negative weight update:
You will find the analysis you have carried out here and the related results use-
ful while reading Chaps. 4 and 5 of the book, where we will study the impact of
non-idealities in the domain-wall device’s LTP and LTD properties (non-linearity,
asymmetry, limited bit resolution) on the accuracy of the implemented neural
networks.
References
© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 63
D. Bhowmik, Spintronics-Based Neuromorphic Computing, Springer Tracts in Electrical
and Electronics Engineering, https://doi.org/10.1007/978-981-97-4445-9_4
64 4 The Ferromagnetic Domain-Wall Synapse Device
the read path (Bhowmik et al. 2019; Singh et al. 2020). When the domain wall is
at the rightmost end, conductance is maximum: .G max . This is known as long-term
potentiation (LTP), or positive weight update, of the synapse device.
However, upon application of in-plane “write” current of the opposite polarity, the
domain wall moves towards the left side of the free layer. This causes conductance
to decrease (i.e., the average magnetization of the free layer goes upward, aligning
antiparallel with that of the fixed layer). This is known as long-term depression
(LTD), or negative weight increase, of the synapse device.
While performing on-chip learning in neuromorphic crossbar arrays, the network
is trained by updating the weights of synapses after every iteration (LTP and LTD),
following the standard gradient descent algorithm, as explained in Chap. 3. Hence,
SOT-based domain-wall synaptic device is used for on-chip learning, with the weight
of the synapse being proportional to the conductance of the “read” path of the domain-
wall device, and the weight update carried out by applying current pulses through
the “write” path (Bhowmik et al. 2019).
While performing on-chip learning, the network is trained by updating the weights
of synapses after every iteration following the standard gradient descent algorithm.
SOT-based domain-wall synaptic device is used for on-chip learning. Weights are
updated by applying an appropriate vertical “write” current pulse to the heavy-metal
layer so that the domain wall will move accordingly. Hence, the required change in
the conductance of the synapse can be achieved (Bhowmik et al. 2019). In the next
section, we demonstrate the working principle of the domain-wall synapse device
(as described above) through micromagnetic simulation.
The physics behind the micromagnetic framework and the mathematical formal-
ism associated with it have been discussed in Chap. 2. Using that micromagnetic
framework, Divya Kaushik et al. (Singh et al. 2020) have carried out and reported
micromagnetic simulation of the domain-wall device on the GPU-accelerated micro-
magnetic package “mumax3,” which we discuss here. The device of lateral dimen-
sions (1000 nm .× 50 nm) is used for performing micromagnetic simulations here
(Emori et al. 2014). Platinum(Pt) is used as the heavy-metal layer because of its
advantage of low resistivity over other similar materials (reduces the Joule heating,
therefore energy needed per current pulse the domain-wall movement is reduced)
and high spin Hall angle (Liu et al. 2011, 2012a). The thickness of the free ferro-
magnetic layer above the Pt layer is taken to be 1 nm. The spin hall angle of Pt is
0.07. Since thickness of the heavy-metal (Pt) layer (10 nm) is higher than the spin
diffusion length (2–3 nm) (Berger et al. 2018; Qu et al. 2014), the spin current den-
sity injected into the free ferromagnetic layer by the Pt layer (. Js ) .= in-plane charge
current density (. Jc ) .× 0.07 (spin Hall angle) (Liu et al. 2011, 2012a, b).
66 4 The Ferromagnetic Domain-Wall Synapse Device
For the ferromagnetic free layer, the following micromagnetic simulation param-
eters are used: saturation magnetization (. Ms ) .= .7 × 105 A/m, anisotropy constant
(K) .= .8 × 105 J/m.3 , exchange-correlation constant (A) .= .1 × 10−11 J/m, damping
factor .= 0.3 (Emori et al. 2014), and Dzyaloshinskii-Moriya Interaction (DMI) .=
−3
.1.2 × 10 J/.m2 (Singh et al. 2020). The easy axis of the magnetization is in the
out-of-plane direction, i.e., the free layer exhibits perpendicular magnetic anisotropy
(PMA).
In these device simulations (Singh et al. 2020), the domain wall is allowed to move
by applying a current pulse of fixed duration (3 ns) and fixed magnitude (25 .µA),
corresponding to a current density of.≈5 × 106 A/cm.2 , which is applied to the heavy-
metal layer. The movement of the domain wall obtained by our micro-magnetic
simulations is shown in Fig. 4.2. Initially, the domain wall is present at the leftmost
edge of the free ferromagnet layer. A current pulse of fixed magnitude corresponding
to the threshold current density (.≈5 × 106 A/cm.2 ) is allowed to pass through the
heavy-metal layer. This, in turn, changes the conductance of the synaptic device either
by increasing or decreasing it by a fixed step value depending upon the polarity of the
in-plane “write” current applied. The current pulse of fixed magnitude (25 .µA) with
positive polarity and duration 3 ns applied to the heavy metal moves the domain wall
towards the right side of the free layer by fixed step, increasing the conductance by a
fixed step value, whereas the current pulse of fixed magnitude (25 .µA) with negative
polarity and duration 3 ns applied to the heavy metal moves the domain wall towards
the left side of the free layer by the fixed step and decreases the conductance by a
fixed step value. In Fig. 4.2, the blue colour represents the magnetic moments pointing
into the plane, or .m z = −1 (vertically downwards), and the red colour represents the
magnetic moments pointing out of the plane, or .m z = 1 (vertically upwards). The
region where the colour changes from blue to red corresponds to the domain wall.
The corresponding conductance versus pulse plot (LTP, LTD plot), as a result
of these LTP-causing and LTD-causing current pulses, is shown in Fig. 4.3. Based
on the .G max and .G min values calculated for the given MTJ device, it is found that
a positive polarity current pulse of fixed magnitude, i.e., 25 .µA, will increase the
conductance by .ΔG, i.e., .≈0.071 .× .10−3 mho (since the domain wall move towards
the right edge of the free layer by .≈20 nm due to each current pulse). Similarly, a
negative polarity current pulse of fixed magnitude, i.e., .−25 µA, will decrease the
conductance by the same amount, i.e., .≈−0.071 × 10−3 mho and hence the domain
wall will move towards the left edge of the free layer by .≈20 nm. This means that the
conductance value can be (.≈ − 0.071 × 10−3 mho, 0, .≈0.071 .× .10−3 mho), thereby
affecting the domain-wall movement by moving it by fixed step of approximately
20 nm either towards the left edge of the free layer or unchanged or towards the right
edge of the free layer, respectively.
4.2 Micromagnetic Simulation of the Domain-Wall Synapse Device 67
Fig. 4.2 a “Write” current pulses applied on the heavy-metal layer of constant magnitude and
opposite polarities, as a function of time. b Domain-wall motion in the ferromagnetic layer for
different time instants corresponding to different current pulses of fixed magnitude as shown in (a).
Domain wall moves from its initial position when in-plane current flows through heavy metal due to
spin-orbit torque on the magnetization of the ferromagnetic layer above it. The cross product of.Mavg
and.σ decides the direction in which the domain wall will move. Blue colour corresponds to moments
being vertically down and red colour represents moments vertically up (with respect to Fig. 4.1.
Rightward domain-wall motion corresponds to LTP (Fig. 4.3); leftward motion corresponds to LTD
(Fig. 4.3)). (Adapted with permission from: Kaushik D, Singh U, Sahu U, Sreedevi I, Bhowmik
D (2020) Comparing domain-wall synapse with other non volatile memory devices for on-chip
learning in analog hardware neural network. AIP Adv 10(2):025111 Singh et al. 2020)
68 4 The Ferromagnetic Domain-Wall Synapse Device
Fig. 4.3 Conductance response of “read” path versus in-plane “write” current pulse of the domain-
wall device in Fig. 4.1, which is its LTP/LTD characteristic. Conductance increases or decreases
in fixed steps (.ΔG) due to the application of fixed magnitude current pulses of opposite polarities
(positive polarity: LTP due to rightward domain-wall motion in Fig. 4.2, negative polarity: LTD due
to leftward domain-wall motion in Fig. 4.2). (Reprinted with permission from: Kaushik D, Singh
U, Sahu U, Sreedevi I, Bhowmik D (2020) Comparing domain-wall synapse with other non volatile
memory devices for on-chip learning in analog hardware neural network. AIP Adv 10(2):025111
Singh et al. 2020)
The main application of LTP and LTD of non-volatile memory (NVM) devices, like
the domain-wall device, is as a synaptic element in a neuromorphic crossbar array.
As explained in Chap. 3 (and again in more detail in Chap. 5), neural networks are
trained on the crossbar array (on-chip learning) by updating the synaptic weights
through a thresholded version of the back-propagation algorithm (Kaushik et al.
2020). Thereby, positive weight update by 1 bit is deemed LTP and negative weight
update by 1 bit LTD. Non-linearity and asymmetry in LTP and LTD lead to significant
reduction in classification accuracy for the crossbar array because the actual weight
update on the device deviates from that calculated through the back-propagation
algorithm (relevant equations without thresholding provided in Chap. 3 and with
thresholding provided in Chap. 5) (Sun and Yu 2019).
In RRAM, LTP and LTD happen through the creation and annihilation of oxygen
filaments in the oxide layer of the device due to electrical pulses (Chakroborty et al.
2020). In PCM, LTP and LTD happen through amorphization and crystallization of
the phase change material in the device due to electrical processes (Tsai et al. 2018;
Sebastian et al. 2018). These processes are not particularly symmetric, i.e., it is not
like reversing the polarity of the pulse will straight up lead to crystallization or vice
versa. As a result, asymmetry is a major issue in these devices, particularly for PCM.
Non-linearity is also a major issue both for RRAM and PCM, with not all synaptic
states having equal gaps in conductance on the LTP-LTD curves. The conductance
tends to saturate rather quickly with application of pulses due to the inherent physics
of the device.
4.3 Experimental Demonstrations of the Domain-Wall Synapse Device 69
Micromagnetic simulations in the previous section predict a very linear and synap-
tic LTP and LTD characteristic for the domain-wall synapse device. If such synaptic
characteristic is indeed obtained experimentally, then this can be a major advantage
for the domain-wall synapse compared to other NVM synapse devices (resistive
random access memory (RRAM), phase change memory (PCM), etc.) in terms of
obtaining high classification accuracy for on-chip learning in crossbar arrays (Singh
et al. 2020). Also, the LTP-causing pulses are identical to each other and LTD-causing
pulses are identical to each other for the domain-wall synapse, making the associated
peripheral circuit design for on-chip learning in the crossbar array all the more simple
for the domain-wall synapse device (as we will see in the next chapter) (Kaushik
et al. 2020).
In this section, we briefly review various experimental demonstrations of the
domain-wall synapse device and compare the experimentally reported LTP and
LTD with that predicted from simulation in the previous section. While spin-
orbit-torque(SOT)-driven domain-wall motion in heavy-metal-ferromagnetic-metal
hetero-structures has been demonstrated through several experiments over the last
decade (Emori et al. 2013, 2014; Ryu et al. 2013; Bhowmik et al. 2015; Conte
et al. 2015), experimental demonstration of LTP and LTD in such devices through
domain-wall motion in steps is more recent.
In one of the early experimental demonstrations of the domain-wall synapse
(Zhang et al. 2019), Shuai Zhang et al. have deposited the following thin film
stack: Si substrate/Ta (10 nm)/CoFeB (1.2 nm)/MgO (1.6 nm)/Ta (20 nm), using
room-temperature sputtering without a post-annealing process. CoFeB acts as the
ferromagnetic layer in which the domain wall moves, Ta layer below it acts as the
heavy-metal current flowing through which generates SOT, and MgO layer promotes
PMA in CoFeB. 50.× 400.µm.2 Hall bar devices are fabricated from the stack through
photolithography and argon-ion milling. By passing small magnitude “read” current
through one of the bars and measuring anomalous Hall voltage across the orthogo-
nal bar, anomalous Hall resistance, proportional to out-of-plane magnetization in the
CoFeB layer, is measured. LTP- and LTD-causing “write” pulses are applied through
the same Hall bar through which “read” current pulses are applied, just that “write”
current pulses are much larger in magnitude than “read” current pulses and hence the
former can generate SOT to move the domain wall in the CoFeB layer and change the
anomalous Hall resistance of the device but the latter can’t. It is to be noted that for
this work and the other two works we discuss subsequently in this sub-section, the
final synaptic device structure with the “read” path (MTJ) is not fabricated. Hence,
anomalous Hall resistance, which is also proportional to the average out-of-plane
magnetization of the ferromagnetic layer in which the domain wall moves, is used
as a substitute for conductance to obtain the synaptic characteristic (LTP, LTD) of
the device.
Zhang et al. (2019) have experimentally measured anomalous Hall resistance of
the fabricated Hall bar which is plotted as a function of the “write” current pulse
number (positive pulses: LTP, negative pulses: LTD). They observe that while for the
initial pulses LTP and LTD look quite linear, as the pulse number goes up, anomalous
Hall resistance saturates (LTP and LTD become non-linear). Shuai Zhang et al. have
70 4 The Ferromagnetic Domain-Wall Synapse Device
Fig. 4.4 a, b Experimentally obtained change in anomalous Hall resistance (. Rx y ) of the domain-
wall device as a function of “write” current pulse number under identical positive current pulses (in
red) for LTP (in red), and identical negative current pulses (in black) for LTD (in black), as reported
by Yadav et al. (2023a). c Cycle-to-cycle variation in LTP and LTD for the same device. (Reprinted
with permission from: Yadav RS, Gupta P, Holla A, Ali Khan KI, Muduli PK, Bhowmik D (2023)
Demonstration of synaptic behaviour in a heavy-metal-ferromagnetic-metal-oxide-heterostructure-
based spintronic device for on-chip learning in crossbar-array-based neural networks. ACS Appl
Electr Mat 5(1):484–497. American Chemical Society (ACS), Copyright 2023 American Chemical
Society Yadav et al. 2023a)
−0.2843 (Yadav et al. 2023a). Subsequently, using the table that maps between
this fitting constant and the non-linearity coefficient provided in the manual for
NeuroSim simulator (Luo et al. 2019), they obtain the non-linearity factor for LTP
(.α P ) to be 3.875 and that for LTD (.α D ) to be .−3.84. The corresponding asymmetry
.= |α P − α D | = 7.715.
When compared to other NVM synapse devices (as listed in Table 4.1), the non-
linearity and asymmetry factors obtained for the domain-wall device are not much
higher but not very low at the same time. For example, in electrochemical RAM
(ECRAM) device, non-linearity factors are as low as 0.01 (.α P ) and .−0.34 (.α D ).
In the following sub-sections, we first explain the cause of significant non-linearity
and asymmetry in LTP and LTD of domain-wall devices, which was not predicted
72 4 The Ferromagnetic Domain-Wall Synapse Device
Table 4.1 Summary of LTP and LTD characteristics for various NVM synaptic technologies, based
on recent experimental reports (Yadav et al. 2023a; Sahu et al. 2023; Lee et al. 2022; Goh et al.
2021)
NVM synapse Synaptic bit resolution Non-linearity of LTP Asymmetry
technology (.α P ) (.|α P − α D |)
RRAM (HfO.2 based) .≈5 4.88 8.58
Electrochemical RAM .≈7 0.01 0.35
Ferroelectric junction .≈5 6.76 14.14
(HZO based)
Domain-wall device .≈5 3.875 7.715
Fig. 4.5 a Magnetization configuration images “just after” programming pulse.n is applied for LTP
and “before” the next pulse (.n + 1) pulse is applied for LTP (the time gap between the two is the
delay time between pulses: 100 ns). Here, .n = 2, 3, 10, 11. The cyan colour represents vertical up
magnetic moments, i.e.,.m z = 1, and red represents vertically down state.m z = −1. b Magnetization
configuration images “just after” programming pulse .n is applied for LTD and “before” the next
pulse (.n + 1) pulse is applied for LTD (the time gap between the two is the delay time: 100 ns).
Here,.n = 22, 23, 30, 31. (Reprinted with permission from: Yadav RS, Sadashiva A, Holla A, Muduli
PK, Bhowmik D (2023) Impact of edge defects on the synaptic characteristic of a ferromagnetic
domain-wall device and on on-chip learning. Neur Comput Eng 3(3) Yadav et al. 2023b)
to increase in conductance of the “read” path, as per the configuration of the MTJ
shown in Fig. 4.1). The domain wall moving left to right (due to “write” current pulses
of opposite polarity) leads to LTD here (magnetic moments gradually switch from
vertically down to vertically up, leading to decrease in conductance of the “read”
path, as per the configuration of the MTJ shown in Fig. 4.1).
74 4 The Ferromagnetic Domain-Wall Synapse Device
As observed from the magnetization configuration images of Fig. 4.5, the domain
wall moves here at the velocity of 25 m/s during each pulse. Since each pulse is of 1
ns duration, this means the domain wall moves by 25 nm during a pulse, left or right
depending upon the current polarity (between “before” .nth pulse and “just after”
.n + 1th pulse, .n = 2, 3, 10, 11 here). But Fig. 4.5 also shows that during the delay of
100 ns between one pulse and the next, the domain wall may also move. During LTP,
between “just after 2nd pulse” and “before 3rd pulse” (the delay between 2nd and
3rd pulse basically), domain wall moves by 37 nm. Similarly in the delay between
3rd and 4th pulse, domain wall moves by 22 nm; between 10th and 11th pulse, it
moves by 2 nm; and between 11th and 12th pulse, it moves by 3 nm.
Thus, as per the report by Yadav et al. (2023b), it is observed that for LTP, the
domain wall moves much more during the delay times between the initial pulses
compared to that between the later pulses. The physical phenomenon responsible for
this is described next (Yadav et al. 2023b). During the initial pulses, the domain wall
is located towards the right end of the device; during the delay time between pulses,
when SOT is non-existent, the domain wall still wants to move right towards the centre
of the device to minimize the energy due to dipole-dipole interaction (magnetostatic
energy). Dipole-dipole interaction energy is minimum when the domain wall is at
the middle, with half of the magnetic layer polarized up and half polarized down, as
Fig. 4.6 LTP and LTD of the domain-wall device corresponding to the micromagnetic-simulation-
based snapshots of domain-wall motion in Fig. 4.5. 100 ns delay is applied between two consecutive
LTP pulses or consecutive LTD pulses. Average out-of-plane (OOP) magnetization (.m z ) at the end
of the delay is plotted as a function of pulse number. Thus, .m z here includes domain-wall motion
both during the pulse and during the delay. Hence, the LTP and LTD curves are non-linear and
asymmetric as explained in text. b For non-linearity and asymmetry quantification, .m z in (a) is first
converted to conductance (through TMR effect) and then normalized (minimum conductance .=
0, maximum conductance .= 1). Then, by fitting curves based on the equations provided with the
NeuroSim simulator (Luo et al. 2019), the following numbers are obtained: non-linearity factor of
LTP .α p .= 2.47, non-linearity factor of LTD .αd = −2.45, and asymmetry .= .|α P − α D | = 4.92.
(Reprinted with permission from: Yadav RS, Sadashiva A, Holla A, Muduli PK, Bhowmik D (2023)
Impact of edge defects on the synaptic characteristic of a ferromagnetic domain-wall device and
on on-chip learning. Neur Comput Eng 3(3) Yadav et al. 2023b)
4.5 Improving Linearity and Symmetry of LTP and LTD 75
shown both through magneto-optic Kerr effect (MOKE) imaging experiments and
micromagnetic simulations in the report by Bhowmik et al. (2015). During the later
pulses, the domain wall is already near the centre of the device; so its tendency
to move during the delay time, when charge current and spin current are zero, is
much less. This leads to non-linearity of the LTP curve as observed in Fig. 4.6a,
again taken from the simulation-based report by Yadav et al. (red plot: LTP, black
plot: LTD) (Yadav et al. 2023b). Using the method associated with the NeuroSim
simulator (Luo et al. 2019), we obtain the following: non-linearity coefficient for
LTP .α P = 2.47, non-linearity coefficient for LTD .α D = −2.45, and thus asymmetry
coefficient (.|α P − α D |).= 4.92 (Fig. 4.6b: red plot for LTP, black plot for LTD). These
numbers are comparable to that reported experimentally by Yadav et al. (in a previous
report by the same group, already discussed above) (Yadav et al. 2023a). This means
the modified micromagnetic modelling here can indeed explain the non-linearity and
asymmetry reported experimentally in similar devices (unlike the micromagnetic
modelling in the previous sub-section).
Fig. 4.7 LTP and LTD of the domain-wall device, including material defects, corresponding to the
micromagnetic-simulation-based snapshots of domain-wall motion in Fig. 4.5. 100 ns delay is still
applied between two consecutive LTP pulses or consecutive LTD pulses. (Reprinted with permission
from: Yadav RS, Sadashiva A, Holla A, Muduli PK, Bhowmik D (2023) Impact of edge defects on
the synaptic characteristic of a ferromagnetic domain-wall device and on on-chip learning. Neur
Comput Eng 3(3) Yadav et al. 2023b)
Apart from the domain-wall synapse device, other spintronic devices have also been
proposed as NVM synapses in neuromorphic crossbar arrays. Innovations in this
regard mainly try to address two drawbacks of the domain-wall synapse device. One
drawback is that the domain wall typically has a width of 40–50 nm; so in order to
have say a 5-bit device, the domain wall needs to move in 32 LTP/LTD steps. This
means the length of the domain-wall device needs to be more than a micron. This
makes this technology difficult to scale. Another drawback of the domain-wall device
4.6 Alternative Spintronic Synapse Devices 77
Fig. 4.8 a For the device with material defects, magnetization configuration images are taken “just
after” programming pulse .n is applied for LTP and “before” the next pulse (.n + 1) pulse is applied
for LTP, with 100 ns delay existing between two consecutive LTP pulses. Here, .n = 2, 3, 10, 11.
The cyan colour represents vertical up magnetic moments, i.e.,.m z = 1, and red represents vertically
down state, i.e., .m z = −1. b Magnetization configuration images “just after” programming pulse
.n is applied for LTD and “before” the next pulse (.n + 1) pulse is applied for LTD, with 100 ns
delay existing between consecutive pulses. Here, .n = 22, 23, 30, 31. (Reprinted with permission
from: Yadav RS, Sadashiva A, Holla A, Muduli PK, Bhowmik D (2023) Impact of edge defects on
the synaptic characteristic of a ferromagnetic domain-wall device and on on-chip learning. Neur
Comput Eng 3(3) Yadav et al. 2023b)
is that, with the exception of the report by Kumar et al. (2023) mentioned above, most
ferromagnetic domain-wall devices still need significant amount of current to move
the domain wall. Typically current density of 10.6 A/cm.2 or 10.7 A/cm.2 is required
to move the domain wall, which means the energy consumed and Joule heating in
78 4 The Ferromagnetic Domain-Wall Synapse Device
the device per LTP/LTD pulse is not that low when compared to alternative synapse
devices like ferroelectric devices say, where an electric field is applied across an
insulator device (so very low current flow) to cause LTP/LTD.
The ferromagnetic/spintronic skyrmionic device, which is an alternative to the
domain-wall device, promises to overcome both these drawbacks. The skyrmion is
another topologically stable structure like the domain wall which occurs in ultra-thin
ferromagnetic layers but is much smaller in size compared to the domain wall. Hence
skyrmionic synapse devices, in which conductance changes due to the movement of
skyrmions as opposed to the domain wall, are supposed to be much smaller than the
domain-wall device. It has also been shown through both micromagnetic simulations
and experiments that skyrmions need much less current density to move compared to
the domain wall (Sampaio et al. 2013; Bhattacharya et al. 2019; Saxena et al. 2018).
Here, we briefly review a recent experimental demonstration of the skyrmionic
device. Kyung Mee Song et al. have fabricated a skyrmionic device based on a
Pt (heavy metal)/GdFeCo (ferrimagnet)/MgO multi-layer stack (Song et al. 2020).
Creation and motion of skyrmions in the device are captured through Hall resistiv-
ity measurement and scanning transmission X-ray microscopy (STXM). Upon the
application of current pulses of increasing magnitude in the order of 10.6 A/cm.2 , it
is shown through STXM imaging that skyrmions are created successively and they
move due to SOT from the current. As a result, the Hall resistivity changes as a func-
tion of pulse number for the device: LTP and LTD (Song et al. 2020). The LTP and
LTD here look quite linear and symmetric for this device, compared to experimental
reports on various domain-wall devices discussed earlier. But as just mentioned, the
LTP pulses are not identical to each other (same for LTD pulses). This will make
the design of the peripheral circuit for on-chip learning in crossbar arrays using
these synapse devices difficult. So this issue with the skyrmionic device needs to be
addressed.
In addition to the skyrmionic device, some recent reports promote the use of
the ferrimagnetic domain-wall device as opposed to the ferromagnetic domain-wall
device as an NVM synapse for neuromorphic computing (Sahu et al. 2022). Both
through micromagnetic simulations and experimental demonstrations (Bläsing et al.
2018), it has been shown that the SOT-driven velocity of the domain wall in the fer-
rimagnetic device is much higher than that in the ferromagnetic device for the same
value of current density. As a result, it has been shown that the use of ferrimagnetic
domain-wall synapse device in crossbar arrays can lead to lower energy consump-
tion and higher speed for on-chip learning, when compared to its ferromagnetic
counterpart (Sahu et al. 2022).
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Chapter 5
Design of Artificial Neural Networks
(ANN) with Domain-Wall Synapse
Devices
The equations related to inference (forward pass) and training of a fully connected
neural network (FCNN) with a hidden layer have been provided in Chap. 3. When
the FCNN is implemented on a conventional computer like a CPU or a GPU, which
is the common practice in machine-learning-and-AI-related fields. But when such
an algorithm is implemented on a neuromorphic crossbar array, constraints imposed
by the NVM synapse devices in the array need to be kept in mind. The design of
the peripheral circuit to bring about the weight updates in the synapse devices also
needs to be kept simple. As a result, modifications need to be made to the FCNN
algorithm before implementing it on the crossbar array. One such modification, as
reported by Kaushik et al. (2020), is adding thresholding functions to the equations
to limit to the synaptic-weight update to .+W , .−W or 0 per iteration, where .W is a
fixed positive number. We discuss this modification here.
With respect to the FCNN in Fig. 3.2 of Chap. 3 (also redrawn here: Fig. 5.1), the
following are the equations for weight update of the synapses at any iteration when
no thresholding is applied:
ηλ
Δvn, p =
. (Yn − yn )(1 − yn2 ))z p = Δvn z p , (5.1)
2
where .Δvn = is the common part of weight update generated at each node .n of the
output layer: (. ηλ
2
(Yn − yn )(1 − yn2 ))
λ
Δw p,m = (Σn=1
.
n=N
Δvn vn, p ) (1 − z 2p ))xm (5.2)
2
© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 81
D. Bhowmik, Spintronics-Based Neuromorphic Computing, Springer Tracts in Electrical
and Electronics Engineering, https://doi.org/10.1007/978-981-97-4445-9_5
82 5 Design of Artificial Neural Networks (ANN) …
Fig. 5.1 Schematic of a fully connected neural network (FCNN) with one hidden layer. (Reprinted
with permission from: Sahu U, Sisodia N, Sharda J, Muduli PK, Bhowmik D (2022) Ferrimag-
netic synapse devices for fast and energy-efficient on-chip learning on an analog-hardware neural
network. IEEE Trans Electron Dev 69(4):1713–1720, 0018-9383 .© 2022 IEEE (2022) Sahu et al.
2022)
In order to limit these weight updates to.+W ,.−W , or 0, the following thresholding
functions are used:
. Q 1 (X ) = θ1 ∀ X > q1 ;
Q 1 (X ) = 0 ∀ − q1 ≤ X ≤ q1 ;
Q 1 (X ) = −θ1 ∀ X < −q1
(5.3)
and
. Q 2 (Y ) = θ2 ∀ Y > q2 ;
Q 2 (Y ) = 0 ∀ − q2 ≤ Y ≤ q2 ;
Q 2 (Y ) = −θ2 ∀ Y < −q2 ,
(5.4)
where.q1 ,.q2 ,.θ1 , and.θ2 : hyper-parameters. Making use of the thresholding functions,
the equations for synaptic-weight update are now given as follows:
( )
ηλ
Δvn, p = Q 2
. (Yn − yn )(1 − yn ) Q 1 (z p ) = Q 2 (Δvn )Q 1 (z p ),
2
(5.5)
2
5.1 Thresholding-Based Modification to the Neural Network Training Algorithm 83
and
λ
Δw p,m = Q 2 ((Σn=1
.
n=N
Δvn vn, p ) (1 − z 2p ))Q 1 (xm ), (5.6)
2
where . Q 1 and . Q 2 : thresholding functions mentioned above.
Based on the equations above, at any iteration during the training process, update
of each element of the synaptic-weight matrix can take one of only three possible
values:.θ1 θ2 , or.−θ1 θ2 , or 0. We can call it:.+W ,.−W or 0. This makes implementation
on analog hardware much more easy since the multiplier associated with each synapse
device can be much simpler that way. We see this in the next section.
Since the weight update at each synapse is now limited to .+W , .−W , or 0 per iter-
ation, the weight update curves (synaptic characteristics) of the spintronic domain-
wall device reported in Chap. 4 become particularly relevant. Thereby, assuming the
synaptic characteristic of the device is linear and symmetric, identical programming
pulses for long-term potentiation (LTP) leading to domain-wall motion in one direc-
tion and fixed increase in weight (.W ) per pulse, and identical programming pulses
for long-term depression (LTD) lead to a fixed decrease in weight (.W ) per pulse.
However, as explained in Chap. 4, the LTP/LTD characteristic of a domain-wall
device (or for any NVM synapse device for that) is not perfectly linear and symmetric.
Non-linearity and asymmetry of LTP and LTD are known to reduce the classification
accuracy of the neural network, when it is implemented on the crossbar array endowed
with the on-chip learning facility that makes use of these non-ideal LTP and LTD
characteristics of the synapse device at every iteration of the training.
In Chap. 4, we have discussed a report by Yadav et al. (2023) where experi-
mentally obtained LTP and LTD of a domain-wall device have been reported, and
using curve-fitting following the method provided with the NeuroSim simulator (Luo
et al. 2019), non-linearity coefficients .α P and .α D are obtained: Fig. 4.7 of Chap. 4.
Figure 5.2 (taken from the same report by Yadav et al. 2023) shows a comparison
of classification accuracy numbers for training of FCNN with a hidden layer for the
following four cases:
Case 1: Each synaptic weight is of 32-bit precision; weight update is linear and
symmetric. This is the case when the neural network is trained on a conventional
computer (green plot in Fig. 5.2).
Case 2: Each synaptic weight is of 5-bit precision (keeping in mind that the domain-
wall device has about 30 stable and distinguishable conductance/Hall resistance
levels, as reported by Yadav et al. 2023), but the weight update (LTP/LTD) is linear
and symmetric (black plot in Fig. 5.2).
Case 3: Each synaptic weight is of 5-bit precision, and weight update is also
as per the reported LTP and LTD by Yadav et al. (2023), i.e., .α P = 3.875 and
.α D = −3.84 (red plot in Fig. 5.2). No cycle-to-cycle variation is included.
Case 4: Experimentally obtained LTP and LTD from Yadav et al. (2023), while
including cycle-to-cycle variations (blue plot in Fig. 5.2). The same LTP and LTD
experiments are repeated on the same device for 20 cycles, to obtain cycle-to-cycle
variations.
84 5 Design of Artificial Neural Networks (ANN) …
Fig. 5.2 Train (a) and test (b) accuracy numbers on the MNIST data set when an ideal 64-bit
device is used per synapse cell (light green plots), two 5-bit ideal devices (with completely linear
and symmetric LTP and LTD characteristics) are used per synapse cell in the VMM operation of
the designed FCNN/MLP of Fig. 5.1 (black plots), and when two 5-bit spintronic devices with
experimentally obtained LTP and LTD characteristics (reported by Yadav et al. 2023) are used per
synapse cell (red plots: without cycle-to-cycle variation, blue plots: after including cycle-to-cycle
variation of Fig. 5.1c). Other than the ideal-64-bit synapse case, for all the other three cases, the
thresholding-based algorithm discussed in the text is used. (Reprinted with permission from: Yadav
RS, Gupta P, Holla A, Ali Khan KI, Muduli PK, Bhowmik D (2023) Demonstration of synaptic
behavior in a heavy-metal-ferromagnetic-metal-oxide-heterostructure-based spintronic device for
on-chip learning in crossbar-array-based neural networks. ACS Appl Electr Mater 5(1):484–497,
Copyright 2023 American Chemical Society (ACS) Yadav et al. 2023)
MNIST data set of handwritten digits has been used for the purpose. We observe
that compared to Case 1 (ideal case), the drop in classification accuracy is very low for
Case 2, which means limiting the bit resolution of the synaptic weight doesn’t affect
the accuracy much if linearity and asymmetry are not affected. However, when the
linearity and asymmetry are affected, accuracy does drop significantly irrespective
of cycle-to-cycle variations, as evident from the plots for Case 3 and Case 4. This
makes the incorporation of grooves or notches or material defects in the domain-wall
device to pin the domain wall and improve the device’s non-linearity and asymmetry
of LTP and LTD (as discussed in Chap. 3) all the more important.
feed the necessary programming current pulse to the domain-wall device to cause
weight update by a bit (.+W , .−W , 0). The two transistors and the domain-wall device
together form a synapse cell, as shown in Fig. 5.4. At each intersection point of the
horizontal and vertical bars in the crossbar array, there needs to be a synapse cell. More
details on the design and working principle of the synapse cell are presented below.
The multiplier unit in this designed synapse cell, as reported by Kaushik et al.
(2020), contains two transistors: one NMOS (T1) and the other PMOS (T2). When
. Q 1 (z p ) > 0 is applied to the circuit, T1 turns on, and T2 turns off. As a result, the volt-
age that injects the programming/“write” current into the domain-wall synapse device
is given by: .V1 = Q 2 (Δvn ). Since this voltage is positive and quantized/thresholded,
it means quantized/thresholded “write” current of positive polarity will flow through
the heavy metal layer of the synapse device (current into the device). This results in
a positive weight update (also called long-term potentiation or LTP) in the synapse.
When . Q 1 (z p ) < 0 instead, T1 turns off, and T2 turns on. Hence, the voltage that
drives the “write” current into the synapse device is: .V1 = −Q 2 (Δvn ). So quan-
tized/thresholded “write” current of negative polarity flows through the heavy metal
layer of the domain-wall device (current flows out of the device), leading to negative
weight update (also called long-term depression or LTD) in the synapse device. And
when . Q 1 (z p ) = 0, both the transistors (T1 and T2) are turned off, and .V1 is 0, which
means no “write” current will flow; thus, there is no weight update.
The above description can be summarized as follows:
⎧
⎪
⎨ Q 1 (z p ) > 0: T1 turns on, T2 off, V1 = Q 2 (Δvn ), LTP.
. Q 1 (z p ) = 0: T1 and T2 off, V1 = 0; no weight update.
⎪
⎩
Q 1 (z p ) < 0: T1 turns off, T2 on, V1 = −Q 2 (Δvn ), LTD.
LTP/LTDat each synapse of the second layer of the FCNN is given by Eq. 5.5.
Based on the above three scenarios (when. Q 1 (z p ) can be positive or negative or zero),
there are nine possible cases for weight update (LTP/LTD), three corresponding to
each scenario (where . Q 2 (.Δvn ) can be positive or negative or zero).
⎧ Hence, .Δvn, p now only takes the value .±θ1 θ2 (.= ±ΔW ). .Δ .wn,m =
⎪
⎪ Case 1 : ΔW, Q 1 (z p ) > 0 & Q 2 (Δvn ) > 0
⎪
⎪
⎪
⎪ Case 2 : 0, Q 1 (z p ) = 0 & Q 2 (Δvn ) > 0
⎪
⎪
⎪
⎪ Case 3 : − ΔW, Q 1 (z p ) < 0 & Q 2 (Δvn ) > 0
⎪
⎪
⎨ Case 4 : 0, Q 1 (z p ) > 0 & Q 2 (Δvn ) = 0
. Case 5 : 0, Q 1 (z p ) = 0 & Q 2 (Δvn ) = 0
⎪
⎪
⎪
⎪ Case 6 : 0, Q 1 (z p ) < 0 & Q 2 (Δvn ) = 0
⎪
⎪
⎪
⎪ Case 7 : − ΔW, Q 1 (z p ) > 0 & Q 2 (Δvn ) < 0
⎪
⎪
⎪
⎪ Case 8 : 0, Q 1 (z p ) = 0 & Q 2 (Δvn ) < 0
⎩
Case 9 : ΔW, Q 1 (z p ) < 0 & Q 2 (Δvn ) < 0
SPICE simulation of the synapse cell including a domain-wall synapse device and
two transistors at 65 nm technology node (Fig. 5.4) has been reported by Kaushik et al.
(2020). The linear and symmetric conductance response of the domain-wall synapse
device, obtained through micromagnetic simulation without allowing for delay
between pulses (no stray domain-wall motion hence) and shown in Fig. 5.3 (very
similar to Fig. 4.3 of Chap. 4), has been used for the purpose for the sake of simplicity.
86 5 Design of Artificial Neural Networks (ANN) …
Fig. 5.3 a Schematic of the domain-wall synapse device b Conductance response of “read” path
versus in-plane “write” current pulse of the domain-wall synapse device, which is its LTP/LTD
characteristic. Conductance increases or decreases in fixed steps (.ΔG) due to the application of
fixed-magnitude current pulses of opposite polarities. Delay between pulses is ignored here; so
there’s no stray domain-wall motion between pulses and the LTP and LTD characteristics are linear
and symmetric. (Reprinted with permission from: Kaushik D, Sharda J, Bhowmik D (2020) Synapse
cell optimization and back-propagation algorithm implementation in a domain-wall-synapse-based
crossbar neural network for scalable on-chip learning. Nanotechnology 31(36) Kaushik et al. 2020)
A Verilog A module with three terminals and the conductance between two terminals
(“read” path) being controlled by “write” current through the third terminal, based on
the exact same synaptic characteristic as shown in Fig. 5.3, is inserted in the SPICE
simulation of the synapse cell.
For Cases 1 and 9 above, .V1 is positive based on the operation of T1 and T2 as
discussed above. Positive .V1 drives “write” current of magnitude 100 .µA and of
positive polarity (from left to right) in the domain-wall synapse (Fig. 5.4). Hence,
conductance increases by .ΔG (Fig. 5.5) and weight increases by .ΔW , as observed
from SPICE simulations of the synapse cell. Case 1 has been identified in the figure.
Positive values of . Q 1 (z p ) and . Q 2 (Δvn ) lead to positive “write” current and positive
conductance update (LTP), as expected.
Similarly, for Cases 3 and 7, .V1 is negative based on the operation of T1 and T2
as discussed above. Negative .V1 drives “write” current of magnitude 100 .µA and
of negative polarity in the domain-wall synapse (Fig. 5.4). As evident from SPICE
5.2 Design of the Synapse Cell 87
Fig. 5.4 Schematic of optimized synapse cell including a two-transistor-based multiplier which
multiplies two bits as sown and a domain-wall-based synaptic device into which the transistors feed
“write” current for conductance/weight update. (Reprinted with permission from: Kaushik D,
Sharda J, Bhowmik D (2020) Synapse cell optimization and back-propagation algorithm imple-
mentation in a domain-wall-synapse-based crossbar neural network for scalable on-chip learning.
Nanotechnology 31(36) Kaushik et al. 2020)
Fig. 5.5 SPICE simulation of the synapse cell in Fig. 5.4 is carried out here. Inputs to the cell
. Q 1 (z p )
and . Q 2 (Δvn ) are plotted as a function of time. “Write” current flowing into the domain-
wall synapse device in the cell and the corresponding change in conductance in its “read” path are
also plotted as functions of time. (Reprinted with permission from: Kaushik D, Sharda J, Bhowmik
D (2020) Synapse cell optimization and back-propagation algorithm implementation in a domain-
wall-synapse-based crossbar neural network for scalable on-chip learning. Nanotechnology 31(36)
Kaushik et al. 2020)
88 5 Design of Artificial Neural Networks (ANN) …
simulations in Fig. 5.5 (Case 7 has been identified), this leads to conductance decrease
by .ΔG and hence weight decrease by .ΔW (LTD), as expected.
For Cases 2, 4, 5, 6, and 8, .V1 = 0. Hence, no current flows through the domain-
wall synapse and its conductance/weight is not updated, as also seen from SPICE
simulations in Fig. 5.5 (Cases 4 and 5 have been identified).
Having shown the design of each single synapse cell in the crossbar array, we now
focus our attention on the system-level design of crossbar arrays such that equations
for the thresholded version of the back-propagation algorithm (Eqs. 5.5 and 5.6) can
be implemented to carry out appropriate weight updates for all the domain-wall
synapse devices in the crossbar array. While carrying the design, which has been
reported by Kaushik et al. (2020), one needs to keep in mind that we would like to
update the weights of all the synapses in a crossbar array simultaneously/at once to
get the maximum benefit from the neuromorphic system.
For the FCNN with a single hidden layer of Fig. 5.1, the corresponding imple-
mentation through crossbar arrays (including implementation of weight update/back-
propagation for on-chip learning) involves three crossbar arrays and is shown in
Fig. 5.6. The equations for forward computation are provided in Chap. 3 and are
repeated here, to link them with their crossbar-array implementation.
The equations for forward computation at the first stage of the FCNN of Fig. 5.1 are
2
z p = f (z¯p ) = −1
1 + (e−λz¯p )
(5.7)
This VMM operation is carried out in crossbar II, with outputs of crossbar I (.z 1 ,
z …….z P ) being feds as inputs to crossbar II for the second VMM operation. LTP and
. 2
LTD of the synapses in crossbar II, after thresholding, are given by Eq. 5.5 mentioned
above. To implement this, the common part of weight update is calculated and thresh-
olded at the output nodes of crossbar II: . Q 2 ( ηλ
2
(Yn − yn )(1 − yn2 )), or . Q 2 (Δvn ).
For thresholding, a dedicated amplifier-based circuit (more details in Kaushik
et al. 2020) can be implemented at each output node, and also at each input node
to threshold the input (Kaushik et al. 2020). The advantage of this scheme is that
such thresholding circuit needs to be present only at each input node and each output
node as per this design, and not at every synapse cell. This makes the total number
of thresholding circuits required equal to the sum of the number of input nodes and
that of output nodes, as opposed to the product of the number of input nodes and that
of output nodes. Thus, this design doesn’t require the implementation of too many
thresholding circuits.
To carry out the multiplication in Eq. 5.5, . Q 2 ( ηλ
2
(Yn − yn )(1 − yn2 )), or . Q 2 (Δvn ),
is applied at the other set of vertical bars going into the synapse cells (not the ones
through which currents flow corresponding to forward computation. VMM), as
shown in Fig. 5.6. As also shown in Fig. 5.6, . Q 1 (z p ) is applied at each horizontal
90 5 Design of Artificial Neural Networks (ANN) …
synapses, and both weight values are updated simultaneously after every iteration.
At a synapse in crossbar III, connecting output node . p with input node .n, current
through the “read” path of the domain-wall synapse is equal to the product of input
.Δvn and weight .vn, p (Ohm’s Law). Currents for all the synapses connecting node . p
with all the input nodes (from .n = 1 to . N ) add up following Kirchoff’s Current Law
(KCL) (shown by.Σ in Fig. 5.6), similar to the forward VMM computation in crossbar
I and II. Thus, at each node . p, sum of “read” currents is equal to .Σn=1 n=N
Δvn vn, p .
That current is then sent back to crossbar I, as shown in Fig. 5.6. Then multiplication
between the thresholded version of.Σn=1 n=N
Δvn vn, p and thresholded input to crossbar I
. x m takes place in each synapse cell of crossbar I, just like in the case of multiplications
in synapse cells of crossbar II as described earlier. Thus, Eq. 5.6 can be implemented
in hardware, and LTP/LTD of the synaptic weights of crossbar array I can be carried
out in parallel. SPICE simulations of this entire three-crossbar system (Fig. 5.6),
implementing on-chip learning of the FCNN with one hidden layer of Fig. 5.1 and
resulting in high classification accuracy for the Fisher’s Iris data set of flowers, have
been reported by Kaushik et al. (2020).
To conclude, it is to be noted that all the design choices discussed in this chapter
(thresholding algorithm, synapse cell design, and crossbar array design) should be
applicable not only to the domain-wall non-volatile memory (NVM) synapse device
but also to any three-terminal synapse device, where the “read” conductance between
two terminals is modulated by “write” current flowing from the third terminal. To
keep the circuit design simple, we have used identical pulses for positive weight
update (LTP) and identical pulses for negative weight update (LTD). So, as long
as this can be achieved in any three-terminal NVM device with decently linear and
symmetric LTP and LTD characteristics, the design and analysis shown here will be
applicable to that device.
References 91
References
Kaushik D, Sharda J, Bhowmik D (2020) Synapse cell optimization and back-propagation algorithm
implementation in a domain wall synapse based crossbar Neural Network for scalable on-chip
learning. Nanotechnology 31(36)
Luo Y, Peng X, Yu S (2019) MLP+NeuroSimV3.0. In: Proceedings of the international conference
on neuromorphic systems (ACM)
Sahu U, Sisodia N, Sharda J, Muduli PK, Bhowmik D (2022) Ferrimagnetic synapse devices for
fast and energy-efficient on-chip learning on an analog-hardware neural network. IEEE Trans
Electron Dev 69(4):1713–1720
Yadav RS, Gupta P, Holla A, Ali Khan KI, Muduli PK, Bhowmik D (2023) Demonstration of
synaptic behavior in a heavy-metal-ferromagnetic-metal-oxide-heterostructure-based spintronic
device for on-chip learning in crossbar-array-based neural networks. ACS Appl Electr Mater
5(1):484–497. American Chemical Society (ACS)
Chapter 6
Design of Spiking Neural Networks
(SNN) with Domain-Wall Devices
For a wide range of current density flowing through the domain-wall device,
both micromagnetic simulations and actual experiments show that the domain-wall
velocity is proportional to the current density (Sahu et al. 2019; Martinez et al.
2014; Emori et al. 2014). Hence magnitude of the “write”/programming current
pulse (. Iwrite ) needed to bring about a certain change in conductance (.ΔG) is given
as follows:
∂ Iwrite
. Iwrite = ΔG, (6.2)
∂G
where. ∂ I∂G
write
is the slope of a straight line that fits the conductance versus write current
characteristic of the domain-wall device, which can be either obtained experimentally
or through micromagnetic simulations.
As discussed in Chap. 3 and shown in Fig. 6.1 taken from the same chapter, in an
SNN, a neuron of the input layer (pre-neuron) is connected to a neuron of the output
© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 93
D. Bhowmik, Spintronics-Based Neuromorphic Computing, Springer Tracts in Electrical
and Electronics Engineering, https://doi.org/10.1007/978-981-97-4445-9_6
94 6 Design of Spiking Neural Networks (SNN) with Domain-Wall Devices
where.Δw is the change in weight of the synapse,.t pr e is the time when the pre-neuron
spikes, .t post is the time when the post-neuron spikes, .Δt is the difference between
.t post and .t pr e , .Γ is a constant of proportionality, and .τ is the STDP time constant for
the synapse.
Thus, as per this STDP rule, when the pre-neuron spikes before the post-neuron
does, the weight of the synapse goes up (synapse gets strengthened, or potentiation).
When the pre-neuron spikes after the post-neuron, the synaptic weight goes down
(depression). The magnitude of the weight change is inversely proportional to the
timing difference between the two spikes. Hence, this is essentially a positive feed-
back mechanism because the pre-neuron spiking promotes the post-neuron to spike
as long as the weight is positive, and if the post-neuron spikes after the pre-neuron,
the weight goes up further so that, next time, the post-neuron spikes immediately
after the pre-neuron.
In order to enable the non-volatile domain-wall synapse device with STDP prop-
erty, as per Eqs. 6.1, 6.2, and 6.3, for a given spike at the pre-neuron and another
spike at the post-neuron, “write”/programming current needs to be applied on the
device as follows in order to update the weight and train the SNN:
t post −t pr e
Iwrite = I0 e−( τ )
i f t post > t pr e
. t −t , (6.4)
−( pr e τ post )
Iwrite = −I0 e i f t post < t pr e
Fig. 6.2 Domain-wall (DW) device along with transistor-based circuit which together emulates
the STDP property of the synapse. (Reprinted with permission from: Sahu U, Pandey A, Goyal
K, Bhowmik D (2019) Spike-time-dependent plasticity (STDP)-enabled learning in spiking neural
networks using domain-wall-based synapses and neurons. AIP Adv 9(12) Sahu et al. 2019)
. Iwrite in Eq. 6.4 can be considered a sum of two components: . Iwrite = Iwrite,1 +
Iwrite,2 , where:
t post −t pr e
−( )
I f t post > t pr e , Iwrite,1 = I0 e τ1
; Iwrite,2 = 0
. t pr e −t post (6.5)
−( )
I f t post < t pr e , Iwrite,1 = 0; Iwrite,2 = −I0 e τ2
In the circuit of Fig. 6.2, drain current through transistor T4 corresponds to. Iwrite,1 ,
and drain current through T8 corresponds to . Iwrite,2 . Based on SPICE simulations
of the circuit in Fig. 6.2 as reported by Sahu et al. (2019) (similar circuit design
has also been reported by Sengupta et al. (2016, 2017), . Iwrite,1 , and . Iwrite,2 are
plotted as functions of time for spiking pattern 1 (Fig. 6.3) and spiking pattern 2
(Fig. 6.4).
For spiking pattern 1, pre-neuron spikes once (.t pr e ) followed by several post-
neuron spikes (.t post ) (Fig. 6.3a, b). Hence, .t post > t pr e here. The dominant current
that flows through the domain-wall device is . Iwrite,1 in this case, which is generated
by transistor T3 of the circuit in Fig. 6.2. T3 operates in the sub-threshold regime,
and so the current flowing through it is an exponential function of gate voltage. Since
the capacitor C1 starts charging as soon as the pre-neuron spikes at .t pr e (Fig. 6.3c),
96 6 Design of Spiking Neural Networks (SNN) with Domain-Wall Devices
Fig. 6.3 Voltage and current of different components of the circuit in Fig. 6.2 for spiking pattern
1: a Gate voltage of T2 versus time showing spiking pattern of pre-neuron b Gate voltage of T4
showing spiking pattern of post-neuron c Gate voltage of T3 and T7 d Drain current through T4
(. Iwrite,1 ) and T8 (. Iwrite,2 ). (Reprinted with permission from: Sahu U, Pandey A, Goyal K, Bhowmik
D (2019) Spike-time-dependent plasticity (STDP)-enabled learning in spiking neural networks using
domain-wall-based synapses and neurons. AIP Adv 9(12) Sahu et al. 2019)
voltage across the capacitor C1 and hence the gate voltage of transistor T3 exponen-
tially decays with time starting from .t pr e (Fig. 6.3d). This leads to implementation of
the component of the STDP rule in Eqs. 6.3 and 6.4 corresponding to the post-neuron
spiking after the pre-neuron (positive weight update or potentiation).
Similarly, for spiking pattern 2, post-neuron spikes once (Fig. 6.4b) and pre-neuron
spikes several times after that (Fig. 6.4a). Hence,.t post < t pr e here. In this case, capac-
itor C2 discharges with time starting from .t post , gate voltage of T7 hence changes
linearly with time, and since T7 operates in the sub-threshold regime, magnitude
of the current flowing through T7 which dominates the “write” current flowing into
the domain-wall device (. Iwrite,2 ) drops exponentially with time starting from .t post .
This leads to implementation of the component of the STDP rule in Eqs. 6.3 and
6.4 corresponding to the pre-neuron spiking after the post-neuron (negative weight
update or depression).
6.2 Design and Working of the Domain-Wall-Device-Based LIF Neuron 97
Fig. 6.4 Voltage and current of different components of the circuit in Fig. 6.2 for spiking pattern
2: a Gate voltage of T8 versus time showing spiking pattern of pre-neuron b Gate voltage of T6
showing spiking pattern of post-neuron c Gate voltage of T3 and T7 d Drain current through T4
(. Iwrite,1 ) and T8 (. Iwrite,2 ). (Reprinted with permission from: Sahu U, Pandey A, Goyal K, Bhowmik
D (2019) Spike-time-dependent plasticity (STDP)-enabled learning in spiking neural networks using
domain-wall-based synapses and neurons. AIP Adv 9(12) Sahu et al. 2019)
The Leaky Integrate Fire (LIF) property of a neuron in an SNN has been introduced
briefly in Chap. 3 (Dayan and Abbott 2005). We provide the basic equation again
here, and then discuss how the domain-wall device discussed in earlier chapters can
have that functionality. In the LIF model of neuron (Dayan and Abbott 2005; Diehl
and Cook 2015), as discussed in Chap. 3, the neuron’s membrane potential .v(t) is
governed by the following equation:
∂v(t)
.C = −G L (v(t) − E L ) + I (t), (6.6)
∂t
where . I (t): input current to the neuron, .G L : membrane conductance, and . E L : resting
potential of neuron. Once .v(t) reaches the threshold potential (.Vth ), the neuron
generates a spike and .v(t) drops to . E L .
98 6 Design of Spiking Neural Networks (SNN) with Domain-Wall Devices
Fig. 6.5 The design of the domain-wall (DW) device, in association with a transistor-based circuit,
which together act as a LIF neuron. (Reprinted with permission from: Sahu U, Pandey A, Goyal
K, Bhowmik D (2019) Spike-time-dependent plasticity (STDP)-enabled learning in spiking neural
networks using domain-wall-based synapses and neurons. AIP Adv 9(12) Sahu et al. 2019)
Fig. 6.6 Time gap between consecutive spikes as a function of the input current into the neuron,
as obtained by solving the equation for the LIF model of the neuron as well by numerically solving
micromagnetics-based domain-wall (DW) dynamics and SPICE-based circuit dynamics of the neu-
ron. (Reprinted with permission from: Sahu U, Pandey A, Goyal K, Bhowmik D (2019) Spike-time-
dependent plasticity (STDP)-enabled learning in spiking neural networks using domain-wall-based
synapses and neurons. AIP Adv 9(12) Sahu et al. 2019)
In Fig. 6.6, the time gap between two consecutive spikes generated by the neuron
is plotted as a function of input dc current to the neuron after solving Eq. 6.6 for a
set of LIF parameter values as reported by Sahu et al. (2019).
The DW neuron, integrated with a transistor-based circuit that we design in
Fig. 6.5, satisfies the desired LIF characteristic described in Fig. 6.6. The working
principle of the neuron unit is as follows: “write” current moves the domain wall from
one end of the device to another, much like in the domain-wall synapse device. How-
ever, the magnetic tunnel junction (MTJ) is located only at the other end of the device
here, unlike over the entire device as in the case with the domain-wall synapse device.
In this case, when the domain wall reaches the other end of the device, tunnelling
6.3 Performance of SNN with Domain-Wall-Device-Based Neurons and Synapses 99
where .Vth is the threshold voltage needed for spiking, .tspike is the time when the
neuron spikes, and .τhomeo is the homoeostasis constant. Because of this homoeostasis
property, when each neuron spikes, its threshold voltage for spiking goes up by a
certain magnitude and then gradually decays. This ensures that if a neuron spikes,
its probability of spiking again is low, and thus the various LIF neurons at the output
layer share the different input images of various categories among them (Sahu et al.
2019; Diehl and Cook 2015).
On the other hand, in the partially supervised mode, particular neurons are made
to fire and the remaining neurons are made not to fire (by applying inhibitory currents
on them) at the time of training based on the labels of the training inputs. Thus, some
amount of supervision is carried out during training (while STDP still contributes
to some amount of lack of supervision), leading to the name: partially supervised
learning.
For the Fisher’s Iris data set of flowers (Sahu et al. 2019), classification accuracy
numbers on the training set of 150 samples (train accuracy) and test set of 50 sam-
ples, as reported by Sahu et al. (2019), are plotted as a function of training epoch
number in Fig. 6.7. Both completely unsupervised and partially supervised modes
are considered.
However, the accuracy numbers are much lower for an SNN of the same design if
more involved data sets like MNIST data set of handwritten digits are considered. For
example, since the Fisher’s Iris data set contains data for three categories of flowers,
only three output neurons are considered in the SNN corresponding to the results in
Fig. 6.7. MNIST data set has images of ten digits. However, if only ten output neurons
are used for the SNN corresponding to MNIST, the obtained accuracy will be as low
as 10.% (same as random guess). This is because this kind of STDP-enabled SNN
trains through the process of synaptic weights learning impressions of the digits. For
MNIST, since there are many variations in the images corresponding to the same
digit (since different people have different handwriting), these different variations
get superposed on the weights connecting the different input neurons to the single
Fig. 6.7 Training and test accuracy for the designed SNN, consisting of domain-wall-device-based
neurons and synapses, for classification using the Fisher’s Iris data set of flowers. (Reprinted with
permission from: Sahu U, Pandey A, Goyal K, Bhowmik D (2019) Spike-time-dependent plastic-
ity (STDP)-enabled learning in spiking neural networks using domain-wall-based synapses and
neurons. AIP Adv 9(12) Sahu et al. 2019)
6.3 Performance of SNN with Domain-Wall-Device-Based Neurons and Synapses 101
Fig. 6.8 SNN with 10 output neurons, 1 neuron per digit: a After the 1st epoch of partially super-
vised learning on the MNIST data set, weights of all the synapses connecting the 784 pre-neurons
to a post-neuron are plotted as a 28.×28 pixel greyscale image. Intensity of each pixel is propor-
tional to the value of each weight. b Same plot of synaptic weights after the 25th epoch of partially
supervised learning
output neuron for the digit, resulting in the formation of blobs, as shown in Fig. 6.8.
This blob formation automatically makes classification by the SNN inaccurate.
To prevent this from happening, in a follow-up report (Sahu et al. 2021), Upasana
Sahu et al. have considered 400 neurons in the output layer of the SNN that is trained
102 6 Design of Spiking Neural Networks (SNN) with Domain-Wall Devices
Fig. 6.9 SNN with 400 output neurons, 40 neurons per digit: a After the 1st epoch of completely
unsupervised learning on the MNIST data set, weights of all the synapses connecting the 784 pre-
neurons to a post-neuron are plotted as a 28.×28 pixel greyscale image. Intensity of each pixel is
proportional to the value of each weight. Images corresponding to all such 400 post-neurons are then
plotted together. b Same plot of synaptic weights after the 5th epoch of completely unsupervised
learning
on the MNIST data set. Forty neurons are assigned per digit, as a result. Both in
the partially supervised and completely unsupervised modes, each output neuron
is endowed with the homoeostasis property (as explained before) so that different
neurons can take care of different variations of the same digit. The synaptic weights
are shown as 28 .× 28-pixel images in Fig. 6.9 for completely unsupervised mode
and Fig. 6.10 for partially supervised mode. It can be observed that the kind of blob
formation that happens in the case of one output neuron per digit doesn’t happen
anymore now; weights corresponding to different neurons for the same digit capture
6.3 Performance of SNN with Domain-Wall-Device-Based Neurons and Synapses 103
Fig. 6.10 SNN with 400 output neurons, 40 neurons per digit: a After the 1st epoch of partially
supervised learning on the MNIST data set, weights of all the synapses in the SNN are plotted as
a greyscale image b Plot of synaptic weights after the 2nd epoch of partially supervised learning.
(Reprinted with permission from: Sahu U, Goyal K, Bhowmik D (2021) Training of a Spiking Neural
Network on spintronics-based analog hardware for handwritten digit recognition. In: Proceedings
of international conference on emerging electronics (ICEE). 978-1-7281-8660-3/20/$31.00 .©2020
IEEE Sahu et al. 2021)
Fig. 6.11 SNN with 400 output neurons, 40 neurons per digit: Classification accuracy as a function
of epoch number for 1000 train images and 100 test images from the MNIST data set, corresponding
to the completely unsupervised learning mode
Fig. 6.12 SNN with 400 output neurons, 40 neurons per digit: Classification accuracy as a function
of epoch number for 1000 train images and 100 test images from the MNIST data set, corresponding
to the partially supervised learning mode. (Reprinted with permission from: Sahu U, Goyal K,
Bhowmik D (2021) Training of a Spiking Neural Network on spintronics-based analog hardware
for handwritten digit recognition. In: Proceedings of the International Conference on Emerging
Electronics (ICEE), 978-1-7281-8660-3/20/ $31.00 .©2020 IEEE Sahu et al. 2021)
training through STDP (no global error is being minimized here). Related to that,
another factor that creates a major issue for STDP-enabled SNNs is that it’s diffi-
cult to implement hidden layers in the design, again because there’s no concept of
minimization of global error here. On the contrary, ANNs largely leverage from the
hidden layers present in them to achieve high classification accuracy even for data
sets much more complex than MNIST (CIFAR-10, CIFAR-100, etc.).
Multiple approaches have been pursued to overcome this difficulty with SNNs,
with one aspect in common: moving away from STDP. Though STDP is biologically
motivated (experimental evidence of STDP has been found in rat’s hippocampus
Bi and Poo 1998), achieving high classification accuracy is of higher priority than
biological feasibility when it comes to implementations of SNN on neuromorphic
References 105
hardware. Such non-STDP approaches are briefly discussed at the end of Chap. 3;
the interested reader is recommended to go through the references mentioned there
to know more about these non-STDP approaches.
References
© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2024 107
D. Bhowmik, Spintronics-Based Neuromorphic Computing, Springer Tracts in Electrical
and Electronics Engineering, https://doi.org/10.1007/978-981-97-4445-9_7
108 7 Spintronic Oscillators, Their Synchronization Properties …
Fig. 7.1 Schematic of spin Hall nano-oscillator (SHNO) in the nano-pillar geometry: In a heavy-
metal/ferromagnet-based hetero-structure, in-plane current flowing through the heavy-metal layer
can induce auto-oscillation in the ferromagnetic layer. Magnetic moments of the ferromagnetic layer
precess around the vertical axis, along which the external DC magnetic field (. Happ ) is applied.
(Reprinted with permission from: Singh U, Garg N, Kumar S, Muduli PK, Bhowmik D (2021)
Learning of classification tasks with an array of uniform-mode spin Hall nano-oscillators. AIP Adv
11(4) Singh et al. 2021)
to the torque term in the LLGS equation. However, while dealing with SHNOs in
the nano-constriction geometry, LLGS equations in the micromagnetic framework
need to be used (discussed later here).
Using the macro-spin/single-domain model of the SHNO in the nano-pillar geom-
etry corresponding to Fig. 7.1, all the magnetic moments of the ferromagnetic layer in
the SHNO can be modelled by one giant macro-spin vector .m → (Arrott 2005). In-plane
current, flowing through the heavy-metal layer underneath the ferromagnetic layer,
leads to accumulation of electrons with spin polarization (.m→p ) directed in-plane,
orthogonal to current direction, at the heavy metal-ferromagnet interface due to spin
Hall effect (as discussed in detail in Chap. 2). The dynamics of the macro-spin vector
.m→ over time .t, under the effect of .m→p , is given by the Landau–Lifschitz–Gilbert–
Slonczweski (LLGS) equation is given as follows (discussed in Chap. 2):
→
dm γ α
. =− → × H→e f f ) − γ τ→SL − γ
(m (m → × H→e f f ),
→ ×m (7.1)
dt 1 + α2 1 + α2
where .γ: gyromagnetic ratio, .α: Gilbert Damping parameter, .τ→SL : Slonczweski spin
torque term, . H→e f f = − ∂∂ mE→ , and E is the energy density given by
Msat (Hk − μ0 M) 2
. E = −Msat Happl cos θ − cos θ (7.2)
2
Here, . Msat : saturation magnetization, . Happl : applied field which along the z-axis
(out-of-plane direction: Fig. 7.1). The ferromagnetic layer exhibits PMA (hence,
7.1 Auto-oscillations in SHNOs of Nano-pillar Geometry 109
z-axis is the easy axis) (Taniguchi et al. 2013).. Hk is proportional to the PMA strength.
θ is the angle .m
. → makes with the z-axis.
The strength of the spin-orbit-torque term (.τ→SL ) in Eq. 7.1 above depends on the
charge current density (. J ), flowing through heavy metal layer, as follows:
∈ α∈
τ→
. SL =β (m
→ × (m
→ p × m))
→ −β (m
→ ×m
→ p) (7.3)
1+α 2 1 + α2
J θS H E h
β=
. (7.4)
Msat ed
Λ2
.∈= (7.5)
(Λ2 + 1) + (Λ2 − 1)(m
→ · m→p )
Here, . J : in-plane current density through the heavy metal, .θ S H E : spin Hall angle
of the heavy metal, .d: thickness of the ferromagnetic layer, .α: damping factor, and
.Λ: Slonczweski parameter (Taniguchi et al. 2013; Garg et al. 2021).
Equation 7.1 can be converted into spherical coordinates (.r, θ, φ) such that . ddtm→
takes the following form:
→
dm d e→r dθ dφ
. = = e→θ + sin θ e→φ (7.6)
dt dt dt dt
Here, .e→r , .e→θ and .e→φ are the basis vectors in the spherical-coordinate system. .e→r is
taken along the direction of .m → (Roma et al. 2014). Since the norm of the macro-spin
→ is conserved and is always equal to 1, .r = 1 and . dr
vector .m dt
= 0. Using the above
expression for . ddtm→ , Eq. 7.1 translates into the following differential equations for the
direction of .m, → in terms of .θ and .φ, as a function of time (.t):
dθ
(1 + α2 )
. = −γαHe f f sin(θ) − γβ∈cos(θ)cos(φ) − γαβ∈sin(φ) (7.7)
dt
dφ
sin(θ)(1 + α2 )
. = γ He f f sin(θ) + γβ∈sin(φ) − γαβ∈cos(θ)cos(φ) (7.8)
dt
As reported by Garg et al. (2021), numerical simulation of Eqs. 7.7 and 7.8 yields
steady-state oscillations when current density . J in the equations is above a certain
threshold value. For these current values, based on the numerically obtained values
of .θ(t) and .φ(t), the macro-spin vector is obtained again in the Cartesian coordinates
as a function of time: .m x (t), .m y (t), .m z (t). .m x (t), and .m y (t), plotted against time .t,
are essentially sinusoidal curve, showing that the macro-spin vector (representative
of all magnetic moments locked to each other) is precessing around the vertical (z)
axis.
110 7 Spintronic Oscillators, Their Synchronization Properties …
Taking Fast Fourier Transform (FFT) of .m x (t), the natural frequency of auto-
oscillation can be obtained. Natural frequency of oscillation versus current density,
as reported by Garg et al. (2021), is shown in Fig. 7.2a, and angle of precession
versus current density is plotted in Fig. 7.2b. It is observed that as the current density
increases, the macro-spin vector makes a large angle of precession with the vertical
axis. Since now it needs to cover a larger periphery for one complete rotation, the time
period of oscillation increases, or the natural frequency of the oscillator decreases.
All relevant parameter values in Eqs. 7.7 and 7.8 can be found in the report by Garg
et al. (2021) and also that by Taniguchi et al. (2013).
7.3 Synchronization of Dipole-Coupled Nano-pillar SHNOs 111
The macro-spin model discussed above cannot be used to model SHNOs in the nano-
constriction geometry though, like that shown in Fig. 7.3a (Divinskiy et al. 2017).
This is because in the nano-constriction geometry, the in-plane current density is
much higher at the nano-constriction compared to the rest of the magnetic region,
and hence auto-oscillation is triggered only at the nano-constriction region and not
outside it. Given the non-uniform nature of the current distribution and magnetization
configuration in this geometry, LLGS equations in the micromagnetic framework are
needed to model SHNOs in this geometry.
In the report by Divinskiy et al. (2017), micromagnetic simulations have been
carried out of the SHNO in nano-constriction geometry, as shown in Fig. 7.3a. Rel-
evant simulation parameters can be found in the report. Figure 7.3b shows that as
the applied DC in-plane magnetic field . H// increases, the angle of precession of the
magnetization increases. (It is to be noted that .θ in the report and figure by Divinsky
et al. (Fig. 7.3a) is the angle the magnetic moment vector makes with the in-plane
(.x-axis), and hence the angle of precession (.θ as per our earlier convention) is equal
to 90.◦ – .θ as per Divinsky et al.’s convention.)
Figure 7.3b also shows that as the angle of precession goes up, the frequency of
oscillation goes down, which agrees with the prediction from macro-spin model for
the nano-pillar-geometry-based SHNO as well. The same report by
Divinsky et al. also contains experimental observation of auto-oscillations in the
nano-constriction-geometry SHNO, based on micro-focus Brillouin light scattering
(BLS). Figure 7.4c, as taken from the report, shows that the natural frequency of
auto-oscillation decreases with increase in current flowing through the device, much
like in the case of SHNO in nano-pillar geometry reported earlier. The interested
reader is recommended to go through the report by Divinsky et al. for more details
on the experimental measurement.
coupled LLGS equations. This analysis has been carried out in detail in the report by
Garg et al. (2021) and that by Sri Vasudha Hemadri Bhotla et al.; we cover it briefly
here.
As per the report by Amin et al. (2009), if the wavelength associated with the ema-
nating RF magnetic field due to precession of the magnetic moment of the uniform-
mode spin oscillator (STNO or SHNO) is given by .λ and the distance between the
spin oscillator and the point at which the field is observed is given by . R, there are
114 7 Spintronic Oscillators, Their Synchronization Properties …
three terms in the expression of the RF field: . R13 , . λ(R1 2 ) , and . (λ21)R terms. In the far-
field regime (. R >> λ), the . (λ21)R term dominates, whereas in the near-field regime
(. R << λ), the . R13 term dominates (Amin et al. 2009).
Based on the macro-spin-model-based simulation of the nano-pillar SHNO pre-
sented earlier (Fig. 7.2), the natural frequency of the SHNO is between 3 and 4.6
GHz (Fig. 7.2). The corresponding .λ is between 65 and 100 mm. In the system of
dipole-coupled SHNOs considered by Neha Garg et al. to demonstrate synchroniza-
tion (Fig. 7.5), the centre-to-centre distance between two adjacent SHNOs (. R) is in
the range of 250–350 nm. Thus, . R << λ here, and the near-field regime’s RF field
formula (. R13 ) is the only term to be considered.
In their report, Neha Garg et al. have considered a two-SHNO system or an SHNO
pair: SHNO1 is at the position (0, 0, 0), and SHNO2 is at position (. R, 0, 0), in the
Cartesian coordinate system (as shown in Fig. 7.5). In-plane current density into
SHNO1 is given by . J1 and that into SHNO2 is given by . J2 . Using the expression for
the . R13 term provided in the report by Amin et al. (2009), when the magnetic moment
1 dφ1
of SHNO1 precesses around the z-axis with the instantaneous frequency (. 2π dt
) and
2,1
an angle of precession .θ1 , RF magnetic field . H R F experienced by SHNO2 due to
SHNO1 is given by
μ0 Msat V sin(θ1 )
. H R2,1F = (2cos(φ1 )x̂ − sin(φ1 ) ŷ), (7.9)
4π(R 3 )
where .V : volume of the SHNO, and . Msat : saturation magnetization. Similarly, the
RF magnetic field experienced by SHNO1 due to the precession of the macro-spin
vector in SHNO2 can also be expressed (. H R1,2F ). In this case, SHNO2’s instantaneous
1 dφ2
frequency = . 2π dt
, and its angle of precession = .θ2 .
7.3 Synchronization of Dipole-Coupled Nano-pillar SHNOs 115
After including . H R1,2F in . H→e f f in the LLGS equation for SHNO1 (Eq. 7.1) and
converting it to spherical coordinates, Nega Garg et al. obtained the following two
equations, where .θ1 and .φ1 correspond to coordinates of the macro-spin vector for
SHNO1, and .θ2 and .φ2 correspond to the coordinates of the macro-spin vector for
SHNO2:
dθ1
. (1 + α2 ) = − γαHe f f 1 sin(θ1 )
dt
− γβ1 ∈1 (cos(θ1 )cos(φ1 ) + αsin(φ1 ))
+ 2K sin(θ2 )cos(φ2 )(αcos(θ1 )cos(φ1 ) − sin(φ1 ))
− K sin(θ2 )sin(φ2 )(αcos(θ1 )sin(φ1 ) + cos(φ1 )) (7.10)
dφ1
. sin(θ1 )(1 + α2 ) = γ He f f 1 sin(θ1 )
dt
+ γβ1 ∈1 (sin(φ1 ) − αcos(θ1 )cos(φ1 ))
−2K sin(θ2 )cos(φ2 )(cos(θ1 )cos(φ1 ) + αsin(φ1 ))
− K sin(θ2 )sin(φ2 )(αcos(φ1 ) − cos(θ1 )sin(φ1 )),
(7.11)
μ0 Msat V J1 θ S H E h
where . K = 4π(R 3 )
, . He f f 1 = Happl + (Hk − μ0 Msat )cos(θ1 ), .β1 = Msat ed
, and .∈1
Λ2
= (Λ2 +1)+(Λ2 −1)sin(θ1 )cos(φ1 )
.
Similarly, after including . H R2,1F in . H→e f f in the LLGS equation for SHNO2 and
converting it to spherical coordinates, Neha Garg et al. obtained the following two
equations, where .θ1 and .φ1 correspond to the macro-spin vector for SHNO1, and .θ2
and .φ2 correspond to the macro-spin vector for SHNO2:
dθ2
(1 + α2 )
. = − γαHe f f 2 sin(θ2 )
dt
− γβ2 ∈2 (cos(θ2 )cos(φ2 ) + αsin(φ2 ))
+ 2K sin(θ1 )cos(φ1 )(αcos(θ2 )cos(φ2 ) − sin(φ2 ))
− K sin(θ1 )sin(φ1 )(αcos(θ2 )sin(φ2 ) + cos(φ2 )) (7.12)
dφ2
.sin(θ2 )(1 + α2 ) = γ He f f 2 sin(θ2 )
dt
+ γβ2 ∈2 (sin(φ2 ) − αcos(θ2 )cos(φ2 ))
−2K sin(θ1 )cos(φ1 )(cos(θ2 )cos(φ2 ) + αsin(φ2 ))
− K sin(θ1 )sin(φ1 )(αcos(φ2 ) − cos(θ2 )sin(φ2 )),
(7.13)
116 7 Spintronic Oscillators, Their Synchronization Properties …
μ0 Msat V J2 θ S H E h
where . K = 4π(R 3 )
, and . He f f 2 = Happl + (Hk − μ0 Msat )cos(θ2 ), .β2 = Msat ed
and
Λ2
∈ =
. 2
(Λ2 +1)+(Λ2 −1)sin(θ2 )cos(φ2 )
.
Keeping the natural frequency of SHNO1 constant at 3.94 GHz by maintaining
a constant value of . J1 , Neha Garg et al. vary . J2 such that the natural frequency of
SHNO2 varies as shown in Fig. 7.6a. For each pair of current-density values (. J1 , . J2 ),
the four coupled Eqs. 7.10, 7.11, 7.12, and 7.13 are solved numerically (parameter
values used can be found in the report by Garg et al. 2021). Thus, they obtain how
.θ1 , .φ1 , .θ2 , and .φ2 vary with time, and from that through the FFT-based method
discussed earlier, they report the instantaneous frequencies (. f 1 and . f 2 ) of the two
SHNOs, which can be different from the natural frequencies (. F1 and . F2 ) of the two
SHNOs due to the coupling between the SHNOs.
Following this method, Neha Garg et al. report the variation of the instantaneous
frequencies of SHNO1 and SHNO2 (. f 1 and . f 2 ) as functions of the natural frequency
7.4 Synchronization of Spin-Wave-Coupled Nano-constriction SHNOs 117
of SHNO2 (. F2 ) (Fig. 7.6a) (natural frequency of SHNO1 is fixed at 3.94 GHz) (Garg
et al. 2021). The distance between the two SHNOs (. R) is 100 nm. Figure 7.6a shows
that within a certain range of natural frequency of SHNO2 (labelled as “synchroniza-
tion range”), instantaneous frequency of SHNO1 (. f 1 ) .= instantaneous frequency of
SHNO2 (. f 2 ) .= natural frequency of SHNO2, i.e., the two SHNOs are synchronized
in this range and have a well-defined phase relationship. Outside this range, the
instantaneous frequency of SHNO1 is the same as the natural frequency of SHNO1
(3.94 GHz), and instantaneous frequency of SHNO2 follows the natural frequency
of SHNO2, which clearly means that they are not synchronized anymore.
Neha Garg et al. repeat this method for different values of separation between
the two SHNOs (. R) and report the synchronization range for each such distance
of separation in Fig. 7.6b (Garg et al. 2021). The synchronization range is found to
decrease with increase in the distance between SHNOs, which makes intuitive sense
because the dipole coupling gets weaker (. R13 relationship) as the distance . R between
SHNOs increases.
Fig. 7.7 a Schematic of the spin-wave-coupled nano-constriction SHNO array simulated in the
report by Kendziorczyk and Kuhn (2016) b Current density and c internal field in the ferromagnetic
layer as a result of the current flow. More details are in Kendziorczyk and Kuhn (2016). (Reprinted
figure with permission from: Kendziorczyk T, Kuhn T (2016) Mutual synchronization of nano-
constriction-based spin Hall nano-oscillators through evanescent and propagating spin waves.
Phys Rev B 93:134413, Copyright 2016 by American Physical Society, https://doi.org/10.1103/
PhysRevB.93.134413 Kendziorczyk and Kuhn 2016)
In the second method, the separation between the nano-constrictions is kept fixed,
and the magnitude of the current (. Iwir e ) through the red wire in the schematic of
Fig. 7.7a is varied in the simulations. Since one of the two nano-constrictions is
physically much closer to the wire than the other, its natural frequency is modulated
by . Iwir e , while the other one’s not. This enables variation of the natural frequency
of one nano-constriction SHNO while keeping the other SHNO’s natural frequency
fixed, just like Neha Garg et al. varied the natural frequency of one nano-pillar
SHNO while keeping the other one’s frequency fixed (Fig. 7.6). Thus, in the case of
nano-constriction SHNOs, the allowed difference in natural frequencies so that the
SHNOs stay synchronized can be calculated (much like in the case of nano-pillar
SHNOs) and expressed in terms of .ΔIwrite . . Iwrite is shown as a function of the angle
of separation between the nano-constrictions (.φ) in Fig. 7.9c and as a function of the
distance between the nano-constrictions in Fig. 7.9d.
7.5 Neuromorphic Computing Using Synchronized Spintronic … 119
Fig. 7.8 a–d Spatial amplitude profile of the out-of-plane magnetic moment for two synchronized
nano-constriction SHNOs (shown in Fig. 7.7a) (more details in Kendziorczyk and Kuhn 2016)
(e) and (f) Sum of the calculated power spectral densities (PSD) from signals of the two nano-
constriction SHNOs for (e) unoptimized geometry: .Δx = 0 in Fig. 7.7a, and f optimized geometry:
.Δx = 202 nm in Fig. 7.7a. More details are in Kendziorczyk and Kuhn (2016). (Reprinted figure
with permission from: Kendziorczyk T, Kuhn T (2016) Mutual synchronization of nano-constriction-
based spin Hall nano-oscillators through evanescent and propagating spin waves. Phys Rev B
93:134413, Copyright 2016 by American Physical Society, https://doi.org/10.1103/PhysRevB.93.
134413 Kendziorczyk and Kuhn 2016)
When spintronic oscillators are considered for applications such as RF and microwave
power generators, then the target is to synchronize as many SHNOs as possible to
create constructive interference of their oscillations (the oscillation amplitudes add
up) and maximize their power output. But for neuromorphic computing applications,
the natural frequency values of the SHNOs need to be tuned such that for some val-
ues, some SHNOs are in sync and others are not, while for other values, some other
SHNOs are in sync and others are not. These different combinations of SHNOs in
sync correspond to different classes into which the input data need to be classified
(e.g., the ten digits for the MNIST data set discussed before).
120 7 Spintronic Oscillators, Their Synchronization Properties …
Fig. 7.9 a and b Sum of the PSDs calculated from the signals of the two nano-constriction SHNOs
in Fig. 7.7a, under the influence of a nanowire with current flowing through it: . Iwir e , for different
geometries c Variation of the synchronization region, determined in terms of .ΔIwir e , with different
angles of separation between the SHNOs (.φ), for different values of currents exciting the SHNOs.
d Variation of the synchronization region, determined in terms of .ΔIwir e , with different distances
between the SHNOs for the optimized geometry (angle of separation.= 120.◦ ). Current through each
SHNO .= 2 mA. The insets show the spatial amplitude profile for the second harmonic signal of the
out-of-plane magnetization. More details are in Kendziorczyk and Kuhn (2016). (Reprinted figure
with permission from: Kendziorczyk T, Kuhn T (2016) Mutual synchronization of nano-constriction-
based spin Hall nano-oscillators through evanescent and propagating spin waves. Phys Rev B
93:134413, Copyright 2016 by American Physical Society, https://doi.org/10.1103/PhysRevB.93.
134413 Kendziorczyk and Kuhn 2016)
7.5 Neuromorphic Computing Using Synchronized Spintronic … 121
Fig. 7.10 Schematic for offline learning (to be implemented on a conventional computer) in a
two-input-two-output oscillatory neural network (ONN) for binary classification, more details in
Vodenicarevic et al. (2018), Vodenicarevic (2017), and Hemadri Bhotla et al. (2023). (Reprinted
with permission from: Hemadri Bhotla SV, Garg N, Aggarwal T, Muduli PK, Bhowmik D (2023)
An oscillator-synchronization-based offline learning algorithm, with on-chip inference on an array
of spin Hall nano-oscillators. IEEE Trans Nanotechnol 22:136–148; 1536-125X O2023 c IEEE
Hemadri Bhotla et al. 2023)
The algorithm that guides data classification using synchronized oscillators (also
known as oscillatory neural networks (ONNs)) is different from the algorithms for
ANN and SNN we have discussed before in this book. Like in ANNs and SNNs
though, there are two aspects of the neural networks: training and testing. But unlike
in those cases, researchers don’t usually consider training ONNs on the actual hard-
ware array of spintronic oscillators. Instead, the ONN is trained on a conventional
computer, and then the final trained network is implemented on the array of spintronic
oscillators.
Details of the training algorithm for ONNs can be found in reports by
Vodenicarevic et al. (2018), Vodenicarevic (2017) and Hemadri Bhotla et al. (2023).
We cover it briefly here. As shown in Fig. 7.10, the original input data in higher
dimensions (27 for Wisconsin Breast Cancer (WBC) data set: Fig. 7.11a, 4 for
Fisher’s Iris data set: Fig. 7.11b, 784 for MNIST data set: Fig. 7.11c) is first reduced
to two-dimensional data using a dimension-reduction algorithm such that in the new
two-dimensional space, each cluster corresponds to each output category/label of
122 7 Spintronic Oscillators, Their Synchronization Properties …
the data (Fig. 7.11). Popular dimension-reduction algorithms for this purpose are
principle component analysis (PCA), neighbourhood component analysis (NCA),
t-distributed stochastic neighbour embedding (tSNE), etc. (Singh et al. 2021).
Binary classification is considered in the report by Hemadri Bhotla et al. (2023),
and hence only four oscillators are considered: two for input and two for output
(Fig. 7.10). The dynamics of four coupled oscillators is modelled in the algorithm
through the Kuramoto model, which is essentially a mathematical model applica-
ble not only to spintronic oscillators but also to a wide range of oscillators, like
chemical oscillators, mechanical oscillators, electronic-circuit-based oscillators, etc.
(Vodenicarevic 2017). Out of the four oscillators, two are considered input oscilla-
tors and two are output oscillators. The input data, after transformation, is in two
7.5 Neuromorphic Computing Using Synchronized Spintronic … 123
Fig. 7.12 a Schematic for on-chip inference on a two-input-two-output nano-pillar SHNO array
for binary classification b Schematic of an individual nano-pillar SHNO in the array, more details
in Vodenicarevic et al. (2018), Vodenicarevic (2017) and Hemadri Bhotla et al. (2023). (Reprinted
with permission from: Hemadri Bhotla SV, Garg N, Aggarwal T, Muduli PK, Bhowmik D (2023)
An oscillator-synchronization-based offline learning algorithm, with on-chip inference on an array
of spin Hall nano-oscillators. IEEE Trans Nanotechnol 22:136–148; 1536-125X O2023 c IEEE
Hemadri Bhotla et al. 2023)
dimensions and is converted into the natural frequencies of the two input oscillators
(. F1in , . F2in ) (Fig. 7.10). Supervised learning scheme is followed here, with the final
target being the following: for one category/label of the input data (label A say), the
two output oscillators are synchronized; and for the other category/label (label B),
the two output oscillators are not synchronized. Accordingly, as every input sample
is fed to the four-oscillator model during training, an error is calculated based on
this desired level of synchronization and what is actually obtained, and then the nat-
ural frequencies of the output oscillators (. F3out , . F4out ) are updated following gradient
descent, like in the case of ANNs (Fig. 7.10). The exact equations corresponding to
this algorithm are provided in the reports by Vodenicarevic et al. (2018; 2017) and
Hemadri Bhotla et al. (2023), and interested readers are recommended to go through
them.
124 7 Spintronic Oscillators, Their Synchronization Properties …
Fig. 7.13 On-chip inference using an array of nano-pillar SHNOs, as shown in Fig. 7.12a and
modelled by coupled LLGS equations (macro-spin model): Current densities of appropriate magni-
tudes are applied on output SHNOs such that their natural frequencies are the same as that obtained
for the output oscillators after training through our proposed offline learning algorithm. Thus, the
synchronization maps obtained through training can be implemented on the array of SHNOs for
on-chip inference. The following binary classification cases are considered. a . J3out = 0.86 × 1011
A/m.2 ,. J4out = 0.8 × 1011 A/m.2 , resulting in. F3out = 4.04 GHz,. Fout
4 = 4.22 GHz, corresponding to
Iris: Setosa versus Versicolour b. J3 = 0.858 × 10 A/m. ,. J4 = 0.797 × 1011 A/m.2 , resulting
out 11 2 out
3 = 4.05 GHz, . F 4 = 4.23 GHz, corresponding to digit “1” versus digit “0” case within
in . Fout out
the MNIST data set, more details in Hemadri Bhotla et al. (2023), Vodenicarevic et al. (2018) and
Vodenicarevic (2017). (Reprinted with permission from: Hemadri Bhotla SV, Garg N, Aggarwal T,
Muduli PK, Bhowmik D (2023) An oscillator-synchronization-based offline learning algorithm, with
on-chip inference on an array of spin Hall nano-oscillators. IEEE Trans Nanotechnol 22:136–148;
1536-125X O2023c IEEE Hemadri Bhotla et al. 2023)
References 125
As a result of this training, once the final natural frequencies of the output oscilla-
tors (. F3out , . F4out ) get fixed, currents (. J3out , . J4out ) are applied on the output SHNOs in
the physical hardware such that their natural frequencies are. F3out and. F4out (Fig. 7.12).
Different input samples are fed into the oscillator hardware as natural frequencies
of input oscillators . F1in , . F2in (corresponding currents: . J1in , . J2in ). If the two output
oscillators synchronize, then the input sample is identified with label A, otherwise
label B. This is the inference scheme for this ONN.
Sri Vasudha Hemadri Bhotla et al. report simulation of this inference scheme on an
array of four dipole-coupled nano-pillar SHNOs, as shown in Fig. 7.12. The SHNOs
are modelled through coupled LLGS equations in the macro-spin model as discussed
before. Based on this simulation, final synchronization maps for binary classification
using the Fisher’s Iris data set (Setosa flower type vs. Versicolour flower type) are
shown in Fig. 7.13a. Output oscillators synchronizing (red region) correspond to
flowers of Setosa type, while output oscillators not synchronizing (yellow region)
correspond to flowers of Versicolour type. Final synchronization maps for binary
classification using MNIST data set (digit “1” vs. digit “0”) are shown in Fig. 7.13b.
Output oscillators synchronizing (red region) correspond to images of digit “1,” while
output oscillators not synchronizing (yellow region) correspond to images of digit
“0.”
This kind of inference scheme has been recently experimentally demonstrated not
on an array of dipole-coupled uniform-mode nano-pillar SHNOs but on an array of
coupled much-larger-size vortex-mode STNOs in the report by Romera et al. (2018).
Different vowel sounds have been distinguished through the fabricated ONN in their
report (Romera et al. 2018). In the aforementioned experimental report on spin-wave
coupled nano-constriction SHNOs by Zahedinejad et al., a similar inference scheme
has also been considered for their 4 .× 4 SHNO array.
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