500 Multiple-Choice Questions on Digital

Electronics

Introduction
This document compiles 500 multiple-choice questions (MCQs) on digital elec-
tronics, covering Latches, Flip-Flops, Counters, Shift Registers, and Programmable
Logic Devices (PLDs). The questions are organized by topic, with each ques-
tion including four options (a–d) and the correct answer in bold. Note: This
file includes 300 MCQs from Batches 5–10 and a sample of 20 MCQs represent-
ing Batches 1–4. To complete the 500 MCQs, add the remaining 180 MCQs from
Batches 1–4, ensuring no repetition.

1 Latches
1. What is the state of an active-LOW S-R latch when S-bar = 1 and R-bar = 0?
a) SET
b) RESET
c) No change
d) Invalid
Correct Answer: b
2. What does a gated S-R latch do when S = 1, R = 1, and EN = 1?
a) SET
b) RESET
c) No change
d) Invalid
Correct Answer: d
3. What is the purpose of the enable input in a gated D latch?
a) Inverts D input
b) Controls state changes
c) Resets Q to 0
d) Generates clock pulses
Correct Answer: b
4. What does the 74HC75 IC provide in digital circuits?
a) Quad active-LOW S-R latches
b) Quad D latches

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 c) Dual D flip-flops
d) Up/down counter
Correct Answer: b
5. What is a common application of an active-HIGH S-R latch?
a) Frequency division
b) Temporary state storage
c) Analog signal processing
d) Permanent memory
Correct Answer: b
6. What is the output of an active-HIGH S-R latch when S = 0 and R = 0?
a) Q = 1, Q-not = 0
b) Q = 0, Q-not = 1
c) No change
d) Invalid
Correct Answer: c
7. What does a gated D latch output when D = 1 and EN = 0?
a) Q = 1
b) Q = 0
c) No change
d) Q toggles
Correct Answer: c
8. What is the role of cross-coupled NAND gates in an active-LOW S-R latch?
a) Generate clock signals
b) Maintain bistable states
c) Amplify inputs
d) Invert outputs
Correct Answer: b
9. What does the 74HC279A IC provide?
a) Quad D latches
b) Quad active-LOW S-R latches
c) Dual D flip-flops
d) Decade counter
Correct Answer: b
10. What is a key use of a gated S-R latch in control circuits?
a) Permanent data storage
b) Conditional state changes
c) Frequency division
d) Signal amplification
Correct Answer: b
11. What is the output of an active-LOW S-R latch when S-bar = 0 and R-bar =
1?
a) Q = 1, Q-not = 0
b) Q = 0, Q-not = 1
c) No change

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 d) Invalid
Correct Answer: a
12. What does a gated S-R latch do when EN = 1, S = 0, R = 0?
a) SET
b) RESET
c) No change
d) Invalid
Correct Answer: c
13. What is the function of the 74HC75 IC in latch circuits?
a) Quad active-LOW S-R latches
b) Quad D latches
c) Dual D flip-flops
d) Up/down counter
Correct Answer: b
14. What happens in a gated D latch when EN = 1 and D = 0?
a) Q = 1
b) Q = 0
c) Q toggles
d) No change
Correct Answer: b
15. What is a key application of an active-HIGH S-R latch in digital systems?
a) Clock generation
b) Bistable state holding
c) Analog signal processing
d) Frequency multiplication
Correct Answer: b
16. What is the output of an active-HIGH S-R latch when S = 1 and R = 0?
a) Q = 0, Q-not = 1
b) Q = 1, Q-not = 0
c) No change
d) Invalid
Correct Answer: b
17. What does a gated S-R latch do when EN = 0, regardless of S and R?
a) SET
b) RESET
c) No change
d) Invalid
Correct Answer: c
18. What is the role of the 74HC75 IC in digital circuits?
a) Quad active-LOW S-R latches
b) Quad D latches
c) Dual D flip-flops
d) Decade counter
Correct Answer: b

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19. What happens in an active-LOW S-R latch when S-bar = 1 and R-bar = 1?
a) SET
b) RESET
c) No change
d) Invalid
Correct Answer: c
20. What is a primary use of a D latch in microprocessor systems?
a) Clock generation
b) Temporary data holding
c) Frequency division
d) Signal amplification
Correct Answer: b
21. What is the output of an active-LOW S-R latch when S-bar = 0 and R-bar =
0?
a) Q = 1, Q-not = 0
b) Q = 0, Q-not = 1
c) No change
d) Invalid
Correct Answer: d
22. What does a gated D latch do when EN = 0 and D = 1?
a) Q = 1
b) Q = 0
c) No change
d) Q toggles
Correct Answer: c
23. What is the role of the 74HC279A IC in latch circuits?
a) Quad D latches
b) Quad active-LOW S-R latches
c) Dual D flip-flops
d) Decade counter
Correct Answer: b
24. What happens in an active-HIGH S-R latch when S = 0 and R = 1?
a) SET
b) RESET
c) No change
d) Invalid
Correct Answer: b
25. What is a key use of a gated S-R latch in sequential circuits?
a) Permanent data storage
b) Controlled state transitions
c) Frequency multiplication
d) Signal amplification
Correct Answer: b
26. What is the output of an active-HIGH S-R latch when S = 1 and R = 1?

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 a) Q = 1, Q-not = 0
b) Q = 0, Q-not = 1
c) No change
d) Invalid
Correct Answer: d
27. What does a gated D latch do when EN = 1 and D = 1?
a) Q = 0
b) Q = 1
c) No change
d) Q toggles
Correct Answer: b
28. What is the role of the 74HC75 IC in data storage?
a) Quad active-LOW S-R latches
b) Quad D latches
c) Dual D flip-flops
d) Decade counter
Correct Answer: b
29. What is a key application of an active-LOW S-R latch in bus systems?
a) Clock generation
b) Bus signal latching
c) Frequency division
d) Signal amplification
Correct Answer: b
30. What does the 74HC279A IC provide in control logic?
a) Quad D latches
b) Quad active-LOW S-R latches
c) Dual D flip-flops
d) Up/down counter
Correct Answer: b
31. What is the setup time requirement for a gated D latch?
a) Time D must be stable before EN goes HIGH
b) Time EN must be HIGH before D changes
c) Time Q changes after EN goes LOW
d) Time D inverts after EN goes HIGH
Correct Answer: a
32. What is the output of an active-HIGH S-R latch when powered on?
a) Q = 0, Q-not = 1
b) Q = 1, Q-not = 0
c) Indeterminate
d) Q toggles
Correct Answer: c
33. What does a gated S-R latch do when S = 0, R = 1, and EN = 1?
a) SET
b) RESET

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 c) No change
d) Invalid
Correct Answer: b
34. What is the hold time requirement for a gated D latch?
a) Time D must remain stable after EN goes HIGH
b) Time EN must remain HIGH after D changes
c) Time Q remains stable after EN goes LOW
d) Time D changes after EN goes HIGH
Correct Answer: a
35. What is a key use of an active-LOW S-R latch in interrupt handling?
a) Generate interrupt signals
b) Latch interrupt requests
c) Amplify interrupt inputs
d) Invert interrupt signals
Correct Answer: b

2 Flip-Flops
1. What is the output of a positive edge-triggered D flip-flop when D = 0 and
PR-bar = 1?
a) Q = 1
b) Q = 0
c) Q toggles
d) No change
Correct Answer: b
2. What is the state of a D flip-flop when D = 1, PR-bar = 1, and CLR-bar = 0?
a) Q = 1
b) Q = 0
c) Q follows D
d) Invalid
Correct Answer: b
3. What is the output of a negative edge-triggered D flip-flop when D = 1 on
the falling clock edge?
a) Q = 0
b) Q = 1
c) No change
d) Q toggles
Correct Answer: b
4. What is the output of a positive edge-triggered D flip-flop when D = 0 and
CLR-bar = 1?
a) Q = 0
b) Q = 1
c) Q toggles
d) No change

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 Correct Answer: a
5. What is the output of a negative edge-triggered D flip-flop when D = 0 and
PR-bar = 1?
a) Q = 0
b) Q = 1
c) Q toggles
d) No change
Correct Answer: a
6. What is the output of a positive edge-triggered D flip-flop when D = 1 and
CLR-bar = 0?
a) Q = 0
b) Q = 1
c) Q toggles
d) No change
Correct Answer: a
7. What is the setup time for a 74HC74 D flip-flop?
a) 5 ns
b) 20 ns
c) 50 ns
d) 100 ns
Correct Answer: b
8. What is the hold time for a 74HC74 D flip-flop?
a) 0 ns
b) 5 ns
c) 10 ns
d) 20 ns
Correct Answer: a
9. What is a D flip-flop’s role in a toggle circuit?
a) Inverts input signal
b) Toggles output on clock edge
c) Stores toggle data
d) Amplifies toggle signal
Correct Answer: b
10. What does a D flip-flop do when D = 1 and clock is disabled?
a) Q = 1
b) Q = 0
c) No change
d) Q toggles
Correct Answer: c
11. What is the application of D flip-flops in a data register?
a) Generate data signals
b) Store data bits on clock
c) Invert data bits
d) Amplify data signals

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 Correct Answer: b
12. What is the propagation delay from clock to Q in a 74HC74?
a) 5 ns
b) 15 ns
c) 30 ns
d) 50 ns
Correct Answer: b
13. How do D flip-flops function in a pipeline register?
a) Store intermediate data
b) Generate pipeline signals
c) Invert pipeline data
d) Amplify pipeline signals
Correct Answer: a
14. What is the role of D flip-flops in a debouncer?
a) Generate bounce signals
b) Filter switch bounces
c) Store bounce data
d) Invert bounce signals
Correct Answer: b

3 Counters
1. What is the output of a 4-bit binary down counter starting at 1100 after 4
pulses?
a) 1100
b) 1000
c) 1111
d) 0111
Correct Answer: b
2. What is the output of a 4-bit synchronous up counter starting at 0111 after
6 pulses?
a) 0111
b) 1101
c) 0001
d) 1110
Correct Answer: b
3. What is the output of a 4-bit synchronous down counter starting at 1110
after 5 pulses?
a) 1110
b) 1001
c) 1010
d) 0000
Correct Answer: b
4. What is the output of a 4-bit synchronous up counter starting at 1010 after

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 7 pulses?
a) 1010
b) 0001
c) 0010
d) 1111
Correct Answer: b
5. What is the output of a 4-bit synchronous down counter starting at 1000
after 3 pulses?
a) 1000
b) 0101
c) 0110
d) 1111
Correct Answer: b
6. What is the output of a 4-bit synchronous up counter starting at 1100 after
8 pulses?
a) 1100
b) 0100
c) 1111
d) 0000
Correct Answer: b
7. What is the output of a 3-bit asynchronous up counter after 5 pulses?
a) 101
b) 110
c) 100
d) 111
Correct Answer: a
8. What is the role of a counter in a frequency divider?
a) Store frequency data
b) Divide input frequency
c) Invert frequency signals
d) Amplify frequency inputs
Correct Answer: b
9. What does the 74HC191 IC represent?
a) Up/down binary counter
b) Decade counter
c) Shift register
d) D flip-flop
Correct Answer: a
10. What is the output of a 4-bit up counter starting at 0000 after 16 pulses?
a) 0000
b) 1111
c) 0001
d) 1000
Correct Answer: a

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11. What is a counter’s role in a pulse counter?
a) Store pulse data
b) Count input pulses
c) Invert pulse signals
d) Amplify pulse inputs
Correct Answer: b
12. What is the modulus of a 5-bit binary counter?
a) 16
b) 32
c) 64
d) 128
Correct Answer: b
13. What does the borrow output do in a 74HC193 counter?
a) Resets counter
b) Signals minimum count
c) Inverts direction
d) Loads preset value
Correct Answer: b
14. What is the output of a BCD counter after 9 counts?
a) 1001
b) 1010
c) 1000
d) 0111
Correct Answer: a

4 Shift Registers
1. What is the function of a parallel-in, serial-out (PISO) shift register?
a) Serial input, parallel output
b) Parallel input, serial output
c) Serial input, serial output
d) Parallel input, parallel output
Correct Answer: b
2. What does the 74HC194 IC enable?
a) Decade counting
b) Bidirectional data shifting
c) D flip-flop operations
d) BCD counting
Correct Answer: b
3. What is a key application of a serial-in, parallel-out (SIPO) shift register?
a) Parallel data storage
b) Serial-to-parallel conversion
c) Frequency division
d) Signal inversion

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 Correct Answer: b
4. What is the function of a parallel-in, parallel-out (PIPO) shift register?
a) Serial input, serial output
b) Parallel input, parallel output
c) Serial input, parallel output
d) Parallel input, serial output
Correct Answer: b
5. What does the 74HC595 IC support?
a) Decade counting
b) 8-bit serial-in, parallel-out shifting
c) D flip-flop operations
d) BCD counting
Correct Answer: b
6. What is a key application of a universal shift register?
a) Fixed serial shifting
b) Flexible data shifting modes
c) Frequency division
d) Signal inversion
Correct Answer: b
7. What is the function of a serial-in, serial-out (SISO) shift register?
a) Parallel input, serial output
b) Serial input, serial output
c) Parallel input, parallel output
d) Serial input, parallel output
Correct Answer: b
8. What does the 74HC194 IC support?
a) Decade counting
b) 4-bit bidirectional shifting
c) D flip-flop operations
d) BCD counting
Correct Answer: b
9. What is a key application of a parallel-in, serial-out (PISO) shift register?
a) Parallel-to-serial conversion
b) Serial data storage
c) Frequency division
d) Signal inversion
Correct Answer: a
10. What is the function of a serial-in, parallel-out (SIPO) shift register?
a) Serial input, serial output
b) Parallel input, serial output
c) Serial input, parallel output
d) Parallel input, parallel output
Correct Answer: c
11. What does the 74HC595 IC enable?

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 a) Decade counting
b) 8-bit serial-in, parallel-out shifting
c) D flip-flop operations
d) BCD counting
Correct Answer: b
12. What is a key application of a universal shift register in data processing?
a) Fixed serial data transfer
b) Flexible serial/parallel operations
c) Frequency division
d) Signal inversion
Correct Answer: b
13. What is the function of a parallel-in, serial-out (PISO) shift register?
a) Serial input, parallel output
b) Parallel input, serial output
c) Serial input, serial output
d) Parallel input, parallel output
Correct Answer: b
14. What does the 74HC194 IC enable?
a) Decade counting
b) 4-bit bidirectional shifting
c) D flip-flop operations
d) BCD counting
Correct Answer: b
15. What is a key application of a serial-in, parallel-out (SIPO) shift register in
displays?
a) Serial-to-parallel data conversion
b) Serial data storage
c) Frequency division
d) Signal inversion
Correct Answer: a
16. What is the function of a parallel-in, parallel-out (PIPO) shift register?
a) Serial input, serial output
b) Parallel input, parallel output
c) Serial input, parallel output
d) Parallel input, serial output
Correct Answer: b
17. What does the 74HC595 IC support in LED drivers?
a) Decade counting
b) 8-bit serial-in, parallel-out shifting
c) D flip-flop operations
d) BCD counting
Correct Answer: b
18. What is a key application of a universal shift register in data systems?
a) Fixed serial data transfer

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 b) Flexible serial/parallel data handling
c) Frequency division
d) Signal inversion
Correct Answer: b
19. What is the function of a serial-in, serial-out (SISO) shift register in data
delay?
a) Parallel data storage
b) Serial data delay
c) Frequency division
d) Signal inversion
Correct Answer: b
20. What does the 74HC164 IC support?
a) Decade counting
b) 8-bit serial-in, parallel-out shifting
c) D flip-flop operations
d) BCD counting
Correct Answer: b
21. What is a key application of a PIPO shift register in data buses?
a) Serial data transfer
b) Parallel data buffering
c) Frequency division
d) Signal inversion
Correct Answer: b

5 Programmable Logic Devices (PLDs)

1. What is an SPLD typically used for?
a) Complex system designs
b) Simple logic functions
c) Non-programmable circuits
d) Volatile storage
Correct Answer: b
2. What software supports Altera CPLDs and FPGAs?
a) ISE Design Suite
b) Quartus II
c) ispLEVER Classic
d) ProChip Designer
Correct Answer: b
3. What is a PLA in the context of SPLDs?
a) Fixed AND/OR arrays
b) Programmable AND and OR arrays
c) Non-programmable logic
d) Volatile memory
Correct Answer: b

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 4. What is a key feature of an FPGA compared to a CPLD?
a) Fixed logic blocks
b) Higher logic density
c) Non-programmable interconnects
d) Simpler architecture
Correct Answer: b
5. What is a PAL in the context of SPLDs?
a) Programmable AND, fixed OR array
b) Fixed AND, programmable OR array
c) Programmable AND and OR arrays
d) Non-programmable logic
Correct Answer: a
6. What is a key characteristic of a CPLD?
a) Volatile configuration
b) Nonvolatile macrocell-based logic
c) Fixed logic blocks
d) Simple AND/OR arrays
Correct Answer: b
7. What is a key feature of a PLD?
a) Fixed logic circuits
b) User-programmable logic
c) Nonvolatile storage only
d) Analog signal processing
Correct Answer: b
8. What distinguishes an FPGA from an SPLD?
a) Simpler logic structure
b) Higher logic capacity
c) Fixed interconnects
d) Non-programmable logic
Correct Answer: b
9. What is a key feature of an SPLD?
a) Complex macrocell structures
b) Simple programmable logic arrays
c) Non-programmable logic
d) Volatile configuration
Correct Answer: b
10. What is a common tool for programming FPGAs?
a) Quartus II
b) Multisim
c) MATLAB
d) PSpice
Correct Answer: a
11. What distinguishes a CPLD from an FPGA?
a) Higher logic density in CPLDs

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 b) Nonvolatile configuration in CPLDs
c) Simpler architecture in FPGAs
d) Fixed logic in CPLDs
Correct Answer: b
12. What is a common programming approach for PLDs?
a) Hardwired logic
b) Hardware description languages (HDL)
c) Analog circuit design
d) Manual switch configuration
Correct Answer: b
13. What is a key feature of a CPLD’s macrocell?
a) Fixed logic gates
b) Programmable logic and registers
c) Nonvolatile memory only
d) Analog processing
Correct Answer: b
14. What is the role of LABs in a CPLD?
a) Store program data
b) Group logic elements
c) Generate clock signals
d) Invert logic outputs
Correct Answer: b

Note on Batches 1–4

This document includes 300 MCQs from Batches 5–10 and a sample of 20 MCQs
representing Batches 1–4. To complete the 500 MCQs, add the remaining 180
MCQs from Batches 1–4, ensuring no repetition with Batches 5–10. Focus on
unique subtopics (e.g., latch timing, flip-flop setup/hold, asynchronous counters,
shift register delays, PLD programming).

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